1 /* 2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 3 * 4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 5 * Copyright (C) 2006 David Brownell (convert to new framework) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 /* 14 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 15 * That defined the register interface now provided by all PCs, some 16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 17 * integrate an MC146818 clone in their southbridge, and boards use 18 * that instead of discrete clones like the DS12887 or M48T86. There 19 * are also clones that connect using the LPC bus. 20 * 21 * That register API is also used directly by various other drivers 22 * (notably for integrated NVRAM), infrastructure (x86 has code to 23 * bypass the RTC framework, directly reading the RTC during boot 24 * and updating minutes/seconds for systems using NTP synch) and 25 * utilities (like userspace 'hwclock', if no /dev node exists). 26 * 27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 28 * interrupts disabled, holding the global rtc_lock, to exclude those 29 * other drivers and utilities on correctly configured systems. 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/kernel.h> 35 #include <linux/module.h> 36 #include <linux/init.h> 37 #include <linux/interrupt.h> 38 #include <linux/spinlock.h> 39 #include <linux/platform_device.h> 40 #include <linux/log2.h> 41 #include <linux/pm.h> 42 #include <linux/of.h> 43 #include <linux/of_platform.h> 44 45 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 46 #include <linux/mc146818rtc.h> 47 48 struct cmos_rtc { 49 struct rtc_device *rtc; 50 struct device *dev; 51 int irq; 52 struct resource *iomem; 53 time64_t alarm_expires; 54 55 void (*wake_on)(struct device *); 56 void (*wake_off)(struct device *); 57 58 u8 enabled_wake; 59 u8 suspend_ctrl; 60 61 /* newer hardware extends the original register set */ 62 u8 day_alrm; 63 u8 mon_alrm; 64 u8 century; 65 }; 66 67 /* both platform and pnp busses use negative numbers for invalid irqs */ 68 #define is_valid_irq(n) ((n) > 0) 69 70 static const char driver_name[] = "rtc_cmos"; 71 72 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 73 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 74 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 75 */ 76 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 77 78 static inline int is_intr(u8 rtc_intr) 79 { 80 if (!(rtc_intr & RTC_IRQF)) 81 return 0; 82 return rtc_intr & RTC_IRQMASK; 83 } 84 85 /*----------------------------------------------------------------*/ 86 87 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 88 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 89 * used in a broken "legacy replacement" mode. The breakage includes 90 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 91 * other (better) use. 92 * 93 * When that broken mode is in use, platform glue provides a partial 94 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 95 * want to use HPET for anything except those IRQs though... 96 */ 97 #ifdef CONFIG_HPET_EMULATE_RTC 98 #include <asm/hpet.h> 99 #else 100 101 static inline int is_hpet_enabled(void) 102 { 103 return 0; 104 } 105 106 static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 107 { 108 return 0; 109 } 110 111 static inline int hpet_set_rtc_irq_bit(unsigned long mask) 112 { 113 return 0; 114 } 115 116 static inline int 117 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 118 { 119 return 0; 120 } 121 122 static inline int hpet_set_periodic_freq(unsigned long freq) 123 { 124 return 0; 125 } 126 127 static inline int hpet_rtc_dropped_irq(void) 128 { 129 return 0; 130 } 131 132 static inline int hpet_rtc_timer_init(void) 133 { 134 return 0; 135 } 136 137 extern irq_handler_t hpet_rtc_interrupt; 138 139 static inline int hpet_register_irq_handler(irq_handler_t handler) 140 { 141 return 0; 142 } 143 144 static inline int hpet_unregister_irq_handler(irq_handler_t handler) 145 { 146 return 0; 147 } 148 149 #endif 150 151 /*----------------------------------------------------------------*/ 152 153 #ifdef RTC_PORT 154 155 /* Most newer x86 systems have two register banks, the first used 156 * for RTC and NVRAM and the second only for NVRAM. Caller must 157 * own rtc_lock ... and we won't worry about access during NMI. 158 */ 159 #define can_bank2 true 160 161 static inline unsigned char cmos_read_bank2(unsigned char addr) 162 { 163 outb(addr, RTC_PORT(2)); 164 return inb(RTC_PORT(3)); 165 } 166 167 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 168 { 169 outb(addr, RTC_PORT(2)); 170 outb(val, RTC_PORT(3)); 171 } 172 173 #else 174 175 #define can_bank2 false 176 177 static inline unsigned char cmos_read_bank2(unsigned char addr) 178 { 179 return 0; 180 } 181 182 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 183 { 184 } 185 186 #endif 187 188 /*----------------------------------------------------------------*/ 189 190 static int cmos_read_time(struct device *dev, struct rtc_time *t) 191 { 192 /* REVISIT: if the clock has a "century" register, use 193 * that instead of the heuristic in mc146818_get_time(). 194 * That'll make Y3K compatility (year > 2070) easy! 195 */ 196 mc146818_get_time(t); 197 return 0; 198 } 199 200 static int cmos_set_time(struct device *dev, struct rtc_time *t) 201 { 202 /* REVISIT: set the "century" register if available 203 * 204 * NOTE: this ignores the issue whereby updating the seconds 205 * takes effect exactly 500ms after we write the register. 206 * (Also queueing and other delays before we get this far.) 207 */ 208 return mc146818_set_time(t); 209 } 210 211 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 212 { 213 struct cmos_rtc *cmos = dev_get_drvdata(dev); 214 unsigned char rtc_control; 215 216 if (!is_valid_irq(cmos->irq)) 217 return -EIO; 218 219 /* Basic alarms only support hour, minute, and seconds fields. 220 * Some also support day and month, for alarms up to a year in 221 * the future. 222 */ 223 224 spin_lock_irq(&rtc_lock); 225 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 226 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); 227 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); 228 229 if (cmos->day_alrm) { 230 /* ignore upper bits on readback per ACPI spec */ 231 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; 232 if (!t->time.tm_mday) 233 t->time.tm_mday = -1; 234 235 if (cmos->mon_alrm) { 236 t->time.tm_mon = CMOS_READ(cmos->mon_alrm); 237 if (!t->time.tm_mon) 238 t->time.tm_mon = -1; 239 } 240 } 241 242 rtc_control = CMOS_READ(RTC_CONTROL); 243 spin_unlock_irq(&rtc_lock); 244 245 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 246 if (((unsigned)t->time.tm_sec) < 0x60) 247 t->time.tm_sec = bcd2bin(t->time.tm_sec); 248 else 249 t->time.tm_sec = -1; 250 if (((unsigned)t->time.tm_min) < 0x60) 251 t->time.tm_min = bcd2bin(t->time.tm_min); 252 else 253 t->time.tm_min = -1; 254 if (((unsigned)t->time.tm_hour) < 0x24) 255 t->time.tm_hour = bcd2bin(t->time.tm_hour); 256 else 257 t->time.tm_hour = -1; 258 259 if (cmos->day_alrm) { 260 if (((unsigned)t->time.tm_mday) <= 0x31) 261 t->time.tm_mday = bcd2bin(t->time.tm_mday); 262 else 263 t->time.tm_mday = -1; 264 265 if (cmos->mon_alrm) { 266 if (((unsigned)t->time.tm_mon) <= 0x12) 267 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 268 else 269 t->time.tm_mon = -1; 270 } 271 } 272 } 273 274 t->enabled = !!(rtc_control & RTC_AIE); 275 t->pending = 0; 276 277 return 0; 278 } 279 280 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 281 { 282 unsigned char rtc_intr; 283 284 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 285 * allegedly some older rtcs need that to handle irqs properly 286 */ 287 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 288 289 if (is_hpet_enabled()) 290 return; 291 292 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 293 if (is_intr(rtc_intr)) 294 rtc_update_irq(cmos->rtc, 1, rtc_intr); 295 } 296 297 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 298 { 299 unsigned char rtc_control; 300 301 /* flush any pending IRQ status, notably for update irqs, 302 * before we enable new IRQs 303 */ 304 rtc_control = CMOS_READ(RTC_CONTROL); 305 cmos_checkintr(cmos, rtc_control); 306 307 rtc_control |= mask; 308 CMOS_WRITE(rtc_control, RTC_CONTROL); 309 hpet_set_rtc_irq_bit(mask); 310 311 cmos_checkintr(cmos, rtc_control); 312 } 313 314 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 315 { 316 unsigned char rtc_control; 317 318 rtc_control = CMOS_READ(RTC_CONTROL); 319 rtc_control &= ~mask; 320 CMOS_WRITE(rtc_control, RTC_CONTROL); 321 hpet_mask_rtc_irq_bit(mask); 322 323 cmos_checkintr(cmos, rtc_control); 324 } 325 326 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 327 { 328 struct cmos_rtc *cmos = dev_get_drvdata(dev); 329 unsigned char mon, mday, hrs, min, sec, rtc_control; 330 331 if (!is_valid_irq(cmos->irq)) 332 return -EIO; 333 334 mon = t->time.tm_mon + 1; 335 mday = t->time.tm_mday; 336 hrs = t->time.tm_hour; 337 min = t->time.tm_min; 338 sec = t->time.tm_sec; 339 340 rtc_control = CMOS_READ(RTC_CONTROL); 341 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 342 /* Writing 0xff means "don't care" or "match all". */ 343 mon = (mon <= 12) ? bin2bcd(mon) : 0xff; 344 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; 345 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; 346 min = (min < 60) ? bin2bcd(min) : 0xff; 347 sec = (sec < 60) ? bin2bcd(sec) : 0xff; 348 } 349 350 spin_lock_irq(&rtc_lock); 351 352 /* next rtc irq must not be from previous alarm setting */ 353 cmos_irq_disable(cmos, RTC_AIE); 354 355 /* update alarm */ 356 CMOS_WRITE(hrs, RTC_HOURS_ALARM); 357 CMOS_WRITE(min, RTC_MINUTES_ALARM); 358 CMOS_WRITE(sec, RTC_SECONDS_ALARM); 359 360 /* the system may support an "enhanced" alarm */ 361 if (cmos->day_alrm) { 362 CMOS_WRITE(mday, cmos->day_alrm); 363 if (cmos->mon_alrm) 364 CMOS_WRITE(mon, cmos->mon_alrm); 365 } 366 367 /* FIXME the HPET alarm glue currently ignores day_alrm 368 * and mon_alrm ... 369 */ 370 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec); 371 372 if (t->enabled) 373 cmos_irq_enable(cmos, RTC_AIE); 374 375 spin_unlock_irq(&rtc_lock); 376 377 cmos->alarm_expires = rtc_tm_to_time64(&t->time); 378 379 return 0; 380 } 381 382 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 383 { 384 struct cmos_rtc *cmos = dev_get_drvdata(dev); 385 unsigned long flags; 386 387 if (!is_valid_irq(cmos->irq)) 388 return -EINVAL; 389 390 spin_lock_irqsave(&rtc_lock, flags); 391 392 if (enabled) 393 cmos_irq_enable(cmos, RTC_AIE); 394 else 395 cmos_irq_disable(cmos, RTC_AIE); 396 397 spin_unlock_irqrestore(&rtc_lock, flags); 398 return 0; 399 } 400 401 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 402 403 static int cmos_procfs(struct device *dev, struct seq_file *seq) 404 { 405 struct cmos_rtc *cmos = dev_get_drvdata(dev); 406 unsigned char rtc_control, valid; 407 408 spin_lock_irq(&rtc_lock); 409 rtc_control = CMOS_READ(RTC_CONTROL); 410 valid = CMOS_READ(RTC_VALID); 411 spin_unlock_irq(&rtc_lock); 412 413 /* NOTE: at least ICH6 reports battery status using a different 414 * (non-RTC) bit; and SQWE is ignored on many current systems. 415 */ 416 seq_printf(seq, 417 "periodic_IRQ\t: %s\n" 418 "update_IRQ\t: %s\n" 419 "HPET_emulated\t: %s\n" 420 // "square_wave\t: %s\n" 421 "BCD\t\t: %s\n" 422 "DST_enable\t: %s\n" 423 "periodic_freq\t: %d\n" 424 "batt_status\t: %s\n", 425 (rtc_control & RTC_PIE) ? "yes" : "no", 426 (rtc_control & RTC_UIE) ? "yes" : "no", 427 is_hpet_enabled() ? "yes" : "no", 428 // (rtc_control & RTC_SQWE) ? "yes" : "no", 429 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 430 (rtc_control & RTC_DST_EN) ? "yes" : "no", 431 cmos->rtc->irq_freq, 432 (valid & RTC_VRT) ? "okay" : "dead"); 433 434 return 0; 435 } 436 437 #else 438 #define cmos_procfs NULL 439 #endif 440 441 static const struct rtc_class_ops cmos_rtc_ops = { 442 .read_time = cmos_read_time, 443 .set_time = cmos_set_time, 444 .read_alarm = cmos_read_alarm, 445 .set_alarm = cmos_set_alarm, 446 .proc = cmos_procfs, 447 .alarm_irq_enable = cmos_alarm_irq_enable, 448 }; 449 450 /*----------------------------------------------------------------*/ 451 452 /* 453 * All these chips have at least 64 bytes of address space, shared by 454 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 455 * by boot firmware. Modern chips have 128 or 256 bytes. 456 */ 457 458 #define NVRAM_OFFSET (RTC_REG_D + 1) 459 460 static ssize_t 461 cmos_nvram_read(struct file *filp, struct kobject *kobj, 462 struct bin_attribute *attr, 463 char *buf, loff_t off, size_t count) 464 { 465 int retval; 466 467 off += NVRAM_OFFSET; 468 spin_lock_irq(&rtc_lock); 469 for (retval = 0; count; count--, off++, retval++) { 470 if (off < 128) 471 *buf++ = CMOS_READ(off); 472 else if (can_bank2) 473 *buf++ = cmos_read_bank2(off); 474 else 475 break; 476 } 477 spin_unlock_irq(&rtc_lock); 478 479 return retval; 480 } 481 482 static ssize_t 483 cmos_nvram_write(struct file *filp, struct kobject *kobj, 484 struct bin_attribute *attr, 485 char *buf, loff_t off, size_t count) 486 { 487 struct cmos_rtc *cmos; 488 int retval; 489 490 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj)); 491 492 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 493 * checksum on part of the NVRAM data. That's currently ignored 494 * here. If userspace is smart enough to know what fields of 495 * NVRAM to update, updating checksums is also part of its job. 496 */ 497 off += NVRAM_OFFSET; 498 spin_lock_irq(&rtc_lock); 499 for (retval = 0; count; count--, off++, retval++) { 500 /* don't trash RTC registers */ 501 if (off == cmos->day_alrm 502 || off == cmos->mon_alrm 503 || off == cmos->century) 504 buf++; 505 else if (off < 128) 506 CMOS_WRITE(*buf++, off); 507 else if (can_bank2) 508 cmos_write_bank2(*buf++, off); 509 else 510 break; 511 } 512 spin_unlock_irq(&rtc_lock); 513 514 return retval; 515 } 516 517 static struct bin_attribute nvram = { 518 .attr = { 519 .name = "nvram", 520 .mode = S_IRUGO | S_IWUSR, 521 }, 522 523 .read = cmos_nvram_read, 524 .write = cmos_nvram_write, 525 /* size gets set up later */ 526 }; 527 528 /*----------------------------------------------------------------*/ 529 530 static struct cmos_rtc cmos_rtc; 531 532 static irqreturn_t cmos_interrupt(int irq, void *p) 533 { 534 u8 irqstat; 535 u8 rtc_control; 536 537 spin_lock(&rtc_lock); 538 539 /* When the HPET interrupt handler calls us, the interrupt 540 * status is passed as arg1 instead of the irq number. But 541 * always clear irq status, even when HPET is in the way. 542 * 543 * Note that HPET and RTC are almost certainly out of phase, 544 * giving different IRQ status ... 545 */ 546 irqstat = CMOS_READ(RTC_INTR_FLAGS); 547 rtc_control = CMOS_READ(RTC_CONTROL); 548 if (is_hpet_enabled()) 549 irqstat = (unsigned long)irq & 0xF0; 550 551 /* If we were suspended, RTC_CONTROL may not be accurate since the 552 * bios may have cleared it. 553 */ 554 if (!cmos_rtc.suspend_ctrl) 555 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 556 else 557 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; 558 559 /* All Linux RTC alarms should be treated as if they were oneshot. 560 * Similar code may be needed in system wakeup paths, in case the 561 * alarm woke the system. 562 */ 563 if (irqstat & RTC_AIE) { 564 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 565 rtc_control &= ~RTC_AIE; 566 CMOS_WRITE(rtc_control, RTC_CONTROL); 567 hpet_mask_rtc_irq_bit(RTC_AIE); 568 CMOS_READ(RTC_INTR_FLAGS); 569 } 570 spin_unlock(&rtc_lock); 571 572 if (is_intr(irqstat)) { 573 rtc_update_irq(p, 1, irqstat); 574 return IRQ_HANDLED; 575 } else 576 return IRQ_NONE; 577 } 578 579 #ifdef CONFIG_PNP 580 #define INITSECTION 581 582 #else 583 #define INITSECTION __init 584 #endif 585 586 static int INITSECTION 587 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 588 { 589 struct cmos_rtc_board_info *info = dev_get_platdata(dev); 590 int retval = 0; 591 unsigned char rtc_control; 592 unsigned address_space; 593 u32 flags = 0; 594 595 /* there can be only one ... */ 596 if (cmos_rtc.dev) 597 return -EBUSY; 598 599 if (!ports) 600 return -ENODEV; 601 602 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 603 * 604 * REVISIT non-x86 systems may instead use memory space resources 605 * (needing ioremap etc), not i/o space resources like this ... 606 */ 607 if (RTC_IOMAPPED) 608 ports = request_region(ports->start, resource_size(ports), 609 driver_name); 610 else 611 ports = request_mem_region(ports->start, resource_size(ports), 612 driver_name); 613 if (!ports) { 614 dev_dbg(dev, "i/o registers already in use\n"); 615 return -EBUSY; 616 } 617 618 cmos_rtc.irq = rtc_irq; 619 cmos_rtc.iomem = ports; 620 621 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 622 * driver did, but don't reject unknown configs. Old hardware 623 * won't address 128 bytes. Newer chips have multiple banks, 624 * though they may not be listed in one I/O resource. 625 */ 626 #if defined(CONFIG_ATARI) 627 address_space = 64; 628 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 629 || defined(__sparc__) || defined(__mips__) \ 630 || defined(__powerpc__) || defined(CONFIG_MN10300) 631 address_space = 128; 632 #else 633 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 634 address_space = 128; 635 #endif 636 if (can_bank2 && ports->end > (ports->start + 1)) 637 address_space = 256; 638 639 /* For ACPI systems extension info comes from the FADT. On others, 640 * board specific setup provides it as appropriate. Systems where 641 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 642 * some almost-clones) can provide hooks to make that behave. 643 * 644 * Note that ACPI doesn't preclude putting these registers into 645 * "extended" areas of the chip, including some that we won't yet 646 * expect CMOS_READ and friends to handle. 647 */ 648 if (info) { 649 if (info->flags) 650 flags = info->flags; 651 if (info->address_space) 652 address_space = info->address_space; 653 654 if (info->rtc_day_alarm && info->rtc_day_alarm < 128) 655 cmos_rtc.day_alrm = info->rtc_day_alarm; 656 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) 657 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 658 if (info->rtc_century && info->rtc_century < 128) 659 cmos_rtc.century = info->rtc_century; 660 661 if (info->wake_on && info->wake_off) { 662 cmos_rtc.wake_on = info->wake_on; 663 cmos_rtc.wake_off = info->wake_off; 664 } 665 } 666 667 cmos_rtc.dev = dev; 668 dev_set_drvdata(dev, &cmos_rtc); 669 670 cmos_rtc.rtc = rtc_device_register(driver_name, dev, 671 &cmos_rtc_ops, THIS_MODULE); 672 if (IS_ERR(cmos_rtc.rtc)) { 673 retval = PTR_ERR(cmos_rtc.rtc); 674 goto cleanup0; 675 } 676 677 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 678 679 spin_lock_irq(&rtc_lock); 680 681 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { 682 /* force periodic irq to CMOS reset default of 1024Hz; 683 * 684 * REVISIT it's been reported that at least one x86_64 ALI 685 * mobo doesn't use 32KHz here ... for portability we might 686 * need to do something about other clock frequencies. 687 */ 688 cmos_rtc.rtc->irq_freq = 1024; 689 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 690 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 691 } 692 693 /* disable irqs */ 694 if (is_valid_irq(rtc_irq)) 695 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 696 697 rtc_control = CMOS_READ(RTC_CONTROL); 698 699 spin_unlock_irq(&rtc_lock); 700 701 /* FIXME: 702 * <asm-generic/rtc.h> doesn't know 12-hour mode either. 703 */ 704 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 705 dev_warn(dev, "only 24-hr supported\n"); 706 retval = -ENXIO; 707 goto cleanup1; 708 } 709 710 if (is_valid_irq(rtc_irq)) { 711 irq_handler_t rtc_cmos_int_handler; 712 713 if (is_hpet_enabled()) { 714 rtc_cmos_int_handler = hpet_rtc_interrupt; 715 retval = hpet_register_irq_handler(cmos_interrupt); 716 if (retval) { 717 dev_warn(dev, "hpet_register_irq_handler " 718 " failed in rtc_init()."); 719 goto cleanup1; 720 } 721 } else 722 rtc_cmos_int_handler = cmos_interrupt; 723 724 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 725 IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev), 726 cmos_rtc.rtc); 727 if (retval < 0) { 728 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 729 goto cleanup1; 730 } 731 } 732 hpet_rtc_timer_init(); 733 734 /* export at least the first block of NVRAM */ 735 nvram.size = address_space - NVRAM_OFFSET; 736 retval = sysfs_create_bin_file(&dev->kobj, &nvram); 737 if (retval < 0) { 738 dev_dbg(dev, "can't create nvram file? %d\n", retval); 739 goto cleanup2; 740 } 741 742 dev_info(dev, "%s%s, %zd bytes nvram%s\n", 743 !is_valid_irq(rtc_irq) ? "no alarms" : 744 cmos_rtc.mon_alrm ? "alarms up to one year" : 745 cmos_rtc.day_alrm ? "alarms up to one month" : 746 "alarms up to one day", 747 cmos_rtc.century ? ", y3k" : "", 748 nvram.size, 749 is_hpet_enabled() ? ", hpet irqs" : ""); 750 751 return 0; 752 753 cleanup2: 754 if (is_valid_irq(rtc_irq)) 755 free_irq(rtc_irq, cmos_rtc.rtc); 756 cleanup1: 757 cmos_rtc.dev = NULL; 758 rtc_device_unregister(cmos_rtc.rtc); 759 cleanup0: 760 if (RTC_IOMAPPED) 761 release_region(ports->start, resource_size(ports)); 762 else 763 release_mem_region(ports->start, resource_size(ports)); 764 return retval; 765 } 766 767 static void cmos_do_shutdown(int rtc_irq) 768 { 769 spin_lock_irq(&rtc_lock); 770 if (is_valid_irq(rtc_irq)) 771 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 772 spin_unlock_irq(&rtc_lock); 773 } 774 775 static void __exit cmos_do_remove(struct device *dev) 776 { 777 struct cmos_rtc *cmos = dev_get_drvdata(dev); 778 struct resource *ports; 779 780 cmos_do_shutdown(cmos->irq); 781 782 sysfs_remove_bin_file(&dev->kobj, &nvram); 783 784 if (is_valid_irq(cmos->irq)) { 785 free_irq(cmos->irq, cmos->rtc); 786 hpet_unregister_irq_handler(cmos_interrupt); 787 } 788 789 rtc_device_unregister(cmos->rtc); 790 cmos->rtc = NULL; 791 792 ports = cmos->iomem; 793 if (RTC_IOMAPPED) 794 release_region(ports->start, resource_size(ports)); 795 else 796 release_mem_region(ports->start, resource_size(ports)); 797 cmos->iomem = NULL; 798 799 cmos->dev = NULL; 800 } 801 802 static int cmos_aie_poweroff(struct device *dev) 803 { 804 struct cmos_rtc *cmos = dev_get_drvdata(dev); 805 struct rtc_time now; 806 time64_t t_now; 807 int retval = 0; 808 unsigned char rtc_control; 809 810 if (!cmos->alarm_expires) 811 return -EINVAL; 812 813 spin_lock_irq(&rtc_lock); 814 rtc_control = CMOS_READ(RTC_CONTROL); 815 spin_unlock_irq(&rtc_lock); 816 817 /* We only care about the situation where AIE is disabled. */ 818 if (rtc_control & RTC_AIE) 819 return -EBUSY; 820 821 cmos_read_time(dev, &now); 822 t_now = rtc_tm_to_time64(&now); 823 824 /* 825 * When enabling "RTC wake-up" in BIOS setup, the machine reboots 826 * automatically right after shutdown on some buggy boxes. 827 * This automatic rebooting issue won't happen when the alarm 828 * time is larger than now+1 seconds. 829 * 830 * If the alarm time is equal to now+1 seconds, the issue can be 831 * prevented by cancelling the alarm. 832 */ 833 if (cmos->alarm_expires == t_now + 1) { 834 struct rtc_wkalrm alarm; 835 836 /* Cancel the AIE timer by configuring the past time. */ 837 rtc_time64_to_tm(t_now - 1, &alarm.time); 838 alarm.enabled = 0; 839 retval = cmos_set_alarm(dev, &alarm); 840 } else if (cmos->alarm_expires > t_now + 1) { 841 retval = -EBUSY; 842 } 843 844 return retval; 845 } 846 847 #ifdef CONFIG_PM 848 849 static int cmos_suspend(struct device *dev) 850 { 851 struct cmos_rtc *cmos = dev_get_drvdata(dev); 852 unsigned char tmp; 853 854 /* only the alarm might be a wakeup event source */ 855 spin_lock_irq(&rtc_lock); 856 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 857 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 858 unsigned char mask; 859 860 if (device_may_wakeup(dev)) 861 mask = RTC_IRQMASK & ~RTC_AIE; 862 else 863 mask = RTC_IRQMASK; 864 tmp &= ~mask; 865 CMOS_WRITE(tmp, RTC_CONTROL); 866 hpet_mask_rtc_irq_bit(mask); 867 868 cmos_checkintr(cmos, tmp); 869 } 870 spin_unlock_irq(&rtc_lock); 871 872 if (tmp & RTC_AIE) { 873 cmos->enabled_wake = 1; 874 if (cmos->wake_on) 875 cmos->wake_on(dev); 876 else 877 enable_irq_wake(cmos->irq); 878 } 879 880 dev_dbg(dev, "suspend%s, ctrl %02x\n", 881 (tmp & RTC_AIE) ? ", alarm may wake" : "", 882 tmp); 883 884 return 0; 885 } 886 887 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 888 * after a detour through G3 "mechanical off", although the ACPI spec 889 * says wakeup should only work from G1/S4 "hibernate". To most users, 890 * distinctions between S4 and S5 are pointless. So when the hardware 891 * allows, don't draw that distinction. 892 */ 893 static inline int cmos_poweroff(struct device *dev) 894 { 895 return cmos_suspend(dev); 896 } 897 898 #ifdef CONFIG_PM_SLEEP 899 900 static int cmos_resume(struct device *dev) 901 { 902 struct cmos_rtc *cmos = dev_get_drvdata(dev); 903 unsigned char tmp; 904 905 if (cmos->enabled_wake) { 906 if (cmos->wake_off) 907 cmos->wake_off(dev); 908 else 909 disable_irq_wake(cmos->irq); 910 cmos->enabled_wake = 0; 911 } 912 913 spin_lock_irq(&rtc_lock); 914 tmp = cmos->suspend_ctrl; 915 cmos->suspend_ctrl = 0; 916 /* re-enable any irqs previously active */ 917 if (tmp & RTC_IRQMASK) { 918 unsigned char mask; 919 920 if (device_may_wakeup(dev)) 921 hpet_rtc_timer_init(); 922 923 do { 924 CMOS_WRITE(tmp, RTC_CONTROL); 925 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 926 927 mask = CMOS_READ(RTC_INTR_FLAGS); 928 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 929 if (!is_hpet_enabled() || !is_intr(mask)) 930 break; 931 932 /* force one-shot behavior if HPET blocked 933 * the wake alarm's irq 934 */ 935 rtc_update_irq(cmos->rtc, 1, mask); 936 tmp &= ~RTC_AIE; 937 hpet_mask_rtc_irq_bit(RTC_AIE); 938 } while (mask & RTC_AIE); 939 } 940 spin_unlock_irq(&rtc_lock); 941 942 dev_dbg(dev, "resume, ctrl %02x\n", tmp); 943 944 return 0; 945 } 946 947 #endif 948 #else 949 950 static inline int cmos_poweroff(struct device *dev) 951 { 952 return -ENOSYS; 953 } 954 955 #endif 956 957 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 958 959 /*----------------------------------------------------------------*/ 960 961 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 962 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 963 * probably list them in similar PNPBIOS tables; so PNP is more common. 964 * 965 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 966 * predate even PNPBIOS should set up platform_bus devices. 967 */ 968 969 #ifdef CONFIG_ACPI 970 971 #include <linux/acpi.h> 972 973 static u32 rtc_handler(void *context) 974 { 975 struct device *dev = context; 976 977 pm_wakeup_event(dev, 0); 978 acpi_clear_event(ACPI_EVENT_RTC); 979 acpi_disable_event(ACPI_EVENT_RTC, 0); 980 return ACPI_INTERRUPT_HANDLED; 981 } 982 983 static inline void rtc_wake_setup(struct device *dev) 984 { 985 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 986 /* 987 * After the RTC handler is installed, the Fixed_RTC event should 988 * be disabled. Only when the RTC alarm is set will it be enabled. 989 */ 990 acpi_clear_event(ACPI_EVENT_RTC); 991 acpi_disable_event(ACPI_EVENT_RTC, 0); 992 } 993 994 static void rtc_wake_on(struct device *dev) 995 { 996 acpi_clear_event(ACPI_EVENT_RTC); 997 acpi_enable_event(ACPI_EVENT_RTC, 0); 998 } 999 1000 static void rtc_wake_off(struct device *dev) 1001 { 1002 acpi_disable_event(ACPI_EVENT_RTC, 0); 1003 } 1004 1005 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find 1006 * its device node and pass extra config data. This helps its driver use 1007 * capabilities that the now-obsolete mc146818 didn't have, and informs it 1008 * that this board's RTC is wakeup-capable (per ACPI spec). 1009 */ 1010 static struct cmos_rtc_board_info acpi_rtc_info; 1011 1012 static void cmos_wake_setup(struct device *dev) 1013 { 1014 if (acpi_disabled) 1015 return; 1016 1017 rtc_wake_setup(dev); 1018 acpi_rtc_info.wake_on = rtc_wake_on; 1019 acpi_rtc_info.wake_off = rtc_wake_off; 1020 1021 /* workaround bug in some ACPI tables */ 1022 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 1023 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 1024 acpi_gbl_FADT.month_alarm); 1025 acpi_gbl_FADT.month_alarm = 0; 1026 } 1027 1028 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; 1029 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; 1030 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; 1031 1032 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ 1033 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 1034 dev_info(dev, "RTC can wake from S4\n"); 1035 1036 dev->platform_data = &acpi_rtc_info; 1037 1038 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 1039 device_init_wakeup(dev, 1); 1040 } 1041 1042 #else 1043 1044 static void cmos_wake_setup(struct device *dev) 1045 { 1046 } 1047 1048 #endif 1049 1050 #ifdef CONFIG_PNP 1051 1052 #include <linux/pnp.h> 1053 1054 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1055 { 1056 cmos_wake_setup(&pnp->dev); 1057 1058 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) 1059 /* Some machines contain a PNP entry for the RTC, but 1060 * don't define the IRQ. It should always be safe to 1061 * hardcode it in these cases 1062 */ 1063 return cmos_do_probe(&pnp->dev, 1064 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8); 1065 else 1066 return cmos_do_probe(&pnp->dev, 1067 pnp_get_resource(pnp, IORESOURCE_IO, 0), 1068 pnp_irq(pnp, 0)); 1069 } 1070 1071 static void __exit cmos_pnp_remove(struct pnp_dev *pnp) 1072 { 1073 cmos_do_remove(&pnp->dev); 1074 } 1075 1076 static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1077 { 1078 struct device *dev = &pnp->dev; 1079 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1080 1081 if (system_state == SYSTEM_POWER_OFF) { 1082 int retval = cmos_poweroff(dev); 1083 1084 if (cmos_aie_poweroff(dev) < 0 && !retval) 1085 return; 1086 } 1087 1088 cmos_do_shutdown(cmos->irq); 1089 } 1090 1091 static const struct pnp_device_id rtc_ids[] = { 1092 { .id = "PNP0b00", }, 1093 { .id = "PNP0b01", }, 1094 { .id = "PNP0b02", }, 1095 { }, 1096 }; 1097 MODULE_DEVICE_TABLE(pnp, rtc_ids); 1098 1099 static struct pnp_driver cmos_pnp_driver = { 1100 .name = (char *) driver_name, 1101 .id_table = rtc_ids, 1102 .probe = cmos_pnp_probe, 1103 .remove = __exit_p(cmos_pnp_remove), 1104 .shutdown = cmos_pnp_shutdown, 1105 1106 /* flag ensures resume() gets called, and stops syslog spam */ 1107 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1108 .driver = { 1109 .pm = &cmos_pm_ops, 1110 }, 1111 }; 1112 1113 #endif /* CONFIG_PNP */ 1114 1115 #ifdef CONFIG_OF 1116 static const struct of_device_id of_cmos_match[] = { 1117 { 1118 .compatible = "motorola,mc146818", 1119 }, 1120 { }, 1121 }; 1122 MODULE_DEVICE_TABLE(of, of_cmos_match); 1123 1124 static __init void cmos_of_init(struct platform_device *pdev) 1125 { 1126 struct device_node *node = pdev->dev.of_node; 1127 struct rtc_time time; 1128 int ret; 1129 const __be32 *val; 1130 1131 if (!node) 1132 return; 1133 1134 val = of_get_property(node, "ctrl-reg", NULL); 1135 if (val) 1136 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); 1137 1138 val = of_get_property(node, "freq-reg", NULL); 1139 if (val) 1140 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); 1141 1142 cmos_read_time(&pdev->dev, &time); 1143 ret = rtc_valid_tm(&time); 1144 if (ret) { 1145 struct rtc_time def_time = { 1146 .tm_year = 1, 1147 .tm_mday = 1, 1148 }; 1149 cmos_set_time(&pdev->dev, &def_time); 1150 } 1151 } 1152 #else 1153 static inline void cmos_of_init(struct platform_device *pdev) {} 1154 #endif 1155 /*----------------------------------------------------------------*/ 1156 1157 /* Platform setup should have set up an RTC device, when PNP is 1158 * unavailable ... this could happen even on (older) PCs. 1159 */ 1160 1161 static int __init cmos_platform_probe(struct platform_device *pdev) 1162 { 1163 struct resource *resource; 1164 int irq; 1165 1166 cmos_of_init(pdev); 1167 cmos_wake_setup(&pdev->dev); 1168 1169 if (RTC_IOMAPPED) 1170 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); 1171 else 1172 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1173 irq = platform_get_irq(pdev, 0); 1174 if (irq < 0) 1175 irq = -1; 1176 1177 return cmos_do_probe(&pdev->dev, resource, irq); 1178 } 1179 1180 static int __exit cmos_platform_remove(struct platform_device *pdev) 1181 { 1182 cmos_do_remove(&pdev->dev); 1183 return 0; 1184 } 1185 1186 static void cmos_platform_shutdown(struct platform_device *pdev) 1187 { 1188 struct device *dev = &pdev->dev; 1189 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1190 1191 if (system_state == SYSTEM_POWER_OFF) { 1192 int retval = cmos_poweroff(dev); 1193 1194 if (cmos_aie_poweroff(dev) < 0 && !retval) 1195 return; 1196 } 1197 1198 cmos_do_shutdown(cmos->irq); 1199 } 1200 1201 /* work with hotplug and coldplug */ 1202 MODULE_ALIAS("platform:rtc_cmos"); 1203 1204 static struct platform_driver cmos_platform_driver = { 1205 .remove = __exit_p(cmos_platform_remove), 1206 .shutdown = cmos_platform_shutdown, 1207 .driver = { 1208 .name = driver_name, 1209 #ifdef CONFIG_PM 1210 .pm = &cmos_pm_ops, 1211 #endif 1212 .of_match_table = of_match_ptr(of_cmos_match), 1213 } 1214 }; 1215 1216 #ifdef CONFIG_PNP 1217 static bool pnp_driver_registered; 1218 #endif 1219 static bool platform_driver_registered; 1220 1221 static int __init cmos_init(void) 1222 { 1223 int retval = 0; 1224 1225 #ifdef CONFIG_PNP 1226 retval = pnp_register_driver(&cmos_pnp_driver); 1227 if (retval == 0) 1228 pnp_driver_registered = true; 1229 #endif 1230 1231 if (!cmos_rtc.dev) { 1232 retval = platform_driver_probe(&cmos_platform_driver, 1233 cmos_platform_probe); 1234 if (retval == 0) 1235 platform_driver_registered = true; 1236 } 1237 1238 if (retval == 0) 1239 return 0; 1240 1241 #ifdef CONFIG_PNP 1242 if (pnp_driver_registered) 1243 pnp_unregister_driver(&cmos_pnp_driver); 1244 #endif 1245 return retval; 1246 } 1247 module_init(cmos_init); 1248 1249 static void __exit cmos_exit(void) 1250 { 1251 #ifdef CONFIG_PNP 1252 if (pnp_driver_registered) 1253 pnp_unregister_driver(&cmos_pnp_driver); 1254 #endif 1255 if (platform_driver_registered) 1256 platform_driver_unregister(&cmos_platform_driver); 1257 } 1258 module_exit(cmos_exit); 1259 1260 1261 MODULE_AUTHOR("David Brownell"); 1262 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1263 MODULE_LICENSE("GPL"); 1264