1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 4 * 5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 6 * Copyright (C) 2006 David Brownell (convert to new framework) 7 */ 8 9 /* 10 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 11 * That defined the register interface now provided by all PCs, some 12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 13 * integrate an MC146818 clone in their southbridge, and boards use 14 * that instead of discrete clones like the DS12887 or M48T86. There 15 * are also clones that connect using the LPC bus. 16 * 17 * That register API is also used directly by various other drivers 18 * (notably for integrated NVRAM), infrastructure (x86 has code to 19 * bypass the RTC framework, directly reading the RTC during boot 20 * and updating minutes/seconds for systems using NTP synch) and 21 * utilities (like userspace 'hwclock', if no /dev node exists). 22 * 23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 24 * interrupts disabled, holding the global rtc_lock, to exclude those 25 * other drivers and utilities on correctly configured systems. 26 */ 27 28 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 29 30 #include <linux/kernel.h> 31 #include <linux/module.h> 32 #include <linux/init.h> 33 #include <linux/interrupt.h> 34 #include <linux/spinlock.h> 35 #include <linux/platform_device.h> 36 #include <linux/log2.h> 37 #include <linux/pm.h> 38 #include <linux/of.h> 39 #include <linux/of_platform.h> 40 #ifdef CONFIG_X86 41 #include <asm/i8259.h> 42 #include <asm/processor.h> 43 #include <linux/dmi.h> 44 #endif 45 46 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 47 #include <linux/mc146818rtc.h> 48 49 #ifdef CONFIG_ACPI 50 /* 51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event 52 * 53 * If cleared, ACPI SCI is only used to wake up the system from suspend 54 * 55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup 56 */ 57 58 static bool use_acpi_alarm; 59 module_param(use_acpi_alarm, bool, 0444); 60 61 static inline int cmos_use_acpi_alarm(void) 62 { 63 return use_acpi_alarm; 64 } 65 #else /* !CONFIG_ACPI */ 66 67 static inline int cmos_use_acpi_alarm(void) 68 { 69 return 0; 70 } 71 #endif 72 73 struct cmos_rtc { 74 struct rtc_device *rtc; 75 struct device *dev; 76 int irq; 77 struct resource *iomem; 78 time64_t alarm_expires; 79 80 void (*wake_on)(struct device *); 81 void (*wake_off)(struct device *); 82 83 u8 enabled_wake; 84 u8 suspend_ctrl; 85 86 /* newer hardware extends the original register set */ 87 u8 day_alrm; 88 u8 mon_alrm; 89 u8 century; 90 91 struct rtc_wkalrm saved_wkalrm; 92 }; 93 94 /* both platform and pnp busses use negative numbers for invalid irqs */ 95 #define is_valid_irq(n) ((n) > 0) 96 97 static const char driver_name[] = "rtc_cmos"; 98 99 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 102 */ 103 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 104 105 static inline int is_intr(u8 rtc_intr) 106 { 107 if (!(rtc_intr & RTC_IRQF)) 108 return 0; 109 return rtc_intr & RTC_IRQMASK; 110 } 111 112 /*----------------------------------------------------------------*/ 113 114 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 116 * used in a broken "legacy replacement" mode. The breakage includes 117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 118 * other (better) use. 119 * 120 * When that broken mode is in use, platform glue provides a partial 121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 122 * want to use HPET for anything except those IRQs though... 123 */ 124 #ifdef CONFIG_HPET_EMULATE_RTC 125 #include <asm/hpet.h> 126 #else 127 128 static inline int is_hpet_enabled(void) 129 { 130 return 0; 131 } 132 133 static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 134 { 135 return 0; 136 } 137 138 static inline int hpet_set_rtc_irq_bit(unsigned long mask) 139 { 140 return 0; 141 } 142 143 static inline int 144 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 145 { 146 return 0; 147 } 148 149 static inline int hpet_set_periodic_freq(unsigned long freq) 150 { 151 return 0; 152 } 153 154 static inline int hpet_rtc_dropped_irq(void) 155 { 156 return 0; 157 } 158 159 static inline int hpet_rtc_timer_init(void) 160 { 161 return 0; 162 } 163 164 extern irq_handler_t hpet_rtc_interrupt; 165 166 static inline int hpet_register_irq_handler(irq_handler_t handler) 167 { 168 return 0; 169 } 170 171 static inline int hpet_unregister_irq_handler(irq_handler_t handler) 172 { 173 return 0; 174 } 175 176 #endif 177 178 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */ 179 static inline int use_hpet_alarm(void) 180 { 181 return is_hpet_enabled() && !cmos_use_acpi_alarm(); 182 } 183 184 /*----------------------------------------------------------------*/ 185 186 #ifdef RTC_PORT 187 188 /* Most newer x86 systems have two register banks, the first used 189 * for RTC and NVRAM and the second only for NVRAM. Caller must 190 * own rtc_lock ... and we won't worry about access during NMI. 191 */ 192 #define can_bank2 true 193 194 static inline unsigned char cmos_read_bank2(unsigned char addr) 195 { 196 outb(addr, RTC_PORT(2)); 197 return inb(RTC_PORT(3)); 198 } 199 200 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 201 { 202 outb(addr, RTC_PORT(2)); 203 outb(val, RTC_PORT(3)); 204 } 205 206 #else 207 208 #define can_bank2 false 209 210 static inline unsigned char cmos_read_bank2(unsigned char addr) 211 { 212 return 0; 213 } 214 215 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 216 { 217 } 218 219 #endif 220 221 /*----------------------------------------------------------------*/ 222 223 static int cmos_read_time(struct device *dev, struct rtc_time *t) 224 { 225 /* 226 * If pm_trace abused the RTC for storage, set the timespec to 0, 227 * which tells the caller that this RTC value is unusable. 228 */ 229 if (!pm_trace_rtc_valid()) 230 return -EIO; 231 232 mc146818_get_time(t); 233 return 0; 234 } 235 236 static int cmos_set_time(struct device *dev, struct rtc_time *t) 237 { 238 /* NOTE: this ignores the issue whereby updating the seconds 239 * takes effect exactly 500ms after we write the register. 240 * (Also queueing and other delays before we get this far.) 241 */ 242 return mc146818_set_time(t); 243 } 244 245 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 246 { 247 struct cmos_rtc *cmos = dev_get_drvdata(dev); 248 unsigned char rtc_control; 249 250 /* This not only a rtc_op, but also called directly */ 251 if (!is_valid_irq(cmos->irq)) 252 return -EIO; 253 254 /* Basic alarms only support hour, minute, and seconds fields. 255 * Some also support day and month, for alarms up to a year in 256 * the future. 257 */ 258 259 spin_lock_irq(&rtc_lock); 260 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 261 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); 262 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); 263 264 if (cmos->day_alrm) { 265 /* ignore upper bits on readback per ACPI spec */ 266 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; 267 if (!t->time.tm_mday) 268 t->time.tm_mday = -1; 269 270 if (cmos->mon_alrm) { 271 t->time.tm_mon = CMOS_READ(cmos->mon_alrm); 272 if (!t->time.tm_mon) 273 t->time.tm_mon = -1; 274 } 275 } 276 277 rtc_control = CMOS_READ(RTC_CONTROL); 278 spin_unlock_irq(&rtc_lock); 279 280 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 281 if (((unsigned)t->time.tm_sec) < 0x60) 282 t->time.tm_sec = bcd2bin(t->time.tm_sec); 283 else 284 t->time.tm_sec = -1; 285 if (((unsigned)t->time.tm_min) < 0x60) 286 t->time.tm_min = bcd2bin(t->time.tm_min); 287 else 288 t->time.tm_min = -1; 289 if (((unsigned)t->time.tm_hour) < 0x24) 290 t->time.tm_hour = bcd2bin(t->time.tm_hour); 291 else 292 t->time.tm_hour = -1; 293 294 if (cmos->day_alrm) { 295 if (((unsigned)t->time.tm_mday) <= 0x31) 296 t->time.tm_mday = bcd2bin(t->time.tm_mday); 297 else 298 t->time.tm_mday = -1; 299 300 if (cmos->mon_alrm) { 301 if (((unsigned)t->time.tm_mon) <= 0x12) 302 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 303 else 304 t->time.tm_mon = -1; 305 } 306 } 307 } 308 309 t->enabled = !!(rtc_control & RTC_AIE); 310 t->pending = 0; 311 312 return 0; 313 } 314 315 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 316 { 317 unsigned char rtc_intr; 318 319 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 320 * allegedly some older rtcs need that to handle irqs properly 321 */ 322 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 323 324 if (use_hpet_alarm()) 325 return; 326 327 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 328 if (is_intr(rtc_intr)) 329 rtc_update_irq(cmos->rtc, 1, rtc_intr); 330 } 331 332 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 333 { 334 unsigned char rtc_control; 335 336 /* flush any pending IRQ status, notably for update irqs, 337 * before we enable new IRQs 338 */ 339 rtc_control = CMOS_READ(RTC_CONTROL); 340 cmos_checkintr(cmos, rtc_control); 341 342 rtc_control |= mask; 343 CMOS_WRITE(rtc_control, RTC_CONTROL); 344 if (use_hpet_alarm()) 345 hpet_set_rtc_irq_bit(mask); 346 347 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 348 if (cmos->wake_on) 349 cmos->wake_on(cmos->dev); 350 } 351 352 cmos_checkintr(cmos, rtc_control); 353 } 354 355 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 356 { 357 unsigned char rtc_control; 358 359 rtc_control = CMOS_READ(RTC_CONTROL); 360 rtc_control &= ~mask; 361 CMOS_WRITE(rtc_control, RTC_CONTROL); 362 if (use_hpet_alarm()) 363 hpet_mask_rtc_irq_bit(mask); 364 365 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 366 if (cmos->wake_off) 367 cmos->wake_off(cmos->dev); 368 } 369 370 cmos_checkintr(cmos, rtc_control); 371 } 372 373 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) 374 { 375 struct cmos_rtc *cmos = dev_get_drvdata(dev); 376 struct rtc_time now; 377 378 cmos_read_time(dev, &now); 379 380 if (!cmos->day_alrm) { 381 time64_t t_max_date; 382 time64_t t_alrm; 383 384 t_max_date = rtc_tm_to_time64(&now); 385 t_max_date += 24 * 60 * 60 - 1; 386 t_alrm = rtc_tm_to_time64(&t->time); 387 if (t_alrm > t_max_date) { 388 dev_err(dev, 389 "Alarms can be up to one day in the future\n"); 390 return -EINVAL; 391 } 392 } else if (!cmos->mon_alrm) { 393 struct rtc_time max_date = now; 394 time64_t t_max_date; 395 time64_t t_alrm; 396 int max_mday; 397 398 if (max_date.tm_mon == 11) { 399 max_date.tm_mon = 0; 400 max_date.tm_year += 1; 401 } else { 402 max_date.tm_mon += 1; 403 } 404 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 405 if (max_date.tm_mday > max_mday) 406 max_date.tm_mday = max_mday; 407 408 t_max_date = rtc_tm_to_time64(&max_date); 409 t_max_date -= 1; 410 t_alrm = rtc_tm_to_time64(&t->time); 411 if (t_alrm > t_max_date) { 412 dev_err(dev, 413 "Alarms can be up to one month in the future\n"); 414 return -EINVAL; 415 } 416 } else { 417 struct rtc_time max_date = now; 418 time64_t t_max_date; 419 time64_t t_alrm; 420 int max_mday; 421 422 max_date.tm_year += 1; 423 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 424 if (max_date.tm_mday > max_mday) 425 max_date.tm_mday = max_mday; 426 427 t_max_date = rtc_tm_to_time64(&max_date); 428 t_max_date -= 1; 429 t_alrm = rtc_tm_to_time64(&t->time); 430 if (t_alrm > t_max_date) { 431 dev_err(dev, 432 "Alarms can be up to one year in the future\n"); 433 return -EINVAL; 434 } 435 } 436 437 return 0; 438 } 439 440 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 441 { 442 struct cmos_rtc *cmos = dev_get_drvdata(dev); 443 unsigned char mon, mday, hrs, min, sec, rtc_control; 444 int ret; 445 446 /* This not only a rtc_op, but also called directly */ 447 if (!is_valid_irq(cmos->irq)) 448 return -EIO; 449 450 ret = cmos_validate_alarm(dev, t); 451 if (ret < 0) 452 return ret; 453 454 mon = t->time.tm_mon + 1; 455 mday = t->time.tm_mday; 456 hrs = t->time.tm_hour; 457 min = t->time.tm_min; 458 sec = t->time.tm_sec; 459 460 rtc_control = CMOS_READ(RTC_CONTROL); 461 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 462 /* Writing 0xff means "don't care" or "match all". */ 463 mon = (mon <= 12) ? bin2bcd(mon) : 0xff; 464 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; 465 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; 466 min = (min < 60) ? bin2bcd(min) : 0xff; 467 sec = (sec < 60) ? bin2bcd(sec) : 0xff; 468 } 469 470 spin_lock_irq(&rtc_lock); 471 472 /* next rtc irq must not be from previous alarm setting */ 473 cmos_irq_disable(cmos, RTC_AIE); 474 475 /* update alarm */ 476 CMOS_WRITE(hrs, RTC_HOURS_ALARM); 477 CMOS_WRITE(min, RTC_MINUTES_ALARM); 478 CMOS_WRITE(sec, RTC_SECONDS_ALARM); 479 480 /* the system may support an "enhanced" alarm */ 481 if (cmos->day_alrm) { 482 CMOS_WRITE(mday, cmos->day_alrm); 483 if (cmos->mon_alrm) 484 CMOS_WRITE(mon, cmos->mon_alrm); 485 } 486 487 if (use_hpet_alarm()) { 488 /* 489 * FIXME the HPET alarm glue currently ignores day_alrm 490 * and mon_alrm ... 491 */ 492 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, 493 t->time.tm_sec); 494 } 495 496 if (t->enabled) 497 cmos_irq_enable(cmos, RTC_AIE); 498 499 spin_unlock_irq(&rtc_lock); 500 501 cmos->alarm_expires = rtc_tm_to_time64(&t->time); 502 503 return 0; 504 } 505 506 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 507 { 508 struct cmos_rtc *cmos = dev_get_drvdata(dev); 509 unsigned long flags; 510 511 spin_lock_irqsave(&rtc_lock, flags); 512 513 if (enabled) 514 cmos_irq_enable(cmos, RTC_AIE); 515 else 516 cmos_irq_disable(cmos, RTC_AIE); 517 518 spin_unlock_irqrestore(&rtc_lock, flags); 519 return 0; 520 } 521 522 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 523 524 static int cmos_procfs(struct device *dev, struct seq_file *seq) 525 { 526 struct cmos_rtc *cmos = dev_get_drvdata(dev); 527 unsigned char rtc_control, valid; 528 529 spin_lock_irq(&rtc_lock); 530 rtc_control = CMOS_READ(RTC_CONTROL); 531 valid = CMOS_READ(RTC_VALID); 532 spin_unlock_irq(&rtc_lock); 533 534 /* NOTE: at least ICH6 reports battery status using a different 535 * (non-RTC) bit; and SQWE is ignored on many current systems. 536 */ 537 seq_printf(seq, 538 "periodic_IRQ\t: %s\n" 539 "update_IRQ\t: %s\n" 540 "HPET_emulated\t: %s\n" 541 // "square_wave\t: %s\n" 542 "BCD\t\t: %s\n" 543 "DST_enable\t: %s\n" 544 "periodic_freq\t: %d\n" 545 "batt_status\t: %s\n", 546 (rtc_control & RTC_PIE) ? "yes" : "no", 547 (rtc_control & RTC_UIE) ? "yes" : "no", 548 use_hpet_alarm() ? "yes" : "no", 549 // (rtc_control & RTC_SQWE) ? "yes" : "no", 550 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 551 (rtc_control & RTC_DST_EN) ? "yes" : "no", 552 cmos->rtc->irq_freq, 553 (valid & RTC_VRT) ? "okay" : "dead"); 554 555 return 0; 556 } 557 558 #else 559 #define cmos_procfs NULL 560 #endif 561 562 static const struct rtc_class_ops cmos_rtc_ops = { 563 .read_time = cmos_read_time, 564 .set_time = cmos_set_time, 565 .read_alarm = cmos_read_alarm, 566 .set_alarm = cmos_set_alarm, 567 .proc = cmos_procfs, 568 .alarm_irq_enable = cmos_alarm_irq_enable, 569 }; 570 571 /*----------------------------------------------------------------*/ 572 573 /* 574 * All these chips have at least 64 bytes of address space, shared by 575 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 576 * by boot firmware. Modern chips have 128 or 256 bytes. 577 */ 578 579 #define NVRAM_OFFSET (RTC_REG_D + 1) 580 581 static int cmos_nvram_read(void *priv, unsigned int off, void *val, 582 size_t count) 583 { 584 unsigned char *buf = val; 585 int retval; 586 587 off += NVRAM_OFFSET; 588 spin_lock_irq(&rtc_lock); 589 for (retval = 0; count; count--, off++, retval++) { 590 if (off < 128) 591 *buf++ = CMOS_READ(off); 592 else if (can_bank2) 593 *buf++ = cmos_read_bank2(off); 594 else 595 break; 596 } 597 spin_unlock_irq(&rtc_lock); 598 599 return retval; 600 } 601 602 static int cmos_nvram_write(void *priv, unsigned int off, void *val, 603 size_t count) 604 { 605 struct cmos_rtc *cmos = priv; 606 unsigned char *buf = val; 607 int retval; 608 609 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 610 * checksum on part of the NVRAM data. That's currently ignored 611 * here. If userspace is smart enough to know what fields of 612 * NVRAM to update, updating checksums is also part of its job. 613 */ 614 off += NVRAM_OFFSET; 615 spin_lock_irq(&rtc_lock); 616 for (retval = 0; count; count--, off++, retval++) { 617 /* don't trash RTC registers */ 618 if (off == cmos->day_alrm 619 || off == cmos->mon_alrm 620 || off == cmos->century) 621 buf++; 622 else if (off < 128) 623 CMOS_WRITE(*buf++, off); 624 else if (can_bank2) 625 cmos_write_bank2(*buf++, off); 626 else 627 break; 628 } 629 spin_unlock_irq(&rtc_lock); 630 631 return retval; 632 } 633 634 /*----------------------------------------------------------------*/ 635 636 static struct cmos_rtc cmos_rtc; 637 638 static irqreturn_t cmos_interrupt(int irq, void *p) 639 { 640 u8 irqstat; 641 u8 rtc_control; 642 643 spin_lock(&rtc_lock); 644 645 /* When the HPET interrupt handler calls us, the interrupt 646 * status is passed as arg1 instead of the irq number. But 647 * always clear irq status, even when HPET is in the way. 648 * 649 * Note that HPET and RTC are almost certainly out of phase, 650 * giving different IRQ status ... 651 */ 652 irqstat = CMOS_READ(RTC_INTR_FLAGS); 653 rtc_control = CMOS_READ(RTC_CONTROL); 654 if (use_hpet_alarm()) 655 irqstat = (unsigned long)irq & 0xF0; 656 657 /* If we were suspended, RTC_CONTROL may not be accurate since the 658 * bios may have cleared it. 659 */ 660 if (!cmos_rtc.suspend_ctrl) 661 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 662 else 663 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; 664 665 /* All Linux RTC alarms should be treated as if they were oneshot. 666 * Similar code may be needed in system wakeup paths, in case the 667 * alarm woke the system. 668 */ 669 if (irqstat & RTC_AIE) { 670 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 671 rtc_control &= ~RTC_AIE; 672 CMOS_WRITE(rtc_control, RTC_CONTROL); 673 if (use_hpet_alarm()) 674 hpet_mask_rtc_irq_bit(RTC_AIE); 675 CMOS_READ(RTC_INTR_FLAGS); 676 } 677 spin_unlock(&rtc_lock); 678 679 if (is_intr(irqstat)) { 680 rtc_update_irq(p, 1, irqstat); 681 return IRQ_HANDLED; 682 } else 683 return IRQ_NONE; 684 } 685 686 #ifdef CONFIG_PNP 687 #define INITSECTION 688 689 #else 690 #define INITSECTION __init 691 #endif 692 693 static int INITSECTION 694 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 695 { 696 struct cmos_rtc_board_info *info = dev_get_platdata(dev); 697 int retval = 0; 698 unsigned char rtc_control; 699 unsigned address_space; 700 u32 flags = 0; 701 struct nvmem_config nvmem_cfg = { 702 .name = "cmos_nvram", 703 .word_size = 1, 704 .stride = 1, 705 .reg_read = cmos_nvram_read, 706 .reg_write = cmos_nvram_write, 707 .priv = &cmos_rtc, 708 }; 709 710 /* there can be only one ... */ 711 if (cmos_rtc.dev) 712 return -EBUSY; 713 714 if (!ports) 715 return -ENODEV; 716 717 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 718 * 719 * REVISIT non-x86 systems may instead use memory space resources 720 * (needing ioremap etc), not i/o space resources like this ... 721 */ 722 if (RTC_IOMAPPED) 723 ports = request_region(ports->start, resource_size(ports), 724 driver_name); 725 else 726 ports = request_mem_region(ports->start, resource_size(ports), 727 driver_name); 728 if (!ports) { 729 dev_dbg(dev, "i/o registers already in use\n"); 730 return -EBUSY; 731 } 732 733 cmos_rtc.irq = rtc_irq; 734 cmos_rtc.iomem = ports; 735 736 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 737 * driver did, but don't reject unknown configs. Old hardware 738 * won't address 128 bytes. Newer chips have multiple banks, 739 * though they may not be listed in one I/O resource. 740 */ 741 #if defined(CONFIG_ATARI) 742 address_space = 64; 743 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 744 || defined(__sparc__) || defined(__mips__) \ 745 || defined(__powerpc__) 746 address_space = 128; 747 #else 748 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 749 address_space = 128; 750 #endif 751 if (can_bank2 && ports->end > (ports->start + 1)) 752 address_space = 256; 753 754 /* For ACPI systems extension info comes from the FADT. On others, 755 * board specific setup provides it as appropriate. Systems where 756 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 757 * some almost-clones) can provide hooks to make that behave. 758 * 759 * Note that ACPI doesn't preclude putting these registers into 760 * "extended" areas of the chip, including some that we won't yet 761 * expect CMOS_READ and friends to handle. 762 */ 763 if (info) { 764 if (info->flags) 765 flags = info->flags; 766 if (info->address_space) 767 address_space = info->address_space; 768 769 if (info->rtc_day_alarm && info->rtc_day_alarm < 128) 770 cmos_rtc.day_alrm = info->rtc_day_alarm; 771 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) 772 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 773 if (info->rtc_century && info->rtc_century < 128) 774 cmos_rtc.century = info->rtc_century; 775 776 if (info->wake_on && info->wake_off) { 777 cmos_rtc.wake_on = info->wake_on; 778 cmos_rtc.wake_off = info->wake_off; 779 } 780 } 781 782 cmos_rtc.dev = dev; 783 dev_set_drvdata(dev, &cmos_rtc); 784 785 cmos_rtc.rtc = devm_rtc_allocate_device(dev); 786 if (IS_ERR(cmos_rtc.rtc)) { 787 retval = PTR_ERR(cmos_rtc.rtc); 788 goto cleanup0; 789 } 790 791 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 792 793 spin_lock_irq(&rtc_lock); 794 795 /* Ensure that the RTC is accessible. Bit 6 must be 0! */ 796 if ((CMOS_READ(RTC_VALID) & 0x40) != 0) { 797 spin_unlock_irq(&rtc_lock); 798 dev_warn(dev, "not accessible\n"); 799 retval = -ENXIO; 800 goto cleanup1; 801 } 802 803 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { 804 /* force periodic irq to CMOS reset default of 1024Hz; 805 * 806 * REVISIT it's been reported that at least one x86_64 ALI 807 * mobo doesn't use 32KHz here ... for portability we might 808 * need to do something about other clock frequencies. 809 */ 810 cmos_rtc.rtc->irq_freq = 1024; 811 if (use_hpet_alarm()) 812 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 813 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 814 } 815 816 /* disable irqs */ 817 if (is_valid_irq(rtc_irq)) 818 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 819 820 rtc_control = CMOS_READ(RTC_CONTROL); 821 822 spin_unlock_irq(&rtc_lock); 823 824 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 825 dev_warn(dev, "only 24-hr supported\n"); 826 retval = -ENXIO; 827 goto cleanup1; 828 } 829 830 if (use_hpet_alarm()) 831 hpet_rtc_timer_init(); 832 833 if (is_valid_irq(rtc_irq)) { 834 irq_handler_t rtc_cmos_int_handler; 835 836 if (use_hpet_alarm()) { 837 rtc_cmos_int_handler = hpet_rtc_interrupt; 838 retval = hpet_register_irq_handler(cmos_interrupt); 839 if (retval) { 840 hpet_mask_rtc_irq_bit(RTC_IRQMASK); 841 dev_warn(dev, "hpet_register_irq_handler " 842 " failed in rtc_init()."); 843 goto cleanup1; 844 } 845 } else 846 rtc_cmos_int_handler = cmos_interrupt; 847 848 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 849 0, dev_name(&cmos_rtc.rtc->dev), 850 cmos_rtc.rtc); 851 if (retval < 0) { 852 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 853 goto cleanup1; 854 } 855 } else { 856 clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features); 857 } 858 859 cmos_rtc.rtc->ops = &cmos_rtc_ops; 860 861 retval = devm_rtc_register_device(cmos_rtc.rtc); 862 if (retval) 863 goto cleanup2; 864 865 /* Set the sync offset for the periodic 11min update correct */ 866 cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2; 867 868 /* export at least the first block of NVRAM */ 869 nvmem_cfg.size = address_space - NVRAM_OFFSET; 870 devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg); 871 872 dev_info(dev, "%s%s, %d bytes nvram%s\n", 873 !is_valid_irq(rtc_irq) ? "no alarms" : 874 cmos_rtc.mon_alrm ? "alarms up to one year" : 875 cmos_rtc.day_alrm ? "alarms up to one month" : 876 "alarms up to one day", 877 cmos_rtc.century ? ", y3k" : "", 878 nvmem_cfg.size, 879 use_hpet_alarm() ? ", hpet irqs" : ""); 880 881 return 0; 882 883 cleanup2: 884 if (is_valid_irq(rtc_irq)) 885 free_irq(rtc_irq, cmos_rtc.rtc); 886 cleanup1: 887 cmos_rtc.dev = NULL; 888 cleanup0: 889 if (RTC_IOMAPPED) 890 release_region(ports->start, resource_size(ports)); 891 else 892 release_mem_region(ports->start, resource_size(ports)); 893 return retval; 894 } 895 896 static void cmos_do_shutdown(int rtc_irq) 897 { 898 spin_lock_irq(&rtc_lock); 899 if (is_valid_irq(rtc_irq)) 900 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 901 spin_unlock_irq(&rtc_lock); 902 } 903 904 static void cmos_do_remove(struct device *dev) 905 { 906 struct cmos_rtc *cmos = dev_get_drvdata(dev); 907 struct resource *ports; 908 909 cmos_do_shutdown(cmos->irq); 910 911 if (is_valid_irq(cmos->irq)) { 912 free_irq(cmos->irq, cmos->rtc); 913 if (use_hpet_alarm()) 914 hpet_unregister_irq_handler(cmos_interrupt); 915 } 916 917 cmos->rtc = NULL; 918 919 ports = cmos->iomem; 920 if (RTC_IOMAPPED) 921 release_region(ports->start, resource_size(ports)); 922 else 923 release_mem_region(ports->start, resource_size(ports)); 924 cmos->iomem = NULL; 925 926 cmos->dev = NULL; 927 } 928 929 static int cmos_aie_poweroff(struct device *dev) 930 { 931 struct cmos_rtc *cmos = dev_get_drvdata(dev); 932 struct rtc_time now; 933 time64_t t_now; 934 int retval = 0; 935 unsigned char rtc_control; 936 937 if (!cmos->alarm_expires) 938 return -EINVAL; 939 940 spin_lock_irq(&rtc_lock); 941 rtc_control = CMOS_READ(RTC_CONTROL); 942 spin_unlock_irq(&rtc_lock); 943 944 /* We only care about the situation where AIE is disabled. */ 945 if (rtc_control & RTC_AIE) 946 return -EBUSY; 947 948 cmos_read_time(dev, &now); 949 t_now = rtc_tm_to_time64(&now); 950 951 /* 952 * When enabling "RTC wake-up" in BIOS setup, the machine reboots 953 * automatically right after shutdown on some buggy boxes. 954 * This automatic rebooting issue won't happen when the alarm 955 * time is larger than now+1 seconds. 956 * 957 * If the alarm time is equal to now+1 seconds, the issue can be 958 * prevented by cancelling the alarm. 959 */ 960 if (cmos->alarm_expires == t_now + 1) { 961 struct rtc_wkalrm alarm; 962 963 /* Cancel the AIE timer by configuring the past time. */ 964 rtc_time64_to_tm(t_now - 1, &alarm.time); 965 alarm.enabled = 0; 966 retval = cmos_set_alarm(dev, &alarm); 967 } else if (cmos->alarm_expires > t_now + 1) { 968 retval = -EBUSY; 969 } 970 971 return retval; 972 } 973 974 static int cmos_suspend(struct device *dev) 975 { 976 struct cmos_rtc *cmos = dev_get_drvdata(dev); 977 unsigned char tmp; 978 979 /* only the alarm might be a wakeup event source */ 980 spin_lock_irq(&rtc_lock); 981 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 982 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 983 unsigned char mask; 984 985 if (device_may_wakeup(dev)) 986 mask = RTC_IRQMASK & ~RTC_AIE; 987 else 988 mask = RTC_IRQMASK; 989 tmp &= ~mask; 990 CMOS_WRITE(tmp, RTC_CONTROL); 991 if (use_hpet_alarm()) 992 hpet_mask_rtc_irq_bit(mask); 993 cmos_checkintr(cmos, tmp); 994 } 995 spin_unlock_irq(&rtc_lock); 996 997 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) { 998 cmos->enabled_wake = 1; 999 if (cmos->wake_on) 1000 cmos->wake_on(dev); 1001 else 1002 enable_irq_wake(cmos->irq); 1003 } 1004 1005 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm)); 1006 cmos_read_alarm(dev, &cmos->saved_wkalrm); 1007 1008 dev_dbg(dev, "suspend%s, ctrl %02x\n", 1009 (tmp & RTC_AIE) ? ", alarm may wake" : "", 1010 tmp); 1011 1012 return 0; 1013 } 1014 1015 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 1016 * after a detour through G3 "mechanical off", although the ACPI spec 1017 * says wakeup should only work from G1/S4 "hibernate". To most users, 1018 * distinctions between S4 and S5 are pointless. So when the hardware 1019 * allows, don't draw that distinction. 1020 */ 1021 static inline int cmos_poweroff(struct device *dev) 1022 { 1023 if (!IS_ENABLED(CONFIG_PM)) 1024 return -ENOSYS; 1025 1026 return cmos_suspend(dev); 1027 } 1028 1029 static void cmos_check_wkalrm(struct device *dev) 1030 { 1031 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1032 struct rtc_wkalrm current_alarm; 1033 time64_t t_now; 1034 time64_t t_current_expires; 1035 time64_t t_saved_expires; 1036 struct rtc_time now; 1037 1038 /* Check if we have RTC Alarm armed */ 1039 if (!(cmos->suspend_ctrl & RTC_AIE)) 1040 return; 1041 1042 cmos_read_time(dev, &now); 1043 t_now = rtc_tm_to_time64(&now); 1044 1045 /* 1046 * ACPI RTC wake event is cleared after resume from STR, 1047 * ACK the rtc irq here 1048 */ 1049 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) { 1050 local_irq_disable(); 1051 cmos_interrupt(0, (void *)cmos->rtc); 1052 local_irq_enable(); 1053 return; 1054 } 1055 1056 memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm)); 1057 cmos_read_alarm(dev, ¤t_alarm); 1058 t_current_expires = rtc_tm_to_time64(¤t_alarm.time); 1059 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); 1060 if (t_current_expires != t_saved_expires || 1061 cmos->saved_wkalrm.enabled != current_alarm.enabled) { 1062 cmos_set_alarm(dev, &cmos->saved_wkalrm); 1063 } 1064 } 1065 1066 static void cmos_check_acpi_rtc_status(struct device *dev, 1067 unsigned char *rtc_control); 1068 1069 static int __maybe_unused cmos_resume(struct device *dev) 1070 { 1071 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1072 unsigned char tmp; 1073 1074 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) { 1075 if (cmos->wake_off) 1076 cmos->wake_off(dev); 1077 else 1078 disable_irq_wake(cmos->irq); 1079 cmos->enabled_wake = 0; 1080 } 1081 1082 /* The BIOS might have changed the alarm, restore it */ 1083 cmos_check_wkalrm(dev); 1084 1085 spin_lock_irq(&rtc_lock); 1086 tmp = cmos->suspend_ctrl; 1087 cmos->suspend_ctrl = 0; 1088 /* re-enable any irqs previously active */ 1089 if (tmp & RTC_IRQMASK) { 1090 unsigned char mask; 1091 1092 if (device_may_wakeup(dev) && use_hpet_alarm()) 1093 hpet_rtc_timer_init(); 1094 1095 do { 1096 CMOS_WRITE(tmp, RTC_CONTROL); 1097 if (use_hpet_alarm()) 1098 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 1099 1100 mask = CMOS_READ(RTC_INTR_FLAGS); 1101 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 1102 if (!use_hpet_alarm() || !is_intr(mask)) 1103 break; 1104 1105 /* force one-shot behavior if HPET blocked 1106 * the wake alarm's irq 1107 */ 1108 rtc_update_irq(cmos->rtc, 1, mask); 1109 tmp &= ~RTC_AIE; 1110 hpet_mask_rtc_irq_bit(RTC_AIE); 1111 } while (mask & RTC_AIE); 1112 1113 if (tmp & RTC_AIE) 1114 cmos_check_acpi_rtc_status(dev, &tmp); 1115 } 1116 spin_unlock_irq(&rtc_lock); 1117 1118 dev_dbg(dev, "resume, ctrl %02x\n", tmp); 1119 1120 return 0; 1121 } 1122 1123 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 1124 1125 /*----------------------------------------------------------------*/ 1126 1127 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 1128 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 1129 * probably list them in similar PNPBIOS tables; so PNP is more common. 1130 * 1131 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 1132 * predate even PNPBIOS should set up platform_bus devices. 1133 */ 1134 1135 #ifdef CONFIG_ACPI 1136 1137 #include <linux/acpi.h> 1138 1139 static u32 rtc_handler(void *context) 1140 { 1141 struct device *dev = context; 1142 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1143 unsigned char rtc_control = 0; 1144 unsigned char rtc_intr; 1145 unsigned long flags; 1146 1147 1148 /* 1149 * Always update rtc irq when ACPI is used as RTC Alarm. 1150 * Or else, ACPI SCI is enabled during suspend/resume only, 1151 * update rtc irq in that case. 1152 */ 1153 if (cmos_use_acpi_alarm()) 1154 cmos_interrupt(0, (void *)cmos->rtc); 1155 else { 1156 /* Fix me: can we use cmos_interrupt() here as well? */ 1157 spin_lock_irqsave(&rtc_lock, flags); 1158 if (cmos_rtc.suspend_ctrl) 1159 rtc_control = CMOS_READ(RTC_CONTROL); 1160 if (rtc_control & RTC_AIE) { 1161 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 1162 CMOS_WRITE(rtc_control, RTC_CONTROL); 1163 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 1164 rtc_update_irq(cmos->rtc, 1, rtc_intr); 1165 } 1166 spin_unlock_irqrestore(&rtc_lock, flags); 1167 } 1168 1169 pm_wakeup_hard_event(dev); 1170 acpi_clear_event(ACPI_EVENT_RTC); 1171 acpi_disable_event(ACPI_EVENT_RTC, 0); 1172 return ACPI_INTERRUPT_HANDLED; 1173 } 1174 1175 static inline void rtc_wake_setup(struct device *dev) 1176 { 1177 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 1178 /* 1179 * After the RTC handler is installed, the Fixed_RTC event should 1180 * be disabled. Only when the RTC alarm is set will it be enabled. 1181 */ 1182 acpi_clear_event(ACPI_EVENT_RTC); 1183 acpi_disable_event(ACPI_EVENT_RTC, 0); 1184 } 1185 1186 static void rtc_wake_on(struct device *dev) 1187 { 1188 acpi_clear_event(ACPI_EVENT_RTC); 1189 acpi_enable_event(ACPI_EVENT_RTC, 0); 1190 } 1191 1192 static void rtc_wake_off(struct device *dev) 1193 { 1194 acpi_disable_event(ACPI_EVENT_RTC, 0); 1195 } 1196 1197 #ifdef CONFIG_X86 1198 /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */ 1199 static void use_acpi_alarm_quirks(void) 1200 { 1201 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 1202 return; 1203 1204 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) 1205 return; 1206 1207 if (!is_hpet_enabled()) 1208 return; 1209 1210 if (dmi_get_bios_year() < 2015) 1211 return; 1212 1213 use_acpi_alarm = true; 1214 } 1215 #else 1216 static inline void use_acpi_alarm_quirks(void) { } 1217 #endif 1218 1219 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find 1220 * its device node and pass extra config data. This helps its driver use 1221 * capabilities that the now-obsolete mc146818 didn't have, and informs it 1222 * that this board's RTC is wakeup-capable (per ACPI spec). 1223 */ 1224 static struct cmos_rtc_board_info acpi_rtc_info; 1225 1226 static void cmos_wake_setup(struct device *dev) 1227 { 1228 if (acpi_disabled) 1229 return; 1230 1231 use_acpi_alarm_quirks(); 1232 1233 rtc_wake_setup(dev); 1234 acpi_rtc_info.wake_on = rtc_wake_on; 1235 acpi_rtc_info.wake_off = rtc_wake_off; 1236 1237 /* workaround bug in some ACPI tables */ 1238 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 1239 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 1240 acpi_gbl_FADT.month_alarm); 1241 acpi_gbl_FADT.month_alarm = 0; 1242 } 1243 1244 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; 1245 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; 1246 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; 1247 1248 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ 1249 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 1250 dev_info(dev, "RTC can wake from S4\n"); 1251 1252 dev->platform_data = &acpi_rtc_info; 1253 1254 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 1255 device_init_wakeup(dev, 1); 1256 } 1257 1258 static void cmos_check_acpi_rtc_status(struct device *dev, 1259 unsigned char *rtc_control) 1260 { 1261 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1262 acpi_event_status rtc_status; 1263 acpi_status status; 1264 1265 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 1266 return; 1267 1268 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 1269 if (ACPI_FAILURE(status)) { 1270 dev_err(dev, "Could not get RTC status\n"); 1271 } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 1272 unsigned char mask; 1273 *rtc_control &= ~RTC_AIE; 1274 CMOS_WRITE(*rtc_control, RTC_CONTROL); 1275 mask = CMOS_READ(RTC_INTR_FLAGS); 1276 rtc_update_irq(cmos->rtc, 1, mask); 1277 } 1278 } 1279 1280 #else 1281 1282 static void cmos_wake_setup(struct device *dev) 1283 { 1284 } 1285 1286 static void cmos_check_acpi_rtc_status(struct device *dev, 1287 unsigned char *rtc_control) 1288 { 1289 } 1290 1291 #endif 1292 1293 #ifdef CONFIG_PNP 1294 1295 #include <linux/pnp.h> 1296 1297 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1298 { 1299 cmos_wake_setup(&pnp->dev); 1300 1301 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { 1302 unsigned int irq = 0; 1303 #ifdef CONFIG_X86 1304 /* Some machines contain a PNP entry for the RTC, but 1305 * don't define the IRQ. It should always be safe to 1306 * hardcode it on systems with a legacy PIC. 1307 */ 1308 if (nr_legacy_irqs()) 1309 irq = RTC_IRQ; 1310 #endif 1311 return cmos_do_probe(&pnp->dev, 1312 pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1313 } else { 1314 return cmos_do_probe(&pnp->dev, 1315 pnp_get_resource(pnp, IORESOURCE_IO, 0), 1316 pnp_irq(pnp, 0)); 1317 } 1318 } 1319 1320 static void cmos_pnp_remove(struct pnp_dev *pnp) 1321 { 1322 cmos_do_remove(&pnp->dev); 1323 } 1324 1325 static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1326 { 1327 struct device *dev = &pnp->dev; 1328 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1329 1330 if (system_state == SYSTEM_POWER_OFF) { 1331 int retval = cmos_poweroff(dev); 1332 1333 if (cmos_aie_poweroff(dev) < 0 && !retval) 1334 return; 1335 } 1336 1337 cmos_do_shutdown(cmos->irq); 1338 } 1339 1340 static const struct pnp_device_id rtc_ids[] = { 1341 { .id = "PNP0b00", }, 1342 { .id = "PNP0b01", }, 1343 { .id = "PNP0b02", }, 1344 { }, 1345 }; 1346 MODULE_DEVICE_TABLE(pnp, rtc_ids); 1347 1348 static struct pnp_driver cmos_pnp_driver = { 1349 .name = driver_name, 1350 .id_table = rtc_ids, 1351 .probe = cmos_pnp_probe, 1352 .remove = cmos_pnp_remove, 1353 .shutdown = cmos_pnp_shutdown, 1354 1355 /* flag ensures resume() gets called, and stops syslog spam */ 1356 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1357 .driver = { 1358 .pm = &cmos_pm_ops, 1359 }, 1360 }; 1361 1362 #endif /* CONFIG_PNP */ 1363 1364 #ifdef CONFIG_OF 1365 static const struct of_device_id of_cmos_match[] = { 1366 { 1367 .compatible = "motorola,mc146818", 1368 }, 1369 { }, 1370 }; 1371 MODULE_DEVICE_TABLE(of, of_cmos_match); 1372 1373 static __init void cmos_of_init(struct platform_device *pdev) 1374 { 1375 struct device_node *node = pdev->dev.of_node; 1376 const __be32 *val; 1377 1378 if (!node) 1379 return; 1380 1381 val = of_get_property(node, "ctrl-reg", NULL); 1382 if (val) 1383 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); 1384 1385 val = of_get_property(node, "freq-reg", NULL); 1386 if (val) 1387 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); 1388 } 1389 #else 1390 static inline void cmos_of_init(struct platform_device *pdev) {} 1391 #endif 1392 /*----------------------------------------------------------------*/ 1393 1394 /* Platform setup should have set up an RTC device, when PNP is 1395 * unavailable ... this could happen even on (older) PCs. 1396 */ 1397 1398 static int __init cmos_platform_probe(struct platform_device *pdev) 1399 { 1400 struct resource *resource; 1401 int irq; 1402 1403 cmos_of_init(pdev); 1404 cmos_wake_setup(&pdev->dev); 1405 1406 if (RTC_IOMAPPED) 1407 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); 1408 else 1409 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1410 irq = platform_get_irq(pdev, 0); 1411 if (irq < 0) 1412 irq = -1; 1413 1414 return cmos_do_probe(&pdev->dev, resource, irq); 1415 } 1416 1417 static int cmos_platform_remove(struct platform_device *pdev) 1418 { 1419 cmos_do_remove(&pdev->dev); 1420 return 0; 1421 } 1422 1423 static void cmos_platform_shutdown(struct platform_device *pdev) 1424 { 1425 struct device *dev = &pdev->dev; 1426 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1427 1428 if (system_state == SYSTEM_POWER_OFF) { 1429 int retval = cmos_poweroff(dev); 1430 1431 if (cmos_aie_poweroff(dev) < 0 && !retval) 1432 return; 1433 } 1434 1435 cmos_do_shutdown(cmos->irq); 1436 } 1437 1438 /* work with hotplug and coldplug */ 1439 MODULE_ALIAS("platform:rtc_cmos"); 1440 1441 static struct platform_driver cmos_platform_driver = { 1442 .remove = cmos_platform_remove, 1443 .shutdown = cmos_platform_shutdown, 1444 .driver = { 1445 .name = driver_name, 1446 .pm = &cmos_pm_ops, 1447 .of_match_table = of_match_ptr(of_cmos_match), 1448 } 1449 }; 1450 1451 #ifdef CONFIG_PNP 1452 static bool pnp_driver_registered; 1453 #endif 1454 static bool platform_driver_registered; 1455 1456 static int __init cmos_init(void) 1457 { 1458 int retval = 0; 1459 1460 #ifdef CONFIG_PNP 1461 retval = pnp_register_driver(&cmos_pnp_driver); 1462 if (retval == 0) 1463 pnp_driver_registered = true; 1464 #endif 1465 1466 if (!cmos_rtc.dev) { 1467 retval = platform_driver_probe(&cmos_platform_driver, 1468 cmos_platform_probe); 1469 if (retval == 0) 1470 platform_driver_registered = true; 1471 } 1472 1473 if (retval == 0) 1474 return 0; 1475 1476 #ifdef CONFIG_PNP 1477 if (pnp_driver_registered) 1478 pnp_unregister_driver(&cmos_pnp_driver); 1479 #endif 1480 return retval; 1481 } 1482 module_init(cmos_init); 1483 1484 static void __exit cmos_exit(void) 1485 { 1486 #ifdef CONFIG_PNP 1487 if (pnp_driver_registered) 1488 pnp_unregister_driver(&cmos_pnp_driver); 1489 #endif 1490 if (platform_driver_registered) 1491 platform_driver_unregister(&cmos_platform_driver); 1492 } 1493 module_exit(cmos_exit); 1494 1495 1496 MODULE_AUTHOR("David Brownell"); 1497 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1498 MODULE_LICENSE("GPL"); 1499