1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * A driver for the I2C members of the Abracon AB x8xx RTC family, 4 * and compatible: AB 1805 and AB 0805 5 * 6 * Copyright 2014-2015 Macq S.A. 7 * 8 * Author: Philippe De Muyter <phdm@macqel.be> 9 * Author: Alexandre Belloni <alexandre.belloni@bootlin.com> 10 * 11 */ 12 13 #include <linux/bcd.h> 14 #include <linux/bitfield.h> 15 #include <linux/i2c.h> 16 #include <linux/kstrtox.h> 17 #include <linux/module.h> 18 #include <linux/of_device.h> 19 #include <linux/rtc.h> 20 #include <linux/watchdog.h> 21 22 #define ABX8XX_REG_HTH 0x00 23 #define ABX8XX_REG_SC 0x01 24 #define ABX8XX_REG_MN 0x02 25 #define ABX8XX_REG_HR 0x03 26 #define ABX8XX_REG_DA 0x04 27 #define ABX8XX_REG_MO 0x05 28 #define ABX8XX_REG_YR 0x06 29 #define ABX8XX_REG_WD 0x07 30 31 #define ABX8XX_REG_AHTH 0x08 32 #define ABX8XX_REG_ASC 0x09 33 #define ABX8XX_REG_AMN 0x0a 34 #define ABX8XX_REG_AHR 0x0b 35 #define ABX8XX_REG_ADA 0x0c 36 #define ABX8XX_REG_AMO 0x0d 37 #define ABX8XX_REG_AWD 0x0e 38 39 #define ABX8XX_REG_STATUS 0x0f 40 #define ABX8XX_STATUS_AF BIT(2) 41 #define ABX8XX_STATUS_BLF BIT(4) 42 #define ABX8XX_STATUS_WDT BIT(6) 43 44 #define ABX8XX_REG_CTRL1 0x10 45 #define ABX8XX_CTRL_WRITE BIT(0) 46 #define ABX8XX_CTRL_ARST BIT(2) 47 #define ABX8XX_CTRL_12_24 BIT(6) 48 49 #define ABX8XX_REG_CTRL2 0x11 50 #define ABX8XX_CTRL2_RSVD BIT(5) 51 52 #define ABX8XX_REG_IRQ 0x12 53 #define ABX8XX_IRQ_AIE BIT(2) 54 #define ABX8XX_IRQ_IM_1_4 (0x3 << 5) 55 56 #define ABX8XX_REG_CD_TIMER_CTL 0x18 57 58 #define ABX8XX_REG_OSC 0x1c 59 #define ABX8XX_OSC_FOS BIT(3) 60 #define ABX8XX_OSC_BOS BIT(4) 61 #define ABX8XX_OSC_ACAL_512 BIT(5) 62 #define ABX8XX_OSC_ACAL_1024 BIT(6) 63 64 #define ABX8XX_OSC_OSEL BIT(7) 65 66 #define ABX8XX_REG_OSS 0x1d 67 #define ABX8XX_OSS_OF BIT(1) 68 #define ABX8XX_OSS_OMODE BIT(4) 69 70 #define ABX8XX_REG_WDT 0x1b 71 #define ABX8XX_WDT_WDS BIT(7) 72 #define ABX8XX_WDT_BMB_MASK 0x7c 73 #define ABX8XX_WDT_BMB_SHIFT 2 74 #define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT) 75 #define ABX8XX_WDT_WRB_MASK 0x03 76 #define ABX8XX_WDT_WRB_1HZ 0x02 77 78 #define ABX8XX_REG_CFG_KEY 0x1f 79 #define ABX8XX_CFG_KEY_OSC 0xa1 80 #define ABX8XX_CFG_KEY_MISC 0x9d 81 82 #define ABX8XX_REG_ID0 0x28 83 84 #define ABX8XX_REG_OUT_CTRL 0x30 85 #define ABX8XX_OUT_CTRL_EXDS BIT(4) 86 87 #define ABX8XX_REG_TRICKLE 0x20 88 #define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0 89 #define ABX8XX_TRICKLE_STANDARD_DIODE 0x8 90 #define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4 91 92 #define ABX8XX_REG_EXTRAM 0x3f 93 #define ABX8XX_EXTRAM_XADS GENMASK(1, 0) 94 95 #define ABX8XX_SRAM_BASE 0x40 96 #define ABX8XX_SRAM_WIN_SIZE 0x40 97 #define ABX8XX_RAM_SIZE 256 98 99 #define NVMEM_ADDR_LOWER GENMASK(5, 0) 100 #define NVMEM_ADDR_UPPER GENMASK(7, 6) 101 102 static u8 trickle_resistors[] = {0, 3, 6, 11}; 103 104 enum abx80x_chip {AB0801, AB0803, AB0804, AB0805, 105 AB1801, AB1803, AB1804, AB1805, RV1805, ABX80X}; 106 107 struct abx80x_cap { 108 u16 pn; 109 bool has_tc; 110 bool has_wdog; 111 }; 112 113 static struct abx80x_cap abx80x_caps[] = { 114 [AB0801] = {.pn = 0x0801}, 115 [AB0803] = {.pn = 0x0803}, 116 [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true}, 117 [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true}, 118 [AB1801] = {.pn = 0x1801}, 119 [AB1803] = {.pn = 0x1803}, 120 [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true}, 121 [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, 122 [RV1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true}, 123 [ABX80X] = {.pn = 0} 124 }; 125 126 struct abx80x_priv { 127 struct rtc_device *rtc; 128 struct i2c_client *client; 129 struct watchdog_device wdog; 130 }; 131 132 static int abx80x_write_config_key(struct i2c_client *client, u8 key) 133 { 134 if (i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY, key) < 0) { 135 dev_err(&client->dev, "Unable to write configuration key\n"); 136 return -EIO; 137 } 138 139 return 0; 140 } 141 142 static int abx80x_is_rc_mode(struct i2c_client *client) 143 { 144 int flags = 0; 145 146 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS); 147 if (flags < 0) { 148 dev_err(&client->dev, 149 "Failed to read autocalibration attribute\n"); 150 return flags; 151 } 152 153 return (flags & ABX8XX_OSS_OMODE) ? 1 : 0; 154 } 155 156 static int abx80x_enable_trickle_charger(struct i2c_client *client, 157 u8 trickle_cfg) 158 { 159 int err; 160 161 /* 162 * Write the configuration key register to enable access to the Trickle 163 * register 164 */ 165 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0) 166 return -EIO; 167 168 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE, 169 ABX8XX_TRICKLE_CHARGE_ENABLE | 170 trickle_cfg); 171 if (err < 0) { 172 dev_err(&client->dev, "Unable to write trickle register\n"); 173 return -EIO; 174 } 175 176 return 0; 177 } 178 179 static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm) 180 { 181 struct i2c_client *client = to_i2c_client(dev); 182 unsigned char buf[8]; 183 int err, flags, rc_mode = 0; 184 185 /* Read the Oscillator Failure only in XT mode */ 186 rc_mode = abx80x_is_rc_mode(client); 187 if (rc_mode < 0) 188 return rc_mode; 189 190 if (!rc_mode) { 191 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS); 192 if (flags < 0) 193 return flags; 194 195 if (flags & ABX8XX_OSS_OF) { 196 dev_err(dev, "Oscillator failure, data is invalid.\n"); 197 return -EINVAL; 198 } 199 } 200 201 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH, 202 sizeof(buf), buf); 203 if (err < 0) { 204 dev_err(&client->dev, "Unable to read date\n"); 205 return -EIO; 206 } 207 208 tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F); 209 tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F); 210 tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F); 211 tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7; 212 tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F); 213 tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1; 214 tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100; 215 216 return 0; 217 } 218 219 static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm) 220 { 221 struct i2c_client *client = to_i2c_client(dev); 222 unsigned char buf[8]; 223 int err, flags; 224 225 if (tm->tm_year < 100) 226 return -EINVAL; 227 228 buf[ABX8XX_REG_HTH] = 0; 229 buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec); 230 buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min); 231 buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour); 232 buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday); 233 buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1); 234 buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100); 235 buf[ABX8XX_REG_WD] = tm->tm_wday; 236 237 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH, 238 sizeof(buf), buf); 239 if (err < 0) { 240 dev_err(&client->dev, "Unable to write to date registers\n"); 241 return -EIO; 242 } 243 244 /* Clear the OF bit of Oscillator Status Register */ 245 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS); 246 if (flags < 0) 247 return flags; 248 249 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS, 250 flags & ~ABX8XX_OSS_OF); 251 if (err < 0) { 252 dev_err(&client->dev, "Unable to write oscillator status register\n"); 253 return err; 254 } 255 256 return 0; 257 } 258 259 static irqreturn_t abx80x_handle_irq(int irq, void *dev_id) 260 { 261 struct i2c_client *client = dev_id; 262 struct abx80x_priv *priv = i2c_get_clientdata(client); 263 struct rtc_device *rtc = priv->rtc; 264 int status; 265 266 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); 267 if (status < 0) 268 return IRQ_NONE; 269 270 if (status & ABX8XX_STATUS_AF) 271 rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF); 272 273 /* 274 * It is unclear if we'll get an interrupt before the external 275 * reset kicks in. 276 */ 277 if (status & ABX8XX_STATUS_WDT) 278 dev_alert(&client->dev, "watchdog timeout interrupt.\n"); 279 280 i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0); 281 282 return IRQ_HANDLED; 283 } 284 285 static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t) 286 { 287 struct i2c_client *client = to_i2c_client(dev); 288 unsigned char buf[7]; 289 290 int irq_mask, err; 291 292 if (client->irq <= 0) 293 return -EINVAL; 294 295 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC, 296 sizeof(buf), buf); 297 if (err) 298 return err; 299 300 irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ); 301 if (irq_mask < 0) 302 return irq_mask; 303 304 t->time.tm_sec = bcd2bin(buf[0] & 0x7F); 305 t->time.tm_min = bcd2bin(buf[1] & 0x7F); 306 t->time.tm_hour = bcd2bin(buf[2] & 0x3F); 307 t->time.tm_mday = bcd2bin(buf[3] & 0x3F); 308 t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1; 309 t->time.tm_wday = buf[5] & 0x7; 310 311 t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE); 312 t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled; 313 314 return err; 315 } 316 317 static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t) 318 { 319 struct i2c_client *client = to_i2c_client(dev); 320 u8 alarm[6]; 321 int err; 322 323 if (client->irq <= 0) 324 return -EINVAL; 325 326 alarm[0] = 0x0; 327 alarm[1] = bin2bcd(t->time.tm_sec); 328 alarm[2] = bin2bcd(t->time.tm_min); 329 alarm[3] = bin2bcd(t->time.tm_hour); 330 alarm[4] = bin2bcd(t->time.tm_mday); 331 alarm[5] = bin2bcd(t->time.tm_mon + 1); 332 333 err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH, 334 sizeof(alarm), alarm); 335 if (err < 0) { 336 dev_err(&client->dev, "Unable to write alarm registers\n"); 337 return -EIO; 338 } 339 340 if (t->enabled) { 341 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, 342 (ABX8XX_IRQ_IM_1_4 | 343 ABX8XX_IRQ_AIE)); 344 if (err) 345 return err; 346 } 347 348 return 0; 349 } 350 351 static int abx80x_rtc_set_autocalibration(struct device *dev, 352 int autocalibration) 353 { 354 struct i2c_client *client = to_i2c_client(dev); 355 int retval, flags = 0; 356 357 if ((autocalibration != 0) && (autocalibration != 1024) && 358 (autocalibration != 512)) { 359 dev_err(dev, "autocalibration value outside permitted range\n"); 360 return -EINVAL; 361 } 362 363 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC); 364 if (flags < 0) 365 return flags; 366 367 if (autocalibration == 0) { 368 flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024); 369 } else if (autocalibration == 1024) { 370 /* 1024 autocalibration is 0x10 */ 371 flags |= ABX8XX_OSC_ACAL_1024; 372 flags &= ~(ABX8XX_OSC_ACAL_512); 373 } else { 374 /* 512 autocalibration is 0x11 */ 375 flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512); 376 } 377 378 /* Unlock write access to Oscillator Control Register */ 379 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0) 380 return -EIO; 381 382 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags); 383 384 return retval; 385 } 386 387 static int abx80x_rtc_get_autocalibration(struct device *dev) 388 { 389 struct i2c_client *client = to_i2c_client(dev); 390 int flags = 0, autocalibration; 391 392 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC); 393 if (flags < 0) 394 return flags; 395 396 if (flags & ABX8XX_OSC_ACAL_512) 397 autocalibration = 512; 398 else if (flags & ABX8XX_OSC_ACAL_1024) 399 autocalibration = 1024; 400 else 401 autocalibration = 0; 402 403 return autocalibration; 404 } 405 406 static ssize_t autocalibration_store(struct device *dev, 407 struct device_attribute *attr, 408 const char *buf, size_t count) 409 { 410 int retval; 411 unsigned long autocalibration = 0; 412 413 retval = kstrtoul(buf, 10, &autocalibration); 414 if (retval < 0) { 415 dev_err(dev, "Failed to store RTC autocalibration attribute\n"); 416 return -EINVAL; 417 } 418 419 retval = abx80x_rtc_set_autocalibration(dev->parent, autocalibration); 420 421 return retval ? retval : count; 422 } 423 424 static ssize_t autocalibration_show(struct device *dev, 425 struct device_attribute *attr, char *buf) 426 { 427 int autocalibration = 0; 428 429 autocalibration = abx80x_rtc_get_autocalibration(dev->parent); 430 if (autocalibration < 0) { 431 dev_err(dev, "Failed to read RTC autocalibration\n"); 432 sprintf(buf, "0\n"); 433 return autocalibration; 434 } 435 436 return sprintf(buf, "%d\n", autocalibration); 437 } 438 439 static DEVICE_ATTR_RW(autocalibration); 440 441 static ssize_t oscillator_store(struct device *dev, 442 struct device_attribute *attr, 443 const char *buf, size_t count) 444 { 445 struct i2c_client *client = to_i2c_client(dev->parent); 446 int retval, flags, rc_mode = 0; 447 448 if (strncmp(buf, "rc", 2) == 0) { 449 rc_mode = 1; 450 } else if (strncmp(buf, "xtal", 4) == 0) { 451 rc_mode = 0; 452 } else { 453 dev_err(dev, "Oscillator selection value outside permitted ones\n"); 454 return -EINVAL; 455 } 456 457 flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC); 458 if (flags < 0) 459 return flags; 460 461 if (rc_mode == 0) 462 flags &= ~(ABX8XX_OSC_OSEL); 463 else 464 flags |= (ABX8XX_OSC_OSEL); 465 466 /* Unlock write access on Oscillator Control register */ 467 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_OSC) < 0) 468 return -EIO; 469 470 retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags); 471 if (retval < 0) { 472 dev_err(dev, "Failed to write Oscillator Control register\n"); 473 return retval; 474 } 475 476 return retval ? retval : count; 477 } 478 479 static ssize_t oscillator_show(struct device *dev, 480 struct device_attribute *attr, char *buf) 481 { 482 int rc_mode = 0; 483 struct i2c_client *client = to_i2c_client(dev->parent); 484 485 rc_mode = abx80x_is_rc_mode(client); 486 487 if (rc_mode < 0) { 488 dev_err(dev, "Failed to read RTC oscillator selection\n"); 489 sprintf(buf, "\n"); 490 return rc_mode; 491 } 492 493 if (rc_mode) 494 return sprintf(buf, "rc\n"); 495 else 496 return sprintf(buf, "xtal\n"); 497 } 498 499 static DEVICE_ATTR_RW(oscillator); 500 501 static struct attribute *rtc_calib_attrs[] = { 502 &dev_attr_autocalibration.attr, 503 &dev_attr_oscillator.attr, 504 NULL, 505 }; 506 507 static const struct attribute_group rtc_calib_attr_group = { 508 .attrs = rtc_calib_attrs, 509 }; 510 511 static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled) 512 { 513 struct i2c_client *client = to_i2c_client(dev); 514 int err; 515 516 if (enabled) 517 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, 518 (ABX8XX_IRQ_IM_1_4 | 519 ABX8XX_IRQ_AIE)); 520 else 521 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ, 522 ABX8XX_IRQ_IM_1_4); 523 return err; 524 } 525 526 static int abx80x_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 527 { 528 struct i2c_client *client = to_i2c_client(dev); 529 int status, tmp; 530 531 switch (cmd) { 532 case RTC_VL_READ: 533 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); 534 if (status < 0) 535 return status; 536 537 tmp = status & ABX8XX_STATUS_BLF ? RTC_VL_BACKUP_LOW : 0; 538 539 return put_user(tmp, (unsigned int __user *)arg); 540 541 case RTC_VL_CLR: 542 status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS); 543 if (status < 0) 544 return status; 545 546 status &= ~ABX8XX_STATUS_BLF; 547 548 tmp = i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0); 549 if (tmp < 0) 550 return tmp; 551 552 return 0; 553 554 default: 555 return -ENOIOCTLCMD; 556 } 557 } 558 559 static const struct rtc_class_ops abx80x_rtc_ops = { 560 .read_time = abx80x_rtc_read_time, 561 .set_time = abx80x_rtc_set_time, 562 .read_alarm = abx80x_read_alarm, 563 .set_alarm = abx80x_set_alarm, 564 .alarm_irq_enable = abx80x_alarm_irq_enable, 565 .ioctl = abx80x_ioctl, 566 }; 567 568 static int abx80x_dt_trickle_cfg(struct i2c_client *client) 569 { 570 struct device_node *np = client->dev.of_node; 571 const char *diode; 572 int trickle_cfg = 0; 573 int i, ret; 574 u32 tmp; 575 576 ret = of_property_read_string(np, "abracon,tc-diode", &diode); 577 if (ret) 578 return ret; 579 580 if (!strcmp(diode, "standard")) { 581 trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE; 582 } else if (!strcmp(diode, "schottky")) { 583 trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE; 584 } else { 585 dev_dbg(&client->dev, "Invalid tc-diode value: %s\n", diode); 586 return -EINVAL; 587 } 588 589 ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp); 590 if (ret) 591 return ret; 592 593 for (i = 0; i < sizeof(trickle_resistors); i++) 594 if (trickle_resistors[i] == tmp) 595 break; 596 597 if (i == sizeof(trickle_resistors)) { 598 dev_dbg(&client->dev, "Invalid tc-resistor value: %u\n", tmp); 599 return -EINVAL; 600 } 601 602 return (trickle_cfg | i); 603 } 604 605 #ifdef CONFIG_WATCHDOG 606 607 static inline u8 timeout_bits(unsigned int timeout) 608 { 609 return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) | 610 ABX8XX_WDT_WRB_1HZ; 611 } 612 613 static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog, 614 unsigned int timeout) 615 { 616 struct abx80x_priv *priv = watchdog_get_drvdata(wdog); 617 u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout); 618 619 /* 620 * Writing any timeout to the WDT register resets the watchdog timer. 621 * Writing 0 disables it. 622 */ 623 return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val); 624 } 625 626 static int abx80x_wdog_set_timeout(struct watchdog_device *wdog, 627 unsigned int new_timeout) 628 { 629 int err = 0; 630 631 if (watchdog_hw_running(wdog)) 632 err = __abx80x_wdog_set_timeout(wdog, new_timeout); 633 634 if (err == 0) 635 wdog->timeout = new_timeout; 636 637 return err; 638 } 639 640 static int abx80x_wdog_ping(struct watchdog_device *wdog) 641 { 642 return __abx80x_wdog_set_timeout(wdog, wdog->timeout); 643 } 644 645 static int abx80x_wdog_start(struct watchdog_device *wdog) 646 { 647 return __abx80x_wdog_set_timeout(wdog, wdog->timeout); 648 } 649 650 static int abx80x_wdog_stop(struct watchdog_device *wdog) 651 { 652 return __abx80x_wdog_set_timeout(wdog, 0); 653 } 654 655 static const struct watchdog_info abx80x_wdog_info = { 656 .identity = "abx80x watchdog", 657 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, 658 }; 659 660 static const struct watchdog_ops abx80x_wdog_ops = { 661 .owner = THIS_MODULE, 662 .start = abx80x_wdog_start, 663 .stop = abx80x_wdog_stop, 664 .ping = abx80x_wdog_ping, 665 .set_timeout = abx80x_wdog_set_timeout, 666 }; 667 668 static int abx80x_setup_watchdog(struct abx80x_priv *priv) 669 { 670 priv->wdog.parent = &priv->client->dev; 671 priv->wdog.ops = &abx80x_wdog_ops; 672 priv->wdog.info = &abx80x_wdog_info; 673 priv->wdog.min_timeout = 1; 674 priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME; 675 priv->wdog.timeout = ABX8XX_WDT_MAX_TIME; 676 677 watchdog_set_drvdata(&priv->wdog, priv); 678 679 return devm_watchdog_register_device(&priv->client->dev, &priv->wdog); 680 } 681 #else 682 static int abx80x_setup_watchdog(struct abx80x_priv *priv) 683 { 684 return 0; 685 } 686 #endif 687 688 static int abx80x_nvmem_xfer(struct abx80x_priv *priv, unsigned int offset, 689 void *val, size_t bytes, bool write) 690 { 691 int ret; 692 693 while (bytes) { 694 u8 extram, reg, len, lower, upper; 695 696 lower = FIELD_GET(NVMEM_ADDR_LOWER, offset); 697 upper = FIELD_GET(NVMEM_ADDR_UPPER, offset); 698 extram = FIELD_PREP(ABX8XX_EXTRAM_XADS, upper); 699 reg = ABX8XX_SRAM_BASE + lower; 700 len = min(lower + bytes, (size_t)ABX8XX_SRAM_WIN_SIZE) - lower; 701 len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX); 702 703 ret = i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_EXTRAM, 704 extram); 705 if (ret) 706 return ret; 707 708 if (write) 709 ret = i2c_smbus_write_i2c_block_data(priv->client, reg, 710 len, val); 711 else 712 ret = i2c_smbus_read_i2c_block_data(priv->client, reg, 713 len, val); 714 if (ret) 715 return ret; 716 717 offset += len; 718 val += len; 719 bytes -= len; 720 } 721 722 return 0; 723 } 724 725 static int abx80x_nvmem_read(void *priv, unsigned int offset, void *val, 726 size_t bytes) 727 { 728 return abx80x_nvmem_xfer(priv, offset, val, bytes, false); 729 } 730 731 static int abx80x_nvmem_write(void *priv, unsigned int offset, void *val, 732 size_t bytes) 733 { 734 return abx80x_nvmem_xfer(priv, offset, val, bytes, true); 735 } 736 737 static int abx80x_setup_nvmem(struct abx80x_priv *priv) 738 { 739 struct nvmem_config config = { 740 .type = NVMEM_TYPE_BATTERY_BACKED, 741 .reg_read = abx80x_nvmem_read, 742 .reg_write = abx80x_nvmem_write, 743 .size = ABX8XX_RAM_SIZE, 744 .priv = priv, 745 }; 746 747 return devm_rtc_nvmem_register(priv->rtc, &config); 748 } 749 750 static const struct i2c_device_id abx80x_id[] = { 751 { "abx80x", ABX80X }, 752 { "ab0801", AB0801 }, 753 { "ab0803", AB0803 }, 754 { "ab0804", AB0804 }, 755 { "ab0805", AB0805 }, 756 { "ab1801", AB1801 }, 757 { "ab1803", AB1803 }, 758 { "ab1804", AB1804 }, 759 { "ab1805", AB1805 }, 760 { "rv1805", RV1805 }, 761 { } 762 }; 763 MODULE_DEVICE_TABLE(i2c, abx80x_id); 764 765 static int abx80x_probe(struct i2c_client *client) 766 { 767 struct device_node *np = client->dev.of_node; 768 struct abx80x_priv *priv; 769 int i, data, err, trickle_cfg = -EINVAL; 770 char buf[7]; 771 const struct i2c_device_id *id = i2c_match_id(abx80x_id, client); 772 unsigned int part = id->driver_data; 773 unsigned int partnumber; 774 unsigned int majrev, minrev; 775 unsigned int lot; 776 unsigned int wafer; 777 unsigned int uid; 778 779 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 780 return -ENODEV; 781 782 err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0, 783 sizeof(buf), buf); 784 if (err < 0) { 785 dev_err(&client->dev, "Unable to read partnumber\n"); 786 return -EIO; 787 } 788 789 partnumber = (buf[0] << 8) | buf[1]; 790 majrev = buf[2] >> 3; 791 minrev = buf[2] & 0x7; 792 lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3]; 793 uid = ((buf[4] & 0x7f) << 8) | buf[5]; 794 wafer = (buf[6] & 0x7c) >> 2; 795 dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n", 796 partnumber, majrev, minrev, lot, wafer, uid); 797 798 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1); 799 if (data < 0) { 800 dev_err(&client->dev, "Unable to read control register\n"); 801 return -EIO; 802 } 803 804 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1, 805 ((data & ~(ABX8XX_CTRL_12_24 | 806 ABX8XX_CTRL_ARST)) | 807 ABX8XX_CTRL_WRITE)); 808 if (err < 0) { 809 dev_err(&client->dev, "Unable to write control register\n"); 810 return -EIO; 811 } 812 813 /* Configure RV1805 specifics */ 814 if (part == RV1805) { 815 /* 816 * Avoid accidentally entering test mode. This can happen 817 * on the RV1805 in case the reserved bit 5 in control2 818 * register is set. RV-1805-C3 datasheet indicates that 819 * the bit should be cleared in section 11h - Control2. 820 */ 821 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL2); 822 if (data < 0) { 823 dev_err(&client->dev, 824 "Unable to read control2 register\n"); 825 return -EIO; 826 } 827 828 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL2, 829 data & ~ABX8XX_CTRL2_RSVD); 830 if (err < 0) { 831 dev_err(&client->dev, 832 "Unable to write control2 register\n"); 833 return -EIO; 834 } 835 836 /* 837 * Avoid extra power leakage. The RV1805 uses smaller 838 * 10pin package and the EXTI input is not present. 839 * Disable it to avoid leakage. 840 */ 841 data = i2c_smbus_read_byte_data(client, ABX8XX_REG_OUT_CTRL); 842 if (data < 0) { 843 dev_err(&client->dev, 844 "Unable to read output control register\n"); 845 return -EIO; 846 } 847 848 /* 849 * Write the configuration key register to enable access to 850 * the config2 register 851 */ 852 if (abx80x_write_config_key(client, ABX8XX_CFG_KEY_MISC) < 0) 853 return -EIO; 854 855 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OUT_CTRL, 856 data | ABX8XX_OUT_CTRL_EXDS); 857 if (err < 0) { 858 dev_err(&client->dev, 859 "Unable to write output control register\n"); 860 return -EIO; 861 } 862 } 863 864 /* part autodetection */ 865 if (part == ABX80X) { 866 for (i = 0; abx80x_caps[i].pn; i++) 867 if (partnumber == abx80x_caps[i].pn) 868 break; 869 if (abx80x_caps[i].pn == 0) { 870 dev_err(&client->dev, "Unknown part: %04x\n", 871 partnumber); 872 return -EINVAL; 873 } 874 part = i; 875 } 876 877 if (partnumber != abx80x_caps[part].pn) { 878 dev_err(&client->dev, "partnumber mismatch %04x != %04x\n", 879 partnumber, abx80x_caps[part].pn); 880 return -EINVAL; 881 } 882 883 if (np && abx80x_caps[part].has_tc) 884 trickle_cfg = abx80x_dt_trickle_cfg(client); 885 886 if (trickle_cfg > 0) { 887 dev_info(&client->dev, "Enabling trickle charger: %02x\n", 888 trickle_cfg); 889 abx80x_enable_trickle_charger(client, trickle_cfg); 890 } 891 892 err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL, 893 BIT(2)); 894 if (err) 895 return err; 896 897 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); 898 if (priv == NULL) 899 return -ENOMEM; 900 901 priv->rtc = devm_rtc_allocate_device(&client->dev); 902 if (IS_ERR(priv->rtc)) 903 return PTR_ERR(priv->rtc); 904 905 priv->rtc->ops = &abx80x_rtc_ops; 906 priv->client = client; 907 908 i2c_set_clientdata(client, priv); 909 910 if (abx80x_caps[part].has_wdog) { 911 err = abx80x_setup_watchdog(priv); 912 if (err) 913 return err; 914 } 915 916 err = abx80x_setup_nvmem(priv); 917 if (err) 918 return err; 919 920 if (client->irq > 0) { 921 dev_info(&client->dev, "IRQ %d supplied\n", client->irq); 922 err = devm_request_threaded_irq(&client->dev, client->irq, NULL, 923 abx80x_handle_irq, 924 IRQF_SHARED | IRQF_ONESHOT, 925 "abx8xx", 926 client); 927 if (err) { 928 dev_err(&client->dev, "unable to request IRQ, alarms disabled\n"); 929 client->irq = 0; 930 } 931 } 932 933 err = rtc_add_group(priv->rtc, &rtc_calib_attr_group); 934 if (err) { 935 dev_err(&client->dev, "Failed to create sysfs group: %d\n", 936 err); 937 return err; 938 } 939 940 return devm_rtc_register_device(priv->rtc); 941 } 942 943 #ifdef CONFIG_OF 944 static const struct of_device_id abx80x_of_match[] = { 945 { 946 .compatible = "abracon,abx80x", 947 .data = (void *)ABX80X 948 }, 949 { 950 .compatible = "abracon,ab0801", 951 .data = (void *)AB0801 952 }, 953 { 954 .compatible = "abracon,ab0803", 955 .data = (void *)AB0803 956 }, 957 { 958 .compatible = "abracon,ab0804", 959 .data = (void *)AB0804 960 }, 961 { 962 .compatible = "abracon,ab0805", 963 .data = (void *)AB0805 964 }, 965 { 966 .compatible = "abracon,ab1801", 967 .data = (void *)AB1801 968 }, 969 { 970 .compatible = "abracon,ab1803", 971 .data = (void *)AB1803 972 }, 973 { 974 .compatible = "abracon,ab1804", 975 .data = (void *)AB1804 976 }, 977 { 978 .compatible = "abracon,ab1805", 979 .data = (void *)AB1805 980 }, 981 { 982 .compatible = "microcrystal,rv1805", 983 .data = (void *)RV1805 984 }, 985 { } 986 }; 987 MODULE_DEVICE_TABLE(of, abx80x_of_match); 988 #endif 989 990 static struct i2c_driver abx80x_driver = { 991 .driver = { 992 .name = "rtc-abx80x", 993 .of_match_table = of_match_ptr(abx80x_of_match), 994 }, 995 .probe = abx80x_probe, 996 .id_table = abx80x_id, 997 }; 998 999 module_i2c_driver(abx80x_driver); 1000 1001 MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>"); 1002 MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>"); 1003 MODULE_DESCRIPTION("Abracon ABX80X RTC driver"); 1004 MODULE_LICENSE("GPL v2"); 1005