1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Real Time Clock driver for AB-RTCMC-32.768kHz-EOZ9 chip. 4 * Copyright (C) 2019 Orolia 5 * 6 */ 7 8 #include <linux/module.h> 9 #include <linux/rtc.h> 10 #include <linux/i2c.h> 11 #include <linux/bcd.h> 12 #include <linux/of.h> 13 #include <linux/regmap.h> 14 #include <linux/hwmon.h> 15 #include <linux/hwmon-sysfs.h> 16 17 #define ABEOZ9_REG_CTRL1 0x00 18 #define ABEOZ9_REG_CTRL1_MASK GENMASK(7, 0) 19 #define ABEOZ9_REG_CTRL1_WE BIT(0) 20 #define ABEOZ9_REG_CTRL1_TE BIT(1) 21 #define ABEOZ9_REG_CTRL1_TAR BIT(2) 22 #define ABEOZ9_REG_CTRL1_EERE BIT(3) 23 #define ABEOZ9_REG_CTRL1_SRON BIT(4) 24 #define ABEOZ9_REG_CTRL1_TD0 BIT(5) 25 #define ABEOZ9_REG_CTRL1_TD1 BIT(6) 26 #define ABEOZ9_REG_CTRL1_CLKINT BIT(7) 27 28 #define ABEOZ9_REG_CTRL_INT 0x01 29 #define ABEOZ9_REG_CTRL_INT_AIE BIT(0) 30 #define ABEOZ9_REG_CTRL_INT_TIE BIT(1) 31 #define ABEOZ9_REG_CTRL_INT_V1IE BIT(2) 32 #define ABEOZ9_REG_CTRL_INT_V2IE BIT(3) 33 #define ABEOZ9_REG_CTRL_INT_SRIE BIT(4) 34 35 #define ABEOZ9_REG_CTRL_INT_FLAG 0x02 36 #define ABEOZ9_REG_CTRL_INT_FLAG_AF BIT(0) 37 #define ABEOZ9_REG_CTRL_INT_FLAG_TF BIT(1) 38 #define ABEOZ9_REG_CTRL_INT_FLAG_V1IF BIT(2) 39 #define ABEOZ9_REG_CTRL_INT_FLAG_V2IF BIT(3) 40 #define ABEOZ9_REG_CTRL_INT_FLAG_SRF BIT(4) 41 42 #define ABEOZ9_REG_CTRL_STATUS 0x03 43 #define ABEOZ9_REG_CTRL_STATUS_V1F BIT(2) 44 #define ABEOZ9_REG_CTRL_STATUS_V2F BIT(3) 45 #define ABEOZ9_REG_CTRL_STATUS_SR BIT(4) 46 #define ABEOZ9_REG_CTRL_STATUS_PON BIT(5) 47 #define ABEOZ9_REG_CTRL_STATUS_EEBUSY BIT(7) 48 49 #define ABEOZ9_REG_SEC 0x08 50 #define ABEOZ9_REG_MIN 0x09 51 #define ABEOZ9_REG_HOURS 0x0A 52 #define ABEOZ9_HOURS_PM BIT(6) 53 #define ABEOZ9_REG_DAYS 0x0B 54 #define ABEOZ9_REG_WEEKDAYS 0x0C 55 #define ABEOZ9_REG_MONTHS 0x0D 56 #define ABEOZ9_REG_YEARS 0x0E 57 58 #define ABEOZ9_SEC_LEN 7 59 60 #define ABEOZ9_REG_REG_TEMP 0x20 61 #define ABEOZ953_TEMP_MAX 120 62 #define ABEOZ953_TEMP_MIN -60 63 64 #define ABEOZ9_REG_EEPROM 0x30 65 #define ABEOZ9_REG_EEPROM_MASK GENMASK(8, 0) 66 #define ABEOZ9_REG_EEPROM_THP BIT(0) 67 #define ABEOZ9_REG_EEPROM_THE BIT(1) 68 #define ABEOZ9_REG_EEPROM_FD0 BIT(2) 69 #define ABEOZ9_REG_EEPROM_FD1 BIT(3) 70 #define ABEOZ9_REG_EEPROM_R1K BIT(4) 71 #define ABEOZ9_REG_EEPROM_R5K BIT(5) 72 #define ABEOZ9_REG_EEPROM_R20K BIT(6) 73 #define ABEOZ9_REG_EEPROM_R80K BIT(7) 74 75 struct abeoz9_rtc_data { 76 struct rtc_device *rtc; 77 struct regmap *regmap; 78 struct device *hwmon_dev; 79 }; 80 81 static int abeoz9_check_validity(struct device *dev) 82 { 83 struct abeoz9_rtc_data *data = dev_get_drvdata(dev); 84 struct regmap *regmap = data->regmap; 85 int ret; 86 int val; 87 88 ret = regmap_read(regmap, ABEOZ9_REG_CTRL_STATUS, &val); 89 if (ret < 0) { 90 dev_err(dev, 91 "unable to get CTRL_STATUS register (%d)\n", ret); 92 return ret; 93 } 94 95 if (val & ABEOZ9_REG_CTRL_STATUS_PON) { 96 dev_warn(dev, "power-on reset detected, date is invalid\n"); 97 return -EINVAL; 98 } 99 100 if (val & ABEOZ9_REG_CTRL_STATUS_V1F) { 101 dev_warn(dev, 102 "voltage drops below VLOW1 threshold, date is invalid\n"); 103 return -EINVAL; 104 } 105 106 if ((val & ABEOZ9_REG_CTRL_STATUS_V2F)) { 107 dev_warn(dev, 108 "voltage drops below VLOW2 threshold, date is invalid\n"); 109 return -EINVAL; 110 } 111 112 return 0; 113 } 114 115 static int abeoz9_reset_validity(struct regmap *regmap) 116 { 117 return regmap_update_bits(regmap, ABEOZ9_REG_CTRL_STATUS, 118 ABEOZ9_REG_CTRL_STATUS_V1F | 119 ABEOZ9_REG_CTRL_STATUS_V2F | 120 ABEOZ9_REG_CTRL_STATUS_PON, 121 0); 122 } 123 124 static int abeoz9_rtc_get_time(struct device *dev, struct rtc_time *tm) 125 { 126 struct abeoz9_rtc_data *data = dev_get_drvdata(dev); 127 u8 regs[ABEOZ9_SEC_LEN]; 128 int ret; 129 130 ret = abeoz9_check_validity(dev); 131 if (ret) 132 return ret; 133 134 ret = regmap_bulk_read(data->regmap, ABEOZ9_REG_SEC, 135 regs, 136 sizeof(regs)); 137 if (ret) { 138 dev_err(dev, "reading RTC time failed (%d)\n", ret); 139 return ret; 140 } 141 142 tm->tm_sec = bcd2bin(regs[ABEOZ9_REG_SEC - ABEOZ9_REG_SEC] & 0x7F); 143 tm->tm_min = bcd2bin(regs[ABEOZ9_REG_MIN - ABEOZ9_REG_SEC] & 0x7F); 144 145 if (regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & ABEOZ9_HOURS_PM) { 146 tm->tm_hour = 147 bcd2bin(regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & 0x1f); 148 if (regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] & ABEOZ9_HOURS_PM) 149 tm->tm_hour += 12; 150 } else { 151 tm->tm_hour = bcd2bin(regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC]); 152 } 153 154 tm->tm_mday = bcd2bin(regs[ABEOZ9_REG_DAYS - ABEOZ9_REG_SEC]); 155 tm->tm_wday = bcd2bin(regs[ABEOZ9_REG_WEEKDAYS - ABEOZ9_REG_SEC]); 156 tm->tm_mon = bcd2bin(regs[ABEOZ9_REG_MONTHS - ABEOZ9_REG_SEC]) - 1; 157 tm->tm_year = bcd2bin(regs[ABEOZ9_REG_YEARS - ABEOZ9_REG_SEC]) + 100; 158 159 return ret; 160 } 161 162 static int abeoz9_rtc_set_time(struct device *dev, struct rtc_time *tm) 163 { 164 struct abeoz9_rtc_data *data = dev_get_drvdata(dev); 165 struct regmap *regmap = data->regmap; 166 u8 regs[ABEOZ9_SEC_LEN]; 167 int ret; 168 169 regs[ABEOZ9_REG_SEC - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_sec); 170 regs[ABEOZ9_REG_MIN - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_min); 171 regs[ABEOZ9_REG_HOURS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_hour); 172 regs[ABEOZ9_REG_DAYS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_mday); 173 regs[ABEOZ9_REG_WEEKDAYS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_wday); 174 regs[ABEOZ9_REG_MONTHS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_mon + 1); 175 regs[ABEOZ9_REG_YEARS - ABEOZ9_REG_SEC] = bin2bcd(tm->tm_year - 100); 176 177 ret = regmap_bulk_write(data->regmap, ABEOZ9_REG_SEC, 178 regs, 179 sizeof(regs)); 180 181 if (ret) { 182 dev_err(dev, "set RTC time failed (%d)\n", ret); 183 return ret; 184 } 185 186 return abeoz9_reset_validity(regmap); 187 } 188 189 static int abeoz9_trickle_parse_dt(struct device_node *node) 190 { 191 u32 ohms = 0; 192 193 if (of_property_read_u32(node, "trickle-resistor-ohms", &ohms)) 194 return 0; 195 196 switch (ohms) { 197 case 1000: 198 return ABEOZ9_REG_EEPROM_R1K; 199 case 5000: 200 return ABEOZ9_REG_EEPROM_R5K; 201 case 20000: 202 return ABEOZ9_REG_EEPROM_R20K; 203 case 80000: 204 return ABEOZ9_REG_EEPROM_R80K; 205 default: 206 return 0; 207 } 208 } 209 210 static int abeoz9_rtc_setup(struct device *dev, struct device_node *node) 211 { 212 struct abeoz9_rtc_data *data = dev_get_drvdata(dev); 213 struct regmap *regmap = data->regmap; 214 int ret; 215 216 /* Enable Self Recovery, Clock for Watch and EEPROM refresh functions */ 217 ret = regmap_update_bits(regmap, ABEOZ9_REG_CTRL1, 218 ABEOZ9_REG_CTRL1_MASK, 219 ABEOZ9_REG_CTRL1_WE | 220 ABEOZ9_REG_CTRL1_EERE | 221 ABEOZ9_REG_CTRL1_SRON); 222 if (ret < 0) { 223 dev_err(dev, "unable to set CTRL_1 register (%d)\n", ret); 224 return ret; 225 } 226 227 ret = regmap_write(regmap, ABEOZ9_REG_CTRL_INT, 0); 228 if (ret < 0) { 229 dev_err(dev, 230 "unable to set control CTRL_INT register (%d)\n", 231 ret); 232 return ret; 233 } 234 235 ret = regmap_write(regmap, ABEOZ9_REG_CTRL_INT_FLAG, 0); 236 if (ret < 0) { 237 dev_err(dev, 238 "unable to set control CTRL_INT_FLAG register (%d)\n", 239 ret); 240 return ret; 241 } 242 243 ret = abeoz9_trickle_parse_dt(node); 244 245 /* Enable built-in termometer */ 246 ret |= ABEOZ9_REG_EEPROM_THE; 247 248 ret = regmap_update_bits(regmap, ABEOZ9_REG_EEPROM, 249 ABEOZ9_REG_EEPROM_MASK, 250 ret); 251 if (ret < 0) { 252 dev_err(dev, "unable to set EEPROM register (%d)\n", ret); 253 return ret; 254 } 255 256 return ret; 257 } 258 259 static const struct rtc_class_ops rtc_ops = { 260 .read_time = abeoz9_rtc_get_time, 261 .set_time = abeoz9_rtc_set_time, 262 }; 263 264 static const struct regmap_config abeoz9_rtc_regmap_config = { 265 .reg_bits = 8, 266 .val_bits = 8, 267 }; 268 269 #if IS_REACHABLE(CONFIG_HWMON) 270 271 static int abeoz9z3_temp_read(struct device *dev, 272 enum hwmon_sensor_types type, 273 u32 attr, int channel, long *temp) 274 { 275 struct abeoz9_rtc_data *data = dev_get_drvdata(dev); 276 struct regmap *regmap = data->regmap; 277 int ret; 278 unsigned int val; 279 280 ret = regmap_read(regmap, ABEOZ9_REG_CTRL_STATUS, &val); 281 if (ret < 0) 282 return ret; 283 284 if ((val & ABEOZ9_REG_CTRL_STATUS_V1F) || 285 (val & ABEOZ9_REG_CTRL_STATUS_V2F)) { 286 dev_err(dev, 287 "thermometer might be disabled due to low voltage\n"); 288 return -EINVAL; 289 } 290 291 switch (attr) { 292 case hwmon_temp_input: 293 ret = regmap_read(regmap, ABEOZ9_REG_REG_TEMP, &val); 294 if (ret < 0) 295 return ret; 296 *temp = 1000 * (val + ABEOZ953_TEMP_MIN); 297 return 0; 298 case hwmon_temp_max: 299 *temp = 1000 * ABEOZ953_TEMP_MAX; 300 return 0; 301 case hwmon_temp_min: 302 *temp = 1000 * ABEOZ953_TEMP_MIN; 303 return 0; 304 default: 305 return -EOPNOTSUPP; 306 } 307 } 308 309 static umode_t abeoz9_is_visible(const void *data, 310 enum hwmon_sensor_types type, 311 u32 attr, int channel) 312 { 313 switch (attr) { 314 case hwmon_temp_input: 315 case hwmon_temp_max: 316 case hwmon_temp_min: 317 return 0444; 318 default: 319 return 0; 320 } 321 } 322 323 static const u32 abeoz9_chip_config[] = { 324 HWMON_C_REGISTER_TZ, 325 0 326 }; 327 328 static const struct hwmon_channel_info abeoz9_chip = { 329 .type = hwmon_chip, 330 .config = abeoz9_chip_config, 331 }; 332 333 static const u32 abeoz9_temp_config[] = { 334 HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MIN, 335 0 336 }; 337 338 static const struct hwmon_channel_info abeoz9_temp = { 339 .type = hwmon_temp, 340 .config = abeoz9_temp_config, 341 }; 342 343 static const struct hwmon_channel_info *abeoz9_info[] = { 344 &abeoz9_chip, 345 &abeoz9_temp, 346 NULL 347 }; 348 349 static const struct hwmon_ops abeoz9_hwmon_ops = { 350 .is_visible = abeoz9_is_visible, 351 .read = abeoz9z3_temp_read, 352 }; 353 354 static const struct hwmon_chip_info abeoz9_chip_info = { 355 .ops = &abeoz9_hwmon_ops, 356 .info = abeoz9_info, 357 }; 358 359 static void abeoz9_hwmon_register(struct device *dev, 360 struct abeoz9_rtc_data *data) 361 { 362 data->hwmon_dev = 363 devm_hwmon_device_register_with_info(dev, 364 "abeoz9", 365 data, 366 &abeoz9_chip_info, 367 NULL); 368 if (IS_ERR(data->hwmon_dev)) { 369 dev_warn(dev, "unable to register hwmon device %ld\n", 370 PTR_ERR(data->hwmon_dev)); 371 } 372 } 373 374 #else 375 376 static void abeoz9_hwmon_register(struct device *dev, 377 struct abeoz9_rtc_data *data) 378 { 379 } 380 381 #endif 382 383 static int abeoz9_probe(struct i2c_client *client, 384 const struct i2c_device_id *id) 385 { 386 struct abeoz9_rtc_data *data = NULL; 387 struct device *dev = &client->dev; 388 struct regmap *regmap; 389 int ret; 390 391 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | 392 I2C_FUNC_SMBUS_BYTE_DATA | 393 I2C_FUNC_SMBUS_I2C_BLOCK)) 394 return -ENODEV; 395 396 regmap = devm_regmap_init_i2c(client, &abeoz9_rtc_regmap_config); 397 if (IS_ERR(regmap)) { 398 ret = PTR_ERR(regmap); 399 dev_err(dev, "regmap allocation failed: %d\n", ret); 400 return ret; 401 } 402 403 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); 404 if (!data) 405 return -ENOMEM; 406 407 data->regmap = regmap; 408 dev_set_drvdata(dev, data); 409 410 ret = abeoz9_rtc_setup(dev, client->dev.of_node); 411 if (ret) 412 return ret; 413 414 data->rtc = devm_rtc_allocate_device(dev); 415 ret = PTR_ERR_OR_ZERO(data->rtc); 416 if (ret) 417 return ret; 418 419 data->rtc->ops = &rtc_ops; 420 data->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 421 data->rtc->range_max = RTC_TIMESTAMP_END_2099; 422 423 ret = rtc_register_device(data->rtc); 424 if (ret) 425 return ret; 426 427 abeoz9_hwmon_register(dev, data); 428 return 0; 429 } 430 431 #ifdef CONFIG_OF 432 static const struct of_device_id abeoz9_dt_match[] = { 433 { .compatible = "abracon,abeoz9" }, 434 { }, 435 }; 436 MODULE_DEVICE_TABLE(of, abeoz9_dt_match); 437 #endif 438 439 static const struct i2c_device_id abeoz9_id[] = { 440 { "abeoz9", 0 }, 441 { } 442 }; 443 444 static struct i2c_driver abeoz9_driver = { 445 .driver = { 446 .name = "rtc-ab-eoz9", 447 .of_match_table = of_match_ptr(abeoz9_dt_match), 448 }, 449 .probe = abeoz9_probe, 450 .id_table = abeoz9_id, 451 }; 452 453 module_i2c_driver(abeoz9_driver); 454 455 MODULE_AUTHOR("Artem Panfilov <panfilov.artyom@gmail.com>"); 456 MODULE_DESCRIPTION("Abracon AB-RTCMC-32.768kHz-EOZ9 RTC driver"); 457 MODULE_LICENSE("GPL"); 458