1 /*
2  * Copyright (c) 2016, Linaro Ltd
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 and
6  * only version 2 as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13 
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/interrupt.h>
19 #include <linux/platform_device.h>
20 #include <linux/mfd/syscon.h>
21 #include <linux/slab.h>
22 #include <linux/rpmsg.h>
23 #include <linux/idr.h>
24 #include <linux/circ_buf.h>
25 #include <linux/soc/qcom/smem.h>
26 #include <linux/sizes.h>
27 #include <linux/delay.h>
28 #include <linux/regmap.h>
29 #include <linux/workqueue.h>
30 #include <linux/list.h>
31 
32 #include <linux/rpmsg/qcom_glink.h>
33 
34 #include "qcom_glink_native.h"
35 
36 #define FIFO_FULL_RESERVE 8
37 #define FIFO_ALIGNMENT 8
38 #define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
39 
40 #define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR	478
41 #define SMEM_GLINK_NATIVE_XPRT_FIFO_0		479
42 #define SMEM_GLINK_NATIVE_XPRT_FIFO_1		480
43 
44 struct glink_smem_pipe {
45 	struct qcom_glink_pipe native;
46 
47 	__le32 *tail;
48 	__le32 *head;
49 
50 	void *fifo;
51 
52 	int remote_pid;
53 };
54 
55 #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
56 
57 static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
58 {
59 	struct glink_smem_pipe *pipe = to_smem_pipe(np);
60 	size_t len;
61 	void *fifo;
62 	u32 head;
63 	u32 tail;
64 
65 	if (!pipe->fifo) {
66 		fifo = qcom_smem_get(pipe->remote_pid,
67 				     SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
68 		if (IS_ERR(fifo)) {
69 			pr_err("failed to acquire RX fifo handle: %ld\n",
70 			       PTR_ERR(fifo));
71 			return 0;
72 		}
73 
74 		pipe->fifo = fifo;
75 		pipe->native.length = len;
76 	}
77 
78 	head = le32_to_cpu(*pipe->head);
79 	tail = le32_to_cpu(*pipe->tail);
80 
81 	if (head < tail)
82 		return pipe->native.length - tail + head;
83 	else
84 		return head - tail;
85 }
86 
87 static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
88 			       void *data, unsigned int offset, size_t count)
89 {
90 	struct glink_smem_pipe *pipe = to_smem_pipe(np);
91 	size_t len;
92 	u32 tail;
93 
94 	tail = le32_to_cpu(*pipe->tail);
95 	tail += offset;
96 	if (tail >= pipe->native.length)
97 		tail -= pipe->native.length;
98 
99 	len = min_t(size_t, count, pipe->native.length - tail);
100 	if (len) {
101 		__ioread32_copy(data, pipe->fifo + tail,
102 				len / sizeof(u32));
103 	}
104 
105 	if (len != count) {
106 		__ioread32_copy(data + len, pipe->fifo,
107 				(count - len) / sizeof(u32));
108 	}
109 }
110 
111 static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
112 				  size_t count)
113 {
114 	struct glink_smem_pipe *pipe = to_smem_pipe(np);
115 	u32 tail;
116 
117 	tail = le32_to_cpu(*pipe->tail);
118 
119 	tail += count;
120 	if (tail > pipe->native.length)
121 		tail -= pipe->native.length;
122 
123 	*pipe->tail = cpu_to_le32(tail);
124 }
125 
126 static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
127 {
128 	struct glink_smem_pipe *pipe = to_smem_pipe(np);
129 	u32 head;
130 	u32 tail;
131 	u32 avail;
132 
133 	head = le32_to_cpu(*pipe->head);
134 	tail = le32_to_cpu(*pipe->tail);
135 
136 	if (tail <= head)
137 		avail = pipe->native.length - head + tail;
138 	else
139 		avail = tail - head;
140 
141 	if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
142 		avail = 0;
143 	else
144 		avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
145 
146 	return avail;
147 }
148 
149 static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
150 					    unsigned int head,
151 					    const void *data, size_t count)
152 {
153 	size_t len;
154 
155 	len = min_t(size_t, count, pipe->native.length - head);
156 	if (len)
157 		memcpy(pipe->fifo + head, data, len);
158 
159 	if (len != count)
160 		memcpy(pipe->fifo, data + len, count - len);
161 
162 	head += count;
163 	if (head >= pipe->native.length)
164 		head -= pipe->native.length;
165 
166 	return head;
167 }
168 
169 static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
170 				const void *hdr, size_t hlen,
171 				const void *data, size_t dlen)
172 {
173 	struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
174 	unsigned int head;
175 
176 	head = le32_to_cpu(*pipe->head);
177 
178 	head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
179 	head = glink_smem_tx_write_one(pipe, head, data, dlen);
180 
181 	/* Ensure head is always aligned to 8 bytes */
182 	head = ALIGN(head, 8);
183 	if (head >= pipe->native.length)
184 		head -= pipe->native.length;
185 
186 	/* Ensure ordering of fifo and head update */
187 	wmb();
188 
189 	*pipe->head = cpu_to_le32(head);
190 }
191 
192 static void qcom_glink_smem_release(struct device *dev)
193 {
194 	kfree(dev);
195 }
196 
197 struct qcom_glink *qcom_glink_smem_register(struct device *parent,
198 					    struct device_node *node)
199 {
200 	struct glink_smem_pipe *rx_pipe;
201 	struct glink_smem_pipe *tx_pipe;
202 	struct qcom_glink *glink;
203 	struct device *dev;
204 	u32 remote_pid;
205 	__le32 *descs;
206 	size_t size;
207 	int ret;
208 
209 	dev = kzalloc(sizeof(*dev), GFP_KERNEL);
210 	if (!dev)
211 		return ERR_PTR(-ENOMEM);
212 
213 	dev->parent = parent;
214 	dev->of_node = node;
215 	dev->release = qcom_glink_smem_release;
216 	dev_set_name(dev, "%s:%s", node->parent->name, node->name);
217 	ret = device_register(dev);
218 	if (ret) {
219 		pr_err("failed to register glink edge\n");
220 		return ERR_PTR(ret);
221 	}
222 
223 	ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
224 				   &remote_pid);
225 	if (ret) {
226 		dev_err(dev, "failed to parse qcom,remote-pid\n");
227 		goto err_put_dev;
228 	}
229 
230 	rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
231 	tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
232 	if (!rx_pipe || !tx_pipe) {
233 		ret = -ENOMEM;
234 		goto err_put_dev;
235 	}
236 
237 	ret = qcom_smem_alloc(remote_pid,
238 			      SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
239 	if (ret && ret != -EEXIST) {
240 		dev_err(dev, "failed to allocate glink descriptors\n");
241 		goto err_put_dev;
242 	}
243 
244 	descs = qcom_smem_get(remote_pid,
245 			      SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
246 	if (IS_ERR(descs)) {
247 		dev_err(dev, "failed to acquire xprt descriptor\n");
248 		ret = PTR_ERR(descs);
249 		goto err_put_dev;
250 	}
251 
252 	if (size != 32) {
253 		dev_err(dev, "glink descriptor of invalid size\n");
254 		ret = -EINVAL;
255 		goto err_put_dev;
256 	}
257 
258 	tx_pipe->tail = &descs[0];
259 	tx_pipe->head = &descs[1];
260 	rx_pipe->tail = &descs[2];
261 	rx_pipe->head = &descs[3];
262 
263 	ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
264 			      SZ_16K);
265 	if (ret && ret != -EEXIST) {
266 		dev_err(dev, "failed to allocate TX fifo\n");
267 		goto err_put_dev;
268 	}
269 
270 	tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
271 				      &tx_pipe->native.length);
272 	if (IS_ERR(tx_pipe->fifo)) {
273 		dev_err(dev, "failed to acquire TX fifo\n");
274 		ret = PTR_ERR(tx_pipe->fifo);
275 		goto err_put_dev;
276 	}
277 
278 	rx_pipe->native.avail = glink_smem_rx_avail;
279 	rx_pipe->native.peak = glink_smem_rx_peak;
280 	rx_pipe->native.advance = glink_smem_rx_advance;
281 	rx_pipe->remote_pid = remote_pid;
282 
283 	tx_pipe->native.avail = glink_smem_tx_avail;
284 	tx_pipe->native.write = glink_smem_tx_write;
285 	tx_pipe->remote_pid = remote_pid;
286 
287 	*rx_pipe->tail = 0;
288 	*tx_pipe->head = 0;
289 
290 	glink = qcom_glink_native_probe(dev,
291 					GLINK_FEATURE_INTENT_REUSE,
292 					&rx_pipe->native, &tx_pipe->native,
293 					false);
294 	if (IS_ERR(glink)) {
295 		ret = PTR_ERR(glink);
296 		goto err_put_dev;
297 	}
298 
299 	return glink;
300 
301 err_put_dev:
302 	put_device(dev);
303 
304 	return ERR_PTR(ret);
305 }
306 EXPORT_SYMBOL_GPL(qcom_glink_smem_register);
307 
308 void qcom_glink_smem_unregister(struct qcom_glink *glink)
309 {
310 	qcom_glink_native_remove(glink);
311 	qcom_glink_native_unregister(glink);
312 }
313 EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);
314 
315 MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
316 MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
317 MODULE_LICENSE("GPL v2");
318