1 /* 2 * Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de> 3 * 4 * based on 5 * Allwinner SoCs Reset Controller driver 6 * 7 * Copyright 2013 Maxime Ripard 8 * 9 * Maxime Ripard <maxime.ripard@free-electrons.com> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 */ 16 17 #include <linux/err.h> 18 #include <linux/io.h> 19 #include <linux/module.h> 20 #include <linux/of.h> 21 #include <linux/platform_device.h> 22 #include <linux/reset-controller.h> 23 #include <linux/spinlock.h> 24 #include <linux/types.h> 25 26 #define NR_BANKS 4 27 28 struct socfpga_reset_data { 29 spinlock_t lock; 30 void __iomem *membase; 31 u32 modrst_offset; 32 struct reset_controller_dev rcdev; 33 }; 34 35 static int socfpga_reset_assert(struct reset_controller_dev *rcdev, 36 unsigned long id) 37 { 38 struct socfpga_reset_data *data = container_of(rcdev, 39 struct socfpga_reset_data, 40 rcdev); 41 int bank = id / BITS_PER_LONG; 42 int offset = id % BITS_PER_LONG; 43 unsigned long flags; 44 u32 reg; 45 46 spin_lock_irqsave(&data->lock, flags); 47 48 reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); 49 writel(reg | BIT(offset), data->membase + data->modrst_offset + 50 (bank * NR_BANKS)); 51 spin_unlock_irqrestore(&data->lock, flags); 52 53 return 0; 54 } 55 56 static int socfpga_reset_deassert(struct reset_controller_dev *rcdev, 57 unsigned long id) 58 { 59 struct socfpga_reset_data *data = container_of(rcdev, 60 struct socfpga_reset_data, 61 rcdev); 62 63 int bank = id / BITS_PER_LONG; 64 int offset = id % BITS_PER_LONG; 65 unsigned long flags; 66 u32 reg; 67 68 spin_lock_irqsave(&data->lock, flags); 69 70 reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); 71 writel(reg & ~BIT(offset), data->membase + data->modrst_offset + 72 (bank * NR_BANKS)); 73 74 spin_unlock_irqrestore(&data->lock, flags); 75 76 return 0; 77 } 78 79 static int socfpga_reset_status(struct reset_controller_dev *rcdev, 80 unsigned long id) 81 { 82 struct socfpga_reset_data *data = container_of(rcdev, 83 struct socfpga_reset_data, rcdev); 84 int bank = id / BITS_PER_LONG; 85 int offset = id % BITS_PER_LONG; 86 u32 reg; 87 88 reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); 89 90 return !(reg & BIT(offset)); 91 } 92 93 static const struct reset_control_ops socfpga_reset_ops = { 94 .assert = socfpga_reset_assert, 95 .deassert = socfpga_reset_deassert, 96 .status = socfpga_reset_status, 97 }; 98 99 static int socfpga_reset_probe(struct platform_device *pdev) 100 { 101 struct socfpga_reset_data *data; 102 struct resource *res; 103 struct device *dev = &pdev->dev; 104 struct device_node *np = dev->of_node; 105 106 /* 107 * The binding was mainlined without the required property. 108 * Do not continue, when we encounter an old DT. 109 */ 110 if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) { 111 dev_err(&pdev->dev, "%s missing #reset-cells property\n", 112 pdev->dev.of_node->full_name); 113 return -EINVAL; 114 } 115 116 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 117 if (!data) 118 return -ENOMEM; 119 120 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 121 data->membase = devm_ioremap_resource(&pdev->dev, res); 122 if (IS_ERR(data->membase)) 123 return PTR_ERR(data->membase); 124 125 if (of_property_read_u32(np, "altr,modrst-offset", &data->modrst_offset)) { 126 dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n"); 127 data->modrst_offset = 0x10; 128 } 129 130 spin_lock_init(&data->lock); 131 132 data->rcdev.owner = THIS_MODULE; 133 data->rcdev.nr_resets = NR_BANKS * BITS_PER_LONG; 134 data->rcdev.ops = &socfpga_reset_ops; 135 data->rcdev.of_node = pdev->dev.of_node; 136 137 return reset_controller_register(&data->rcdev); 138 } 139 140 static int socfpga_reset_remove(struct platform_device *pdev) 141 { 142 struct socfpga_reset_data *data = platform_get_drvdata(pdev); 143 144 reset_controller_unregister(&data->rcdev); 145 146 return 0; 147 } 148 149 static const struct of_device_id socfpga_reset_dt_ids[] = { 150 { .compatible = "altr,rst-mgr", }, 151 { /* sentinel */ }, 152 }; 153 154 static struct platform_driver socfpga_reset_driver = { 155 .probe = socfpga_reset_probe, 156 .remove = socfpga_reset_remove, 157 .driver = { 158 .name = "socfpga-reset", 159 .of_match_table = socfpga_reset_dt_ids, 160 }, 161 }; 162 module_platform_driver(socfpga_reset_driver); 163 164 MODULE_AUTHOR("Steffen Trumtrar <s.trumtrar@pengutronix.de"); 165 MODULE_DESCRIPTION("Socfpga Reset Controller Driver"); 166 MODULE_LICENSE("GPL"); 167