1 /* 2 * Copyright (c) 2017, Impinj, Inc. 3 * 4 * i.MX7 System Reset Controller (SRC) driver 5 * 6 * Author: Andrey Smirnov <andrew.smirnov@gmail.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; version 2 of the License. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #include <linux/mfd/syscon.h> 19 #include <linux/mod_devicetable.h> 20 #include <linux/platform_device.h> 21 #include <linux/reset-controller.h> 22 #include <linux/regmap.h> 23 #include <dt-bindings/reset/imx7-reset.h> 24 25 struct imx7_src { 26 struct reset_controller_dev rcdev; 27 struct regmap *regmap; 28 }; 29 30 enum imx7_src_registers { 31 SRC_A7RCR0 = 0x0004, 32 SRC_M4RCR = 0x000c, 33 SRC_ERCR = 0x0014, 34 SRC_HSICPHY_RCR = 0x001c, 35 SRC_USBOPHY1_RCR = 0x0020, 36 SRC_USBOPHY2_RCR = 0x0024, 37 SRC_MIPIPHY_RCR = 0x0028, 38 SRC_PCIEPHY_RCR = 0x002c, 39 SRC_DDRC_RCR = 0x1000, 40 }; 41 42 struct imx7_src_signal { 43 unsigned int offset, bit; 44 }; 45 46 static const struct imx7_src_signal imx7_src_signals[IMX7_RESET_NUM] = { 47 [IMX7_RESET_A7_CORE_POR_RESET0] = { SRC_A7RCR0, BIT(0) }, 48 [IMX7_RESET_A7_CORE_POR_RESET1] = { SRC_A7RCR0, BIT(1) }, 49 [IMX7_RESET_A7_CORE_RESET0] = { SRC_A7RCR0, BIT(4) }, 50 [IMX7_RESET_A7_CORE_RESET1] = { SRC_A7RCR0, BIT(5) }, 51 [IMX7_RESET_A7_DBG_RESET0] = { SRC_A7RCR0, BIT(8) }, 52 [IMX7_RESET_A7_DBG_RESET1] = { SRC_A7RCR0, BIT(9) }, 53 [IMX7_RESET_A7_ETM_RESET0] = { SRC_A7RCR0, BIT(12) }, 54 [IMX7_RESET_A7_ETM_RESET1] = { SRC_A7RCR0, BIT(13) }, 55 [IMX7_RESET_A7_SOC_DBG_RESET] = { SRC_A7RCR0, BIT(20) }, 56 [IMX7_RESET_A7_L2RESET] = { SRC_A7RCR0, BIT(21) }, 57 [IMX7_RESET_SW_M4C_RST] = { SRC_M4RCR, BIT(1) }, 58 [IMX7_RESET_SW_M4P_RST] = { SRC_M4RCR, BIT(2) }, 59 [IMX7_RESET_EIM_RST] = { SRC_ERCR, BIT(0) }, 60 [IMX7_RESET_HSICPHY_PORT_RST] = { SRC_HSICPHY_RCR, BIT(1) }, 61 [IMX7_RESET_USBPHY1_POR] = { SRC_USBOPHY1_RCR, BIT(0) }, 62 [IMX7_RESET_USBPHY1_PORT_RST] = { SRC_USBOPHY1_RCR, BIT(1) }, 63 [IMX7_RESET_USBPHY2_POR] = { SRC_USBOPHY2_RCR, BIT(0) }, 64 [IMX7_RESET_USBPHY2_PORT_RST] = { SRC_USBOPHY2_RCR, BIT(1) }, 65 [IMX7_RESET_MIPI_PHY_MRST] = { SRC_MIPIPHY_RCR, BIT(1) }, 66 [IMX7_RESET_MIPI_PHY_SRST] = { SRC_MIPIPHY_RCR, BIT(2) }, 67 [IMX7_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, BIT(2) | BIT(1) }, 68 [IMX7_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) }, 69 [IMX7_RESET_PCIE_CTRL_APPS_EN] = { SRC_PCIEPHY_RCR, BIT(6) }, 70 [IMX7_RESET_DDRC_PRST] = { SRC_DDRC_RCR, BIT(0) }, 71 [IMX7_RESET_DDRC_CORE_RST] = { SRC_DDRC_RCR, BIT(1) }, 72 }; 73 74 static struct imx7_src *to_imx7_src(struct reset_controller_dev *rcdev) 75 { 76 return container_of(rcdev, struct imx7_src, rcdev); 77 } 78 79 static int imx7_reset_set(struct reset_controller_dev *rcdev, 80 unsigned long id, bool assert) 81 { 82 struct imx7_src *imx7src = to_imx7_src(rcdev); 83 const struct imx7_src_signal *signal = &imx7_src_signals[id]; 84 unsigned int value = assert ? signal->bit : 0; 85 86 switch (id) { 87 case IMX7_RESET_PCIEPHY: 88 /* 89 * wait for more than 10us to release phy g_rst and 90 * btnrst 91 */ 92 if (!assert) 93 udelay(10); 94 break; 95 96 case IMX7_RESET_PCIE_CTRL_APPS_EN: 97 value = (assert) ? 0 : signal->bit; 98 break; 99 } 100 101 return regmap_update_bits(imx7src->regmap, 102 signal->offset, signal->bit, value); 103 } 104 105 static int imx7_reset_assert(struct reset_controller_dev *rcdev, 106 unsigned long id) 107 { 108 return imx7_reset_set(rcdev, id, true); 109 } 110 111 static int imx7_reset_deassert(struct reset_controller_dev *rcdev, 112 unsigned long id) 113 { 114 return imx7_reset_set(rcdev, id, false); 115 } 116 117 static const struct reset_control_ops imx7_reset_ops = { 118 .assert = imx7_reset_assert, 119 .deassert = imx7_reset_deassert, 120 }; 121 122 static int imx7_reset_probe(struct platform_device *pdev) 123 { 124 struct imx7_src *imx7src; 125 struct device *dev = &pdev->dev; 126 struct regmap_config config = { .name = "src" }; 127 128 imx7src = devm_kzalloc(dev, sizeof(*imx7src), GFP_KERNEL); 129 if (!imx7src) 130 return -ENOMEM; 131 132 imx7src->regmap = syscon_node_to_regmap(dev->of_node); 133 if (IS_ERR(imx7src->regmap)) { 134 dev_err(dev, "Unable to get imx7-src regmap"); 135 return PTR_ERR(imx7src->regmap); 136 } 137 regmap_attach_dev(dev, imx7src->regmap, &config); 138 139 imx7src->rcdev.owner = THIS_MODULE; 140 imx7src->rcdev.nr_resets = IMX7_RESET_NUM; 141 imx7src->rcdev.ops = &imx7_reset_ops; 142 imx7src->rcdev.of_node = dev->of_node; 143 144 return devm_reset_controller_register(dev, &imx7src->rcdev); 145 } 146 147 static const struct of_device_id imx7_reset_dt_ids[] = { 148 { .compatible = "fsl,imx7d-src", }, 149 { /* sentinel */ }, 150 }; 151 152 static struct platform_driver imx7_reset_driver = { 153 .probe = imx7_reset_probe, 154 .driver = { 155 .name = KBUILD_MODNAME, 156 .of_match_table = imx7_reset_dt_ids, 157 }, 158 }; 159 builtin_platform_driver(imx7_reset_driver); 160