1# SPDX-License-Identifier: GPL-2.0-only 2config ARCH_HAS_RESET_CONTROLLER 3 bool 4 5menuconfig RESET_CONTROLLER 6 bool "Reset Controller Support" 7 default y if ARCH_HAS_RESET_CONTROLLER 8 help 9 Generic Reset Controller support. 10 11 This framework is designed to abstract reset handling of devices 12 via GPIOs or SoC-internal reset controller modules. 13 14 If unsure, say no. 15 16if RESET_CONTROLLER 17 18config RESET_A10SR 19 tristate "Altera Arria10 System Resource Reset" 20 depends on MFD_ALTERA_A10SR 21 help 22 This option enables support for the external reset functions for 23 peripheral PHYs on the Altera Arria10 System Resource Chip. 24 25config RESET_ATH79 26 bool "AR71xx Reset Driver" if COMPILE_TEST 27 default ATH79 28 help 29 This enables the ATH79 reset controller driver that supports the 30 AR71xx SoC reset controller. 31 32config RESET_AXS10X 33 bool "AXS10x Reset Driver" if COMPILE_TEST 34 default ARC_PLAT_AXS10X 35 help 36 This enables the reset controller driver for AXS10x. 37 38config RESET_BCM6345 39 bool "BCM6345 Reset Controller" 40 depends on BMIPS_GENERIC || COMPILE_TEST 41 default BMIPS_GENERIC 42 help 43 This enables the reset controller driver for BCM6345 SoCs. 44 45config RESET_BERLIN 46 bool "Berlin Reset Driver" if COMPILE_TEST 47 default ARCH_BERLIN 48 help 49 This enables the reset controller driver for Marvell Berlin SoCs. 50 51config RESET_BRCMSTB 52 tristate "Broadcom STB reset controller" 53 depends on ARCH_BRCMSTB || COMPILE_TEST 54 default ARCH_BRCMSTB 55 help 56 This enables the reset controller driver for Broadcom STB SoCs using 57 a SUN_TOP_CTRL_SW_INIT style controller. 58 59config RESET_BRCMSTB_RESCAL 60 bool "Broadcom STB RESCAL reset controller" 61 depends on HAS_IOMEM 62 default ARCH_BRCMSTB || COMPILE_TEST 63 help 64 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on 65 BCM7216. 66 67config RESET_HSDK 68 bool "Synopsys HSDK Reset Driver" 69 depends on HAS_IOMEM 70 depends on ARC_SOC_HSDK || COMPILE_TEST 71 help 72 This enables the reset controller driver for HSDK board. 73 74config RESET_IMX7 75 tristate "i.MX7/8 Reset Driver" 76 depends on HAS_IOMEM 77 depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST 78 default y if SOC_IMX7D 79 select MFD_SYSCON 80 help 81 This enables the reset controller driver for i.MX7 SoCs. 82 83config RESET_INTEL_GW 84 bool "Intel Reset Controller Driver" 85 depends on OF && HAS_IOMEM 86 select REGMAP_MMIO 87 help 88 This enables the reset controller driver for Intel Gateway SoCs. 89 Say Y to control the reset signals provided by reset controller. 90 Otherwise, say N. 91 92config RESET_K210 93 bool "Reset controller driver for Canaan Kendryte K210 SoC" 94 depends on (SOC_CANAAN || COMPILE_TEST) && OF 95 select MFD_SYSCON 96 default SOC_CANAAN 97 help 98 Support for the Canaan Kendryte K210 RISC-V SoC reset controller. 99 Say Y if you want to control reset signals provided by this 100 controller. 101 102config RESET_LANTIQ 103 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST 104 default SOC_TYPE_XWAY 105 help 106 This enables the reset controller driver for Lantiq / Intel XWAY SoCs. 107 108config RESET_LPC18XX 109 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST 110 default ARCH_LPC18XX 111 help 112 This enables the reset controller driver for NXP LPC18xx/43xx SoCs. 113 114config RESET_MESON 115 tristate "Meson Reset Driver" 116 depends on ARCH_MESON || COMPILE_TEST 117 default ARCH_MESON 118 help 119 This enables the reset driver for Amlogic Meson SoCs. 120 121config RESET_MESON_AUDIO_ARB 122 tristate "Meson Audio Memory Arbiter Reset Driver" 123 depends on ARCH_MESON || COMPILE_TEST 124 help 125 This enables the reset driver for Audio Memory Arbiter of 126 Amlogic's A113 based SoCs 127 128config RESET_NPCM 129 bool "NPCM BMC Reset Driver" if COMPILE_TEST 130 default ARCH_NPCM 131 help 132 This enables the reset controller driver for Nuvoton NPCM 133 BMC SoCs. 134 135config RESET_OXNAS 136 bool 137 138config RESET_PISTACHIO 139 bool "Pistachio Reset Driver" if COMPILE_TEST 140 default MACH_PISTACHIO 141 help 142 This enables the reset driver for ImgTec Pistachio SoCs. 143 144config RESET_QCOM_AOSS 145 tristate "Qcom AOSS Reset Driver" 146 depends on ARCH_QCOM || COMPILE_TEST 147 help 148 This enables the AOSS (always on subsystem) reset driver 149 for Qualcomm SDM845 SoCs. Say Y if you want to control 150 reset signals provided by AOSS for Modem, Venus, ADSP, 151 GPU, Camera, Wireless, Display subsystem. Otherwise, say N. 152 153config RESET_QCOM_PDC 154 tristate "Qualcomm PDC Reset Driver" 155 depends on ARCH_QCOM || COMPILE_TEST 156 help 157 This enables the PDC (Power Domain Controller) reset driver 158 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want 159 to control reset signals provided by PDC for Modem, Compute, 160 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. 161 162config RESET_RASPBERRYPI 163 tristate "Raspberry Pi 4 Firmware Reset Driver" 164 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST) 165 default USB_XHCI_PCI 166 help 167 Raspberry Pi 4's co-processor controls some of the board's HW 168 initialization process, but it's up to Linux to trigger it when 169 relevant. This driver provides a reset controller capable of 170 interfacing with RPi4's co-processor and model these firmware 171 initialization routines as reset lines. 172 173config RESET_SCMI 174 tristate "Reset driver controlled via ARM SCMI interface" 175 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 176 default ARM_SCMI_PROTOCOL 177 help 178 This driver provides support for reset signal/domains that are 179 controlled by firmware that implements the SCMI interface. 180 181 This driver uses SCMI Message Protocol to interact with the 182 firmware controlling all the reset signals. 183 184config RESET_SIMPLE 185 bool "Simple Reset Controller Driver" if COMPILE_TEST 186 default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC 187 help 188 This enables a simple reset controller driver for reset lines that 189 that can be asserted and deasserted by toggling bits in a contiguous, 190 exclusive register space. 191 192 Currently this driver supports: 193 - Altera SoCFPGAs 194 - ASPEED BMC SoCs 195 - Bitmain BM1880 SoC 196 - Realtek SoCs 197 - RCC reset controller in STM32 MCUs 198 - Allwinner SoCs 199 - ZTE's zx2967 family 200 - SiFive FU740 SoCs 201 202config RESET_SOCFPGA 203 bool "SoCFPGA Reset Driver" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA) 204 default ARM && ARCH_INTEL_SOCFPGA 205 select RESET_SIMPLE 206 help 207 This enables the reset driver for the SoCFPGA ARMv7 platforms. This 208 driver gets initialized early during platform init calls. 209 210config RESET_SUNXI 211 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI 212 default ARCH_SUNXI 213 select RESET_SIMPLE 214 help 215 This enables the reset driver for Allwinner SoCs. 216 217config RESET_TI_SCI 218 tristate "TI System Control Interface (TI-SCI) reset driver" 219 depends on TI_SCI_PROTOCOL 220 help 221 This enables the reset driver support over TI System Control Interface 222 available on some new TI's SoCs. If you wish to use reset resources 223 managed by the TI System Controller, say Y here. Otherwise, say N. 224 225config RESET_TI_SYSCON 226 tristate "TI SYSCON Reset Driver" 227 depends on HAS_IOMEM 228 select MFD_SYSCON 229 help 230 This enables the reset driver support for TI devices with 231 memory-mapped reset registers as part of a syscon device node. If 232 you wish to use the reset framework for such memory-mapped devices, 233 say Y here. Otherwise, say N. 234 235config RESET_UNIPHIER 236 tristate "Reset controller driver for UniPhier SoCs" 237 depends on ARCH_UNIPHIER || COMPILE_TEST 238 depends on OF && MFD_SYSCON 239 default ARCH_UNIPHIER 240 help 241 Support for reset controllers on UniPhier SoCs. 242 Say Y if you want to control reset signals provided by System Control 243 block, Media I/O block, Peripheral Block. 244 245config RESET_UNIPHIER_GLUE 246 tristate "Reset driver in glue layer for UniPhier SoCs" 247 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF 248 default ARCH_UNIPHIER 249 select RESET_SIMPLE 250 help 251 Support for peripheral core reset included in its own glue layer 252 on UniPhier SoCs. Say Y if you want to control reset signals 253 provided by the glue layer. 254 255config RESET_ZYNQ 256 bool "ZYNQ Reset Driver" if COMPILE_TEST 257 default ARCH_ZYNQ 258 help 259 This enables the reset controller driver for Xilinx Zynq SoCs. 260 261source "drivers/reset/sti/Kconfig" 262source "drivers/reset/hisilicon/Kconfig" 263source "drivers/reset/tegra/Kconfig" 264 265endif 266