1# SPDX-License-Identifier: GPL-2.0-only 2config ARCH_HAS_RESET_CONTROLLER 3 bool 4 5menuconfig RESET_CONTROLLER 6 bool "Reset Controller Support" 7 default y if ARCH_HAS_RESET_CONTROLLER 8 help 9 Generic Reset Controller support. 10 11 This framework is designed to abstract reset handling of devices 12 via GPIOs or SoC-internal reset controller modules. 13 14 If unsure, say no. 15 16if RESET_CONTROLLER 17 18config RESET_A10SR 19 tristate "Altera Arria10 System Resource Reset" 20 depends on MFD_ALTERA_A10SR 21 help 22 This option enables support for the external reset functions for 23 peripheral PHYs on the Altera Arria10 System Resource Chip. 24 25config RESET_ATH79 26 bool "AR71xx Reset Driver" if COMPILE_TEST 27 default ATH79 28 help 29 This enables the ATH79 reset controller driver that supports the 30 AR71xx SoC reset controller. 31 32config RESET_AXS10X 33 bool "AXS10x Reset Driver" if COMPILE_TEST 34 default ARC_PLAT_AXS10X 35 help 36 This enables the reset controller driver for AXS10x. 37 38config RESET_BERLIN 39 bool "Berlin Reset Driver" if COMPILE_TEST 40 default ARCH_BERLIN 41 help 42 This enables the reset controller driver for Marvell Berlin SoCs. 43 44config RESET_BRCMSTB 45 tristate "Broadcom STB reset controller" 46 depends on ARCH_BRCMSTB || COMPILE_TEST 47 default ARCH_BRCMSTB 48 help 49 This enables the reset controller driver for Broadcom STB SoCs using 50 a SUN_TOP_CTRL_SW_INIT style controller. 51 52config RESET_BRCMSTB_RESCAL 53 bool "Broadcom STB RESCAL reset controller" 54 depends on HAS_IOMEM 55 default ARCH_BRCMSTB || COMPILE_TEST 56 help 57 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on 58 BCM7216. 59 60config RESET_HSDK 61 bool "Synopsys HSDK Reset Driver" 62 depends on HAS_IOMEM 63 depends on ARC_SOC_HSDK || COMPILE_TEST 64 help 65 This enables the reset controller driver for HSDK board. 66 67config RESET_IMX7 68 bool "i.MX7/8 Reset Driver" if COMPILE_TEST 69 depends on HAS_IOMEM 70 default SOC_IMX7D || (ARM64 && ARCH_MXC) 71 select MFD_SYSCON 72 help 73 This enables the reset controller driver for i.MX7 SoCs. 74 75config RESET_INTEL_GW 76 bool "Intel Reset Controller Driver" 77 depends on OF && HAS_IOMEM 78 select REGMAP_MMIO 79 help 80 This enables the reset controller driver for Intel Gateway SoCs. 81 Say Y to control the reset signals provided by reset controller. 82 Otherwise, say N. 83 84config RESET_LANTIQ 85 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST 86 default SOC_TYPE_XWAY 87 help 88 This enables the reset controller driver for Lantiq / Intel XWAY SoCs. 89 90config RESET_LPC18XX 91 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST 92 default ARCH_LPC18XX 93 help 94 This enables the reset controller driver for NXP LPC18xx/43xx SoCs. 95 96config RESET_MESON 97 bool "Meson Reset Driver" if COMPILE_TEST 98 default ARCH_MESON 99 help 100 This enables the reset driver for Amlogic Meson SoCs. 101 102config RESET_MESON_AUDIO_ARB 103 tristate "Meson Audio Memory Arbiter Reset Driver" 104 depends on ARCH_MESON || COMPILE_TEST 105 help 106 This enables the reset driver for Audio Memory Arbiter of 107 Amlogic's A113 based SoCs 108 109config RESET_NPCM 110 bool "NPCM BMC Reset Driver" if COMPILE_TEST 111 default ARCH_NPCM 112 help 113 This enables the reset controller driver for Nuvoton NPCM 114 BMC SoCs. 115 116config RESET_OXNAS 117 bool 118 119config RESET_PISTACHIO 120 bool "Pistachio Reset Driver" if COMPILE_TEST 121 default MACH_PISTACHIO 122 help 123 This enables the reset driver for ImgTec Pistachio SoCs. 124 125config RESET_QCOM_AOSS 126 tristate "Qcom AOSS Reset Driver" 127 depends on ARCH_QCOM || COMPILE_TEST 128 help 129 This enables the AOSS (always on subsystem) reset driver 130 for Qualcomm SDM845 SoCs. Say Y if you want to control 131 reset signals provided by AOSS for Modem, Venus, ADSP, 132 GPU, Camera, Wireless, Display subsystem. Otherwise, say N. 133 134config RESET_QCOM_PDC 135 tristate "Qualcomm PDC Reset Driver" 136 depends on ARCH_QCOM || COMPILE_TEST 137 help 138 This enables the PDC (Power Domain Controller) reset driver 139 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want 140 to control reset signals provided by PDC for Modem, Compute, 141 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. 142 143config RESET_RASPBERRYPI 144 tristate "Raspberry Pi 4 Firmware Reset Driver" 145 depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST) 146 default USB_XHCI_PCI 147 help 148 Raspberry Pi 4's co-processor controls some of the board's HW 149 initialization process, but it's up to Linux to trigger it when 150 relevant. This driver provides a reset controller capable of 151 interfacing with RPi4's co-processor and model these firmware 152 initialization routines as reset lines. 153 154config RESET_SCMI 155 tristate "Reset driver controlled via ARM SCMI interface" 156 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 157 default ARM_SCMI_PROTOCOL 158 help 159 This driver provides support for reset signal/domains that are 160 controlled by firmware that implements the SCMI interface. 161 162 This driver uses SCMI Message Protocol to interact with the 163 firmware controlling all the reset signals. 164 165config RESET_SIMPLE 166 bool "Simple Reset Controller Driver" if COMPILE_TEST 167 default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC 168 help 169 This enables a simple reset controller driver for reset lines that 170 that can be asserted and deasserted by toggling bits in a contiguous, 171 exclusive register space. 172 173 Currently this driver supports: 174 - Altera SoCFPGAs 175 - ASPEED BMC SoCs 176 - Bitmain BM1880 SoC 177 - Realtek SoCs 178 - RCC reset controller in STM32 MCUs 179 - Allwinner SoCs 180 - ZTE's zx2967 family 181 182config RESET_STM32MP157 183 bool "STM32MP157 Reset Driver" if COMPILE_TEST 184 default MACH_STM32MP157 185 help 186 This enables the RCC reset controller driver for STM32 MPUs. 187 188config RESET_SOCFPGA 189 bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA 190 default ARCH_SOCFPGA 191 select RESET_SIMPLE 192 help 193 This enables the reset driver for the SoCFPGA ARMv7 platforms. This 194 driver gets initialized early during platform init calls. 195 196config RESET_SUNXI 197 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI 198 default ARCH_SUNXI 199 select RESET_SIMPLE 200 help 201 This enables the reset driver for Allwinner SoCs. 202 203config RESET_TI_SCI 204 tristate "TI System Control Interface (TI-SCI) reset driver" 205 depends on TI_SCI_PROTOCOL 206 help 207 This enables the reset driver support over TI System Control Interface 208 available on some new TI's SoCs. If you wish to use reset resources 209 managed by the TI System Controller, say Y here. Otherwise, say N. 210 211config RESET_TI_SYSCON 212 tristate "TI SYSCON Reset Driver" 213 depends on HAS_IOMEM 214 select MFD_SYSCON 215 help 216 This enables the reset driver support for TI devices with 217 memory-mapped reset registers as part of a syscon device node. If 218 you wish to use the reset framework for such memory-mapped devices, 219 say Y here. Otherwise, say N. 220 221config RESET_UNIPHIER 222 tristate "Reset controller driver for UniPhier SoCs" 223 depends on ARCH_UNIPHIER || COMPILE_TEST 224 depends on OF && MFD_SYSCON 225 default ARCH_UNIPHIER 226 help 227 Support for reset controllers on UniPhier SoCs. 228 Say Y if you want to control reset signals provided by System Control 229 block, Media I/O block, Peripheral Block. 230 231config RESET_UNIPHIER_GLUE 232 tristate "Reset driver in glue layer for UniPhier SoCs" 233 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF 234 default ARCH_UNIPHIER 235 select RESET_SIMPLE 236 help 237 Support for peripheral core reset included in its own glue layer 238 on UniPhier SoCs. Say Y if you want to control reset signals 239 provided by the glue layer. 240 241config RESET_ZYNQ 242 bool "ZYNQ Reset Driver" if COMPILE_TEST 243 default ARCH_ZYNQ 244 help 245 This enables the reset controller driver for Xilinx Zynq SoCs. 246 247source "drivers/reset/sti/Kconfig" 248source "drivers/reset/hisilicon/Kconfig" 249source "drivers/reset/tegra/Kconfig" 250 251endif 252