1config ARCH_HAS_RESET_CONTROLLER 2 bool 3 4menuconfig RESET_CONTROLLER 5 bool "Reset Controller Support" 6 default y if ARCH_HAS_RESET_CONTROLLER 7 help 8 Generic Reset Controller support. 9 10 This framework is designed to abstract reset handling of devices 11 via GPIOs or SoC-internal reset controller modules. 12 13 If unsure, say no. 14 15if RESET_CONTROLLER 16 17config RESET_A10SR 18 tristate "Altera Arria10 System Resource Reset" 19 depends on MFD_ALTERA_A10SR 20 help 21 This option enables support for the external reset functions for 22 peripheral PHYs on the Altera Arria10 System Resource Chip. 23 24config RESET_ATH79 25 bool "AR71xx Reset Driver" if COMPILE_TEST 26 default ATH79 27 help 28 This enables the ATH79 reset controller driver that supports the 29 AR71xx SoC reset controller. 30 31config RESET_AXS10X 32 bool "AXS10x Reset Driver" if COMPILE_TEST 33 default ARC_PLAT_AXS10X 34 help 35 This enables the reset controller driver for AXS10x. 36 37config RESET_BERLIN 38 bool "Berlin Reset Driver" if COMPILE_TEST 39 default ARCH_BERLIN 40 help 41 This enables the reset controller driver for Marvell Berlin SoCs. 42 43config RESET_HSDK 44 bool "Synopsys HSDK Reset Driver" 45 depends on HAS_IOMEM 46 depends on ARC_SOC_HSDK || COMPILE_TEST 47 help 48 This enables the reset controller driver for HSDK board. 49 50config RESET_IMX7 51 bool "i.MX7 Reset Driver" if COMPILE_TEST 52 depends on HAS_IOMEM 53 default SOC_IMX7D 54 select MFD_SYSCON 55 help 56 This enables the reset controller driver for i.MX7 SoCs. 57 58config RESET_LANTIQ 59 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST 60 default SOC_TYPE_XWAY 61 help 62 This enables the reset controller driver for Lantiq / Intel XWAY SoCs. 63 64config RESET_LPC18XX 65 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST 66 default ARCH_LPC18XX 67 help 68 This enables the reset controller driver for NXP LPC18xx/43xx SoCs. 69 70config RESET_MESON 71 bool "Meson Reset Driver" if COMPILE_TEST 72 default ARCH_MESON 73 help 74 This enables the reset driver for Amlogic Meson SoCs. 75 76config RESET_OXNAS 77 bool 78 79config RESET_PISTACHIO 80 bool "Pistachio Reset Driver" if COMPILE_TEST 81 default MACH_PISTACHIO 82 help 83 This enables the reset driver for ImgTec Pistachio SoCs. 84 85config RESET_SIMPLE 86 bool "Simple Reset Controller Driver" if COMPILE_TEST 87 default ARCH_SOCFPGA || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED 88 help 89 This enables a simple reset controller driver for reset lines that 90 that can be asserted and deasserted by toggling bits in a contiguous, 91 exclusive register space. 92 93 Currently this driver supports: 94 - Altera SoCFPGAs 95 - ASPEED BMC SoCs 96 - RCC reset controller in STM32 MCUs 97 - Allwinner SoCs 98 - ZTE's zx2967 family 99 100config RESET_STM32MP157 101 bool "STM32MP157 Reset Driver" if COMPILE_TEST 102 default MACH_STM32MP157 103 help 104 This enables the RCC reset controller driver for STM32 MPUs. 105 106config RESET_SUNXI 107 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI 108 default ARCH_SUNXI 109 select RESET_SIMPLE 110 help 111 This enables the reset driver for Allwinner SoCs. 112 113config RESET_TI_SCI 114 tristate "TI System Control Interface (TI-SCI) reset driver" 115 depends on TI_SCI_PROTOCOL 116 help 117 This enables the reset driver support over TI System Control Interface 118 available on some new TI's SoCs. If you wish to use reset resources 119 managed by the TI System Controller, say Y here. Otherwise, say N. 120 121config RESET_TI_SYSCON 122 tristate "TI SYSCON Reset Driver" 123 depends on HAS_IOMEM 124 select MFD_SYSCON 125 help 126 This enables the reset driver support for TI devices with 127 memory-mapped reset registers as part of a syscon device node. If 128 you wish to use the reset framework for such memory-mapped devices, 129 say Y here. Otherwise, say N. 130 131config RESET_UNIPHIER 132 tristate "Reset controller driver for UniPhier SoCs" 133 depends on ARCH_UNIPHIER || COMPILE_TEST 134 depends on OF && MFD_SYSCON 135 default ARCH_UNIPHIER 136 help 137 Support for reset controllers on UniPhier SoCs. 138 Say Y if you want to control reset signals provided by System Control 139 block, Media I/O block, Peripheral Block. 140 141config RESET_ZYNQ 142 bool "ZYNQ Reset Driver" if COMPILE_TEST 143 default ARCH_ZYNQ 144 help 145 This enables the reset controller driver for Xilinx Zynq SoCs. 146 147source "drivers/reset/sti/Kconfig" 148source "drivers/reset/hisilicon/Kconfig" 149source "drivers/reset/tegra/Kconfig" 150 151endif 152