1# SPDX-License-Identifier: GPL-2.0-only 2config ARCH_HAS_RESET_CONTROLLER 3 bool 4 5menuconfig RESET_CONTROLLER 6 bool "Reset Controller Support" 7 default y if ARCH_HAS_RESET_CONTROLLER 8 help 9 Generic Reset Controller support. 10 11 This framework is designed to abstract reset handling of devices 12 via GPIOs or SoC-internal reset controller modules. 13 14 If unsure, say no. 15 16if RESET_CONTROLLER 17 18config RESET_A10SR 19 tristate "Altera Arria10 System Resource Reset" 20 depends on MFD_ALTERA_A10SR 21 help 22 This option enables support for the external reset functions for 23 peripheral PHYs on the Altera Arria10 System Resource Chip. 24 25config RESET_ATH79 26 bool "AR71xx Reset Driver" if COMPILE_TEST 27 default ATH79 28 help 29 This enables the ATH79 reset controller driver that supports the 30 AR71xx SoC reset controller. 31 32config RESET_AXS10X 33 bool "AXS10x Reset Driver" if COMPILE_TEST 34 default ARC_PLAT_AXS10X 35 help 36 This enables the reset controller driver for AXS10x. 37 38config RESET_BERLIN 39 bool "Berlin Reset Driver" if COMPILE_TEST 40 default ARCH_BERLIN 41 help 42 This enables the reset controller driver for Marvell Berlin SoCs. 43 44config RESET_BRCMSTB 45 tristate "Broadcom STB reset controller" 46 depends on ARCH_BRCMSTB || COMPILE_TEST 47 default ARCH_BRCMSTB 48 help 49 This enables the reset controller driver for Broadcom STB SoCs using 50 a SUN_TOP_CTRL_SW_INIT style controller. 51 52config RESET_BRCMSTB_RESCAL 53 bool "Broadcom STB RESCAL reset controller" 54 default ARCH_BRCMSTB || COMPILE_TEST 55 help 56 This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on 57 BCM7216. 58 59config RESET_HSDK 60 bool "Synopsys HSDK Reset Driver" 61 depends on HAS_IOMEM 62 depends on ARC_SOC_HSDK || COMPILE_TEST 63 help 64 This enables the reset controller driver for HSDK board. 65 66config RESET_IMX7 67 bool "i.MX7/8 Reset Driver" if COMPILE_TEST 68 depends on HAS_IOMEM 69 default SOC_IMX7D || (ARM64 && ARCH_MXC) 70 select MFD_SYSCON 71 help 72 This enables the reset controller driver for i.MX7 SoCs. 73 74config RESET_INTEL_GW 75 bool "Intel Reset Controller Driver" 76 depends on OF 77 select REGMAP_MMIO 78 help 79 This enables the reset controller driver for Intel Gateway SoCs. 80 Say Y to control the reset signals provided by reset controller. 81 Otherwise, say N. 82 83config RESET_LANTIQ 84 bool "Lantiq XWAY Reset Driver" if COMPILE_TEST 85 default SOC_TYPE_XWAY 86 help 87 This enables the reset controller driver for Lantiq / Intel XWAY SoCs. 88 89config RESET_LPC18XX 90 bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST 91 default ARCH_LPC18XX 92 help 93 This enables the reset controller driver for NXP LPC18xx/43xx SoCs. 94 95config RESET_MESON 96 bool "Meson Reset Driver" if COMPILE_TEST 97 default ARCH_MESON 98 help 99 This enables the reset driver for Amlogic Meson SoCs. 100 101config RESET_MESON_AUDIO_ARB 102 tristate "Meson Audio Memory Arbiter Reset Driver" 103 depends on ARCH_MESON || COMPILE_TEST 104 help 105 This enables the reset driver for Audio Memory Arbiter of 106 Amlogic's A113 based SoCs 107 108config RESET_NPCM 109 bool "NPCM BMC Reset Driver" if COMPILE_TEST 110 default ARCH_NPCM 111 help 112 This enables the reset controller driver for Nuvoton NPCM 113 BMC SoCs. 114 115config RESET_OXNAS 116 bool 117 118config RESET_PISTACHIO 119 bool "Pistachio Reset Driver" if COMPILE_TEST 120 default MACH_PISTACHIO 121 help 122 This enables the reset driver for ImgTec Pistachio SoCs. 123 124config RESET_QCOM_AOSS 125 tristate "Qcom AOSS Reset Driver" 126 depends on ARCH_QCOM || COMPILE_TEST 127 help 128 This enables the AOSS (always on subsystem) reset driver 129 for Qualcomm SDM845 SoCs. Say Y if you want to control 130 reset signals provided by AOSS for Modem, Venus, ADSP, 131 GPU, Camera, Wireless, Display subsystem. Otherwise, say N. 132 133config RESET_QCOM_PDC 134 tristate "Qualcomm PDC Reset Driver" 135 depends on ARCH_QCOM || COMPILE_TEST 136 help 137 This enables the PDC (Power Domain Controller) reset driver 138 for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want 139 to control reset signals provided by PDC for Modem, Compute, 140 Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. 141 142config RESET_SCMI 143 tristate "Reset driver controlled via ARM SCMI interface" 144 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 145 default ARM_SCMI_PROTOCOL 146 help 147 This driver provides support for reset signal/domains that are 148 controlled by firmware that implements the SCMI interface. 149 150 This driver uses SCMI Message Protocol to interact with the 151 firmware controlling all the reset signals. 152 153config RESET_SIMPLE 154 bool "Simple Reset Controller Driver" if COMPILE_TEST 155 default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC 156 help 157 This enables a simple reset controller driver for reset lines that 158 that can be asserted and deasserted by toggling bits in a contiguous, 159 exclusive register space. 160 161 Currently this driver supports: 162 - Altera SoCFPGAs 163 - ASPEED BMC SoCs 164 - Bitmain BM1880 SoC 165 - Realtek SoCs 166 - RCC reset controller in STM32 MCUs 167 - Allwinner SoCs 168 - ZTE's zx2967 family 169 170config RESET_STM32MP157 171 bool "STM32MP157 Reset Driver" if COMPILE_TEST 172 default MACH_STM32MP157 173 help 174 This enables the RCC reset controller driver for STM32 MPUs. 175 176config RESET_SOCFPGA 177 bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA 178 default ARCH_SOCFPGA 179 select RESET_SIMPLE 180 help 181 This enables the reset driver for the SoCFPGA ARMv7 platforms. This 182 driver gets initialized early during platform init calls. 183 184config RESET_SUNXI 185 bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI 186 default ARCH_SUNXI 187 select RESET_SIMPLE 188 help 189 This enables the reset driver for Allwinner SoCs. 190 191config RESET_TI_SCI 192 tristate "TI System Control Interface (TI-SCI) reset driver" 193 depends on TI_SCI_PROTOCOL 194 help 195 This enables the reset driver support over TI System Control Interface 196 available on some new TI's SoCs. If you wish to use reset resources 197 managed by the TI System Controller, say Y here. Otherwise, say N. 198 199config RESET_TI_SYSCON 200 tristate "TI SYSCON Reset Driver" 201 depends on HAS_IOMEM 202 select MFD_SYSCON 203 help 204 This enables the reset driver support for TI devices with 205 memory-mapped reset registers as part of a syscon device node. If 206 you wish to use the reset framework for such memory-mapped devices, 207 say Y here. Otherwise, say N. 208 209config RESET_UNIPHIER 210 tristate "Reset controller driver for UniPhier SoCs" 211 depends on ARCH_UNIPHIER || COMPILE_TEST 212 depends on OF && MFD_SYSCON 213 default ARCH_UNIPHIER 214 help 215 Support for reset controllers on UniPhier SoCs. 216 Say Y if you want to control reset signals provided by System Control 217 block, Media I/O block, Peripheral Block. 218 219config RESET_UNIPHIER_GLUE 220 tristate "Reset driver in glue layer for UniPhier SoCs" 221 depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF 222 default ARCH_UNIPHIER 223 select RESET_SIMPLE 224 help 225 Support for peripheral core reset included in its own glue layer 226 on UniPhier SoCs. Say Y if you want to control reset signals 227 provided by the glue layer. 228 229config RESET_ZYNQ 230 bool "ZYNQ Reset Driver" if COMPILE_TEST 231 default ARCH_ZYNQ 232 help 233 This enables the reset controller driver for Xilinx Zynq SoCs. 234 235source "drivers/reset/sti/Kconfig" 236source "drivers/reset/hisilicon/Kconfig" 237source "drivers/reset/tegra/Kconfig" 238 239endif 240