xref: /openbmc/linux/drivers/reset/Kconfig (revision b3ca9888)
161fc4131SPhilipp Zabelconfig ARCH_HAS_RESET_CONTROLLER
261fc4131SPhilipp Zabel	bool
361fc4131SPhilipp Zabel
461fc4131SPhilipp Zabelmenuconfig RESET_CONTROLLER
561fc4131SPhilipp Zabel	bool "Reset Controller Support"
661fc4131SPhilipp Zabel	default y if ARCH_HAS_RESET_CONTROLLER
761fc4131SPhilipp Zabel	help
861fc4131SPhilipp Zabel	  Generic Reset Controller support.
961fc4131SPhilipp Zabel
1061fc4131SPhilipp Zabel	  This framework is designed to abstract reset handling of devices
1161fc4131SPhilipp Zabel	  via GPIOs or SoC-internal reset controller modules.
1261fc4131SPhilipp Zabel
1361fc4131SPhilipp Zabel	  If unsure, say no.
14e5d76075SStephen Gallimore
15998cd463SMasahiro Yamadaif RESET_CONTROLLER
16998cd463SMasahiro Yamada
1762700682SThor Thayerconfig RESET_A10SR
1862700682SThor Thayer	tristate "Altera Arria10 System Resource Reset"
1962700682SThor Thayer	depends on MFD_ALTERA_A10SR
2062700682SThor Thayer	help
2162700682SThor Thayer	  This option enables support for the external reset functions for
2262700682SThor Thayer	  peripheral PHYs on the Altera Arria10 System Resource Chip.
2362700682SThor Thayer
24e27b4a6eSPhilipp Zabelconfig RESET_ATH79
25e27b4a6eSPhilipp Zabel	bool "AR71xx Reset Driver" if COMPILE_TEST
26e27b4a6eSPhilipp Zabel	default ATH79
27e27b4a6eSPhilipp Zabel	help
28e27b4a6eSPhilipp Zabel	  This enables the ATH79 reset controller driver that supports the
29e27b4a6eSPhilipp Zabel	  AR71xx SoC reset controller.
30e27b4a6eSPhilipp Zabel
3137634923SEugeniy Paltsevconfig RESET_AXS10X
3237634923SEugeniy Paltsev	bool "AXS10x Reset Driver" if COMPILE_TEST
3337634923SEugeniy Paltsev	default ARC_PLAT_AXS10X
3437634923SEugeniy Paltsev	help
3537634923SEugeniy Paltsev	  This enables the reset controller driver for AXS10x.
3637634923SEugeniy Paltsev
3770d467eaSPhilipp Zabelconfig RESET_BERLIN
3870d467eaSPhilipp Zabel	bool "Berlin Reset Driver" if COMPILE_TEST
3970d467eaSPhilipp Zabel	default ARCH_BERLIN
4070d467eaSPhilipp Zabel	help
4170d467eaSPhilipp Zabel	  This enables the reset controller driver for Marvell Berlin SoCs.
4270d467eaSPhilipp Zabel
4313541226SVineet Guptaconfig RESET_HSDK
4413541226SVineet Gupta	bool "Synopsys HSDK Reset Driver"
452d48a237SThomas Meyer	depends on HAS_IOMEM
46544e3bf4SGeert Uytterhoeven	depends on ARC_SOC_HSDK || COMPILE_TEST
47e0be864fSEugeniy Paltsev	help
4813541226SVineet Gupta	  This enables the reset controller driver for HSDK board.
49e0be864fSEugeniy Paltsev
50abf97755SAndrey Smirnovconfig RESET_IMX7
51abf97755SAndrey Smirnov	bool "i.MX7 Reset Driver" if COMPILE_TEST
528fa56620SMasahiro Yamada	depends on HAS_IOMEM
53abf97755SAndrey Smirnov	default SOC_IMX7D
54abf97755SAndrey Smirnov	select MFD_SYSCON
55abf97755SAndrey Smirnov	help
56abf97755SAndrey Smirnov	  This enables the reset controller driver for i.MX7 SoCs.
57abf97755SAndrey Smirnov
5879797b6fSMartin Blumenstinglconfig RESET_LANTIQ
5979797b6fSMartin Blumenstingl	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
6079797b6fSMartin Blumenstingl	default SOC_TYPE_XWAY
6179797b6fSMartin Blumenstingl	help
6279797b6fSMartin Blumenstingl	  This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
6379797b6fSMartin Blumenstingl
64cd7f4b81SPhilipp Zabelconfig RESET_LPC18XX
65cd7f4b81SPhilipp Zabel	bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
66cd7f4b81SPhilipp Zabel	default ARCH_LPC18XX
67cd7f4b81SPhilipp Zabel	help
68cd7f4b81SPhilipp Zabel	  This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
69cd7f4b81SPhilipp Zabel
7044336c24SPhilipp Zabelconfig RESET_MESON
7144336c24SPhilipp Zabel	bool "Meson Reset Driver" if COMPILE_TEST
7244336c24SPhilipp Zabel	default ARCH_MESON
7344336c24SPhilipp Zabel	help
7444336c24SPhilipp Zabel	  This enables the reset driver for Amlogic Meson SoCs.
7544336c24SPhilipp Zabel
76d903779bSJerome Brunetconfig RESET_MESON_AUDIO_ARB
77d903779bSJerome Brunet	tristate "Meson Audio Memory Arbiter Reset Driver"
78d903779bSJerome Brunet	depends on ARCH_MESON || COMPILE_TEST
79d903779bSJerome Brunet	help
80d903779bSJerome Brunet	  This enables the reset driver for Audio Memory Arbiter of
81d903779bSJerome Brunet	  Amlogic's A113 based SoCs
82d903779bSJerome Brunet
836e667facSNeil Armstrongconfig RESET_OXNAS
846e667facSNeil Armstrong	bool
856e667facSNeil Armstrong
86fab3f730SPhilipp Zabelconfig RESET_PISTACHIO
87fab3f730SPhilipp Zabel	bool "Pistachio Reset Driver" if COMPILE_TEST
88fab3f730SPhilipp Zabel	default MACH_PISTACHIO
89fab3f730SPhilipp Zabel	help
90fab3f730SPhilipp Zabel	  This enables the reset driver for ImgTec Pistachio SoCs.
91fab3f730SPhilipp Zabel
925ecb0651SSibi Sankarconfig RESET_QCOM_AOSS
935ecb0651SSibi Sankar	bool "Qcom AOSS Reset Driver"
945ecb0651SSibi Sankar	depends on ARCH_QCOM || COMPILE_TEST
955ecb0651SSibi Sankar	help
965ecb0651SSibi Sankar	  This enables the AOSS (always on subsystem) reset driver
975ecb0651SSibi Sankar	  for Qualcomm SDM845 SoCs. Say Y if you want to control
985ecb0651SSibi Sankar	  reset signals provided by AOSS for Modem, Venus, ADSP,
995ecb0651SSibi Sankar	  GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
1005ecb0651SSibi Sankar
101eea2926bSSibi Sankarconfig RESET_QCOM_PDC
102eea2926bSSibi Sankar	tristate "Qualcomm PDC Reset Driver"
103eea2926bSSibi Sankar	depends on ARCH_QCOM || COMPILE_TEST
104eea2926bSSibi Sankar	help
105eea2926bSSibi Sankar	  This enables the PDC (Power Domain Controller) reset driver
106eea2926bSSibi Sankar	  for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
107eea2926bSSibi Sankar	  to control reset signals provided by PDC for Modem, Compute,
108eea2926bSSibi Sankar	  Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
109eea2926bSSibi Sankar
11081c22ad0SPhilipp Zabelconfig RESET_SIMPLE
11181c22ad0SPhilipp Zabel	bool "Simple Reset Controller Driver" if COMPILE_TEST
112*b3ca9888SDinh Nguyen	default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED
11381c22ad0SPhilipp Zabel	help
11481c22ad0SPhilipp Zabel	  This enables a simple reset controller driver for reset lines that
11581c22ad0SPhilipp Zabel	  that can be asserted and deasserted by toggling bits in a contiguous,
11681c22ad0SPhilipp Zabel	  exclusive register space.
11781c22ad0SPhilipp Zabel
1181d7592f8SJoel Stanley	  Currently this driver supports:
1191d7592f8SJoel Stanley	   - Altera SoCFPGAs
1201d7592f8SJoel Stanley	   - ASPEED BMC SoCs
1211d7592f8SJoel Stanley	   - RCC reset controller in STM32 MCUs
1221d7592f8SJoel Stanley	   - Allwinner SoCs
1231d7592f8SJoel Stanley	   - ZTE's zx2967 family
1247e0e901dSPhilipp Zabel
125197858b6SGabriel Fernandezconfig RESET_STM32MP157
126197858b6SGabriel Fernandez	bool "STM32MP157 Reset Driver" if COMPILE_TEST
127197858b6SGabriel Fernandez	default MACH_STM32MP157
128197858b6SGabriel Fernandez	help
129197858b6SGabriel Fernandez	  This enables the RCC reset controller driver for STM32 MPUs.
130197858b6SGabriel Fernandez
131*b3ca9888SDinh Nguyenconfig RESET_SOCFPGA
132*b3ca9888SDinh Nguyen	bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
133*b3ca9888SDinh Nguyen	default ARCH_SOCFPGA
134*b3ca9888SDinh Nguyen	select RESET_SIMPLE
135*b3ca9888SDinh Nguyen	help
136*b3ca9888SDinh Nguyen	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
137*b3ca9888SDinh Nguyen	  driver gets initialized early during platform init calls.
138*b3ca9888SDinh Nguyen
1390ae08419SPhilipp Zabelconfig RESET_SUNXI
1400ae08419SPhilipp Zabel	bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
1410ae08419SPhilipp Zabel	default ARCH_SUNXI
142e13c205aSPhilipp Zabel	select RESET_SIMPLE
1430ae08419SPhilipp Zabel	help
1440ae08419SPhilipp Zabel	  This enables the reset driver for Allwinner SoCs.
1450ae08419SPhilipp Zabel
14628df169bSAndrew F. Davisconfig RESET_TI_SCI
14728df169bSAndrew F. Davis	tristate "TI System Control Interface (TI-SCI) reset driver"
14828df169bSAndrew F. Davis	depends on TI_SCI_PROTOCOL
14928df169bSAndrew F. Davis	help
15028df169bSAndrew F. Davis	  This enables the reset driver support over TI System Control Interface
15128df169bSAndrew F. Davis	  available on some new TI's SoCs. If you wish to use reset resources
15228df169bSAndrew F. Davis	  managed by the TI System Controller, say Y here. Otherwise, say N.
15328df169bSAndrew F. Davis
154dd9bf863SSuman Annaconfig RESET_TI_SYSCON
155cc7c2bb1SAndrew F. Davis	tristate "TI SYSCON Reset Driver"
156cc7c2bb1SAndrew F. Davis	depends on HAS_IOMEM
157cc7c2bb1SAndrew F. Davis	select MFD_SYSCON
158cc7c2bb1SAndrew F. Davis	help
159cc7c2bb1SAndrew F. Davis	  This enables the reset driver support for TI devices with
160cc7c2bb1SAndrew F. Davis	  memory-mapped reset registers as part of a syscon device node. If
161cc7c2bb1SAndrew F. Davis	  you wish to use the reset framework for such memory-mapped devices,
162cc7c2bb1SAndrew F. Davis	  say Y here. Otherwise, say N.
163cc7c2bb1SAndrew F. Davis
16454e991b5SMasahiro Yamadaconfig RESET_UNIPHIER
16554e991b5SMasahiro Yamada	tristate "Reset controller driver for UniPhier SoCs"
16654e991b5SMasahiro Yamada	depends on ARCH_UNIPHIER || COMPILE_TEST
16754e991b5SMasahiro Yamada	depends on OF && MFD_SYSCON
16854e991b5SMasahiro Yamada	default ARCH_UNIPHIER
16954e991b5SMasahiro Yamada	help
17054e991b5SMasahiro Yamada	  Support for reset controllers on UniPhier SoCs.
17154e991b5SMasahiro Yamada	  Say Y if you want to control reset signals provided by System Control
17254e991b5SMasahiro Yamada	  block, Media I/O block, Peripheral Block.
17354e991b5SMasahiro Yamada
174499fef09SKunihiko Hayashiconfig RESET_UNIPHIER_USB3
175499fef09SKunihiko Hayashi	tristate "USB3 reset driver for UniPhier SoCs"
176499fef09SKunihiko Hayashi	depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
177499fef09SKunihiko Hayashi	default ARCH_UNIPHIER
178499fef09SKunihiko Hayashi	select RESET_SIMPLE
179499fef09SKunihiko Hayashi	help
180499fef09SKunihiko Hayashi	  Support for the USB3 core reset on UniPhier SoCs.
181499fef09SKunihiko Hayashi	  Say Y if you want to control reset signals provided by
182499fef09SKunihiko Hayashi	  USB3 glue layer.
183499fef09SKunihiko Hayashi
1846f51b860SPhilipp Zabelconfig RESET_ZYNQ
1856f51b860SPhilipp Zabel	bool "ZYNQ Reset Driver" if COMPILE_TEST
1866f51b860SPhilipp Zabel	default ARCH_ZYNQ
1876f51b860SPhilipp Zabel	help
1886f51b860SPhilipp Zabel	  This enables the reset controller driver for Xilinx Zynq SoCs.
1896f51b860SPhilipp Zabel
190e5d76075SStephen Gallimoresource "drivers/reset/sti/Kconfig"
191f59d23c2SChen Fengsource "drivers/reset/hisilicon/Kconfig"
192dc606c52SThierry Redingsource "drivers/reset/tegra/Kconfig"
193998cd463SMasahiro Yamada
194998cd463SMasahiro Yamadaendif
195