1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 261fc4131SPhilipp Zabelconfig ARCH_HAS_RESET_CONTROLLER 361fc4131SPhilipp Zabel bool 461fc4131SPhilipp Zabel 561fc4131SPhilipp Zabelmenuconfig RESET_CONTROLLER 661fc4131SPhilipp Zabel bool "Reset Controller Support" 761fc4131SPhilipp Zabel default y if ARCH_HAS_RESET_CONTROLLER 861fc4131SPhilipp Zabel help 961fc4131SPhilipp Zabel Generic Reset Controller support. 1061fc4131SPhilipp Zabel 1161fc4131SPhilipp Zabel This framework is designed to abstract reset handling of devices 1261fc4131SPhilipp Zabel via GPIOs or SoC-internal reset controller modules. 1361fc4131SPhilipp Zabel 1461fc4131SPhilipp Zabel If unsure, say no. 15e5d76075SStephen Gallimore 16998cd463SMasahiro Yamadaif RESET_CONTROLLER 17998cd463SMasahiro Yamada 1862700682SThor Thayerconfig RESET_A10SR 1962700682SThor Thayer tristate "Altera Arria10 System Resource Reset" 2062700682SThor Thayer depends on MFD_ALTERA_A10SR 2162700682SThor Thayer help 2262700682SThor Thayer This option enables support for the external reset functions for 2362700682SThor Thayer peripheral PHYs on the Altera Arria10 System Resource Chip. 2462700682SThor Thayer 25e27b4a6eSPhilipp Zabelconfig RESET_ATH79 26e27b4a6eSPhilipp Zabel bool "AR71xx Reset Driver" if COMPILE_TEST 27e27b4a6eSPhilipp Zabel default ATH79 28e27b4a6eSPhilipp Zabel help 29e27b4a6eSPhilipp Zabel This enables the ATH79 reset controller driver that supports the 30e27b4a6eSPhilipp Zabel AR71xx SoC reset controller. 31e27b4a6eSPhilipp Zabel 3237634923SEugeniy Paltsevconfig RESET_AXS10X 3337634923SEugeniy Paltsev bool "AXS10x Reset Driver" if COMPILE_TEST 3437634923SEugeniy Paltsev default ARC_PLAT_AXS10X 3537634923SEugeniy Paltsev help 3637634923SEugeniy Paltsev This enables the reset controller driver for AXS10x. 3737634923SEugeniy Paltsev 38aac02543SÁlvaro Fernández Rojasconfig RESET_BCM6345 39aac02543SÁlvaro Fernández Rojas bool "BCM6345 Reset Controller" 40aac02543SÁlvaro Fernández Rojas depends on BMIPS_GENERIC || COMPILE_TEST 41aac02543SÁlvaro Fernández Rojas default BMIPS_GENERIC 42aac02543SÁlvaro Fernández Rojas help 43aac02543SÁlvaro Fernández Rojas This enables the reset controller driver for BCM6345 SoCs. 44aac02543SÁlvaro Fernández Rojas 4570d467eaSPhilipp Zabelconfig RESET_BERLIN 4670d467eaSPhilipp Zabel bool "Berlin Reset Driver" if COMPILE_TEST 4770d467eaSPhilipp Zabel default ARCH_BERLIN 4870d467eaSPhilipp Zabel help 4970d467eaSPhilipp Zabel This enables the reset controller driver for Marvell Berlin SoCs. 5070d467eaSPhilipp Zabel 5177750bc0SFlorian Fainelliconfig RESET_BRCMSTB 5277750bc0SFlorian Fainelli tristate "Broadcom STB reset controller" 5377750bc0SFlorian Fainelli depends on ARCH_BRCMSTB || COMPILE_TEST 5477750bc0SFlorian Fainelli default ARCH_BRCMSTB 5577750bc0SFlorian Fainelli help 5677750bc0SFlorian Fainelli This enables the reset controller driver for Broadcom STB SoCs using 5777750bc0SFlorian Fainelli a SUN_TOP_CTRL_SW_INIT style controller. 5877750bc0SFlorian Fainelli 594cf176e5SJim Quinlanconfig RESET_BRCMSTB_RESCAL 604cf176e5SJim Quinlan bool "Broadcom STB RESCAL reset controller" 617fbcc535SBrendan Higgins depends on HAS_IOMEM 624cf176e5SJim Quinlan default ARCH_BRCMSTB || COMPILE_TEST 634cf176e5SJim Quinlan help 644cf176e5SJim Quinlan This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on 654cf176e5SJim Quinlan BCM7216. 664cf176e5SJim Quinlan 6713541226SVineet Guptaconfig RESET_HSDK 6813541226SVineet Gupta bool "Synopsys HSDK Reset Driver" 692d48a237SThomas Meyer depends on HAS_IOMEM 70544e3bf4SGeert Uytterhoeven depends on ARC_SOC_HSDK || COMPILE_TEST 71e0be864fSEugeniy Paltsev help 7213541226SVineet Gupta This enables the reset controller driver for HSDK board. 73e0be864fSEugeniy Paltsev 74abf97755SAndrey Smirnovconfig RESET_IMX7 75a442abbbSAnson Huang tristate "i.MX7/8 Reset Driver" 768fa56620SMasahiro Yamada depends on HAS_IOMEM 77a442abbbSAnson Huang depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST 78a442abbbSAnson Huang default y if SOC_IMX7D 79abf97755SAndrey Smirnov select MFD_SYSCON 80abf97755SAndrey Smirnov help 81abf97755SAndrey Smirnov This enables the reset controller driver for i.MX7 SoCs. 82abf97755SAndrey Smirnov 83c9aef213SDilip Kotaconfig RESET_INTEL_GW 84c9aef213SDilip Kota bool "Intel Reset Controller Driver" 85b460e0a9SBrendan Higgins depends on OF && HAS_IOMEM 86c9aef213SDilip Kota select REGMAP_MMIO 87c9aef213SDilip Kota help 88c9aef213SDilip Kota This enables the reset controller driver for Intel Gateway SoCs. 89c9aef213SDilip Kota Say Y to control the reset signals provided by reset controller. 90c9aef213SDilip Kota Otherwise, say N. 91c9aef213SDilip Kota 925a2308daSDamien Le Moalconfig RESET_K210 935a2308daSDamien Le Moal bool "Reset controller driver for Canaan Kendryte K210 SoC" 945a2308daSDamien Le Moal depends on (SOC_CANAAN || COMPILE_TEST) && OF 955a2308daSDamien Le Moal select MFD_SYSCON 965a2308daSDamien Le Moal default SOC_CANAAN 975a2308daSDamien Le Moal help 985a2308daSDamien Le Moal Support for the Canaan Kendryte K210 RISC-V SoC reset controller. 995a2308daSDamien Le Moal Say Y if you want to control reset signals provided by this 1005a2308daSDamien Le Moal controller. 1015a2308daSDamien Le Moal 10279797b6fSMartin Blumenstinglconfig RESET_LANTIQ 10379797b6fSMartin Blumenstingl bool "Lantiq XWAY Reset Driver" if COMPILE_TEST 10479797b6fSMartin Blumenstingl default SOC_TYPE_XWAY 10579797b6fSMartin Blumenstingl help 10679797b6fSMartin Blumenstingl This enables the reset controller driver for Lantiq / Intel XWAY SoCs. 10779797b6fSMartin Blumenstingl 108cd7f4b81SPhilipp Zabelconfig RESET_LPC18XX 109cd7f4b81SPhilipp Zabel bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST 110cd7f4b81SPhilipp Zabel default ARCH_LPC18XX 111cd7f4b81SPhilipp Zabel help 112cd7f4b81SPhilipp Zabel This enables the reset controller driver for NXP LPC18xx/43xx SoCs. 113cd7f4b81SPhilipp Zabel 11444336c24SPhilipp Zabelconfig RESET_MESON 1153bfe8933SNeil Armstrong tristate "Meson Reset Driver" 1163bfe8933SNeil Armstrong depends on ARCH_MESON || COMPILE_TEST 11744336c24SPhilipp Zabel default ARCH_MESON 11844336c24SPhilipp Zabel help 11944336c24SPhilipp Zabel This enables the reset driver for Amlogic Meson SoCs. 12044336c24SPhilipp Zabel 121d903779bSJerome Brunetconfig RESET_MESON_AUDIO_ARB 122d903779bSJerome Brunet tristate "Meson Audio Memory Arbiter Reset Driver" 123d903779bSJerome Brunet depends on ARCH_MESON || COMPILE_TEST 124d903779bSJerome Brunet help 125d903779bSJerome Brunet This enables the reset driver for Audio Memory Arbiter of 126d903779bSJerome Brunet Amlogic's A113 based SoCs 127d903779bSJerome Brunet 1289c81b2ccSTomer Maimonconfig RESET_NPCM 1299c81b2ccSTomer Maimon bool "NPCM BMC Reset Driver" if COMPILE_TEST 1309c81b2ccSTomer Maimon default ARCH_NPCM 1319c81b2ccSTomer Maimon help 1329c81b2ccSTomer Maimon This enables the reset controller driver for Nuvoton NPCM 1339c81b2ccSTomer Maimon BMC SoCs. 1349c81b2ccSTomer Maimon 1356e667facSNeil Armstrongconfig RESET_OXNAS 1366e667facSNeil Armstrong bool 1376e667facSNeil Armstrong 138fab3f730SPhilipp Zabelconfig RESET_PISTACHIO 139fab3f730SPhilipp Zabel bool "Pistachio Reset Driver" if COMPILE_TEST 140fab3f730SPhilipp Zabel default MACH_PISTACHIO 141fab3f730SPhilipp Zabel help 142fab3f730SPhilipp Zabel This enables the reset driver for ImgTec Pistachio SoCs. 143fab3f730SPhilipp Zabel 1445ecb0651SSibi Sankarconfig RESET_QCOM_AOSS 145e2d5e833SJohn Stultz tristate "Qcom AOSS Reset Driver" 1465ecb0651SSibi Sankar depends on ARCH_QCOM || COMPILE_TEST 1475ecb0651SSibi Sankar help 1485ecb0651SSibi Sankar This enables the AOSS (always on subsystem) reset driver 1495ecb0651SSibi Sankar for Qualcomm SDM845 SoCs. Say Y if you want to control 1505ecb0651SSibi Sankar reset signals provided by AOSS for Modem, Venus, ADSP, 1515ecb0651SSibi Sankar GPU, Camera, Wireless, Display subsystem. Otherwise, say N. 1525ecb0651SSibi Sankar 153eea2926bSSibi Sankarconfig RESET_QCOM_PDC 154eea2926bSSibi Sankar tristate "Qualcomm PDC Reset Driver" 155eea2926bSSibi Sankar depends on ARCH_QCOM || COMPILE_TEST 156eea2926bSSibi Sankar help 157eea2926bSSibi Sankar This enables the PDC (Power Domain Controller) reset driver 158eea2926bSSibi Sankar for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want 159eea2926bSSibi Sankar to control reset signals provided by PDC for Modem, Compute, 160eea2926bSSibi Sankar Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS. 161eea2926bSSibi Sankar 162abffc82aSNicolas Saenz Julienneconfig RESET_RASPBERRYPI 163abffc82aSNicolas Saenz Julienne tristate "Raspberry Pi 4 Firmware Reset Driver" 164abffc82aSNicolas Saenz Julienne depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST) 165abffc82aSNicolas Saenz Julienne default USB_XHCI_PCI 166abffc82aSNicolas Saenz Julienne help 167abffc82aSNicolas Saenz Julienne Raspberry Pi 4's co-processor controls some of the board's HW 168abffc82aSNicolas Saenz Julienne initialization process, but it's up to Linux to trigger it when 169abffc82aSNicolas Saenz Julienne relevant. This driver provides a reset controller capable of 170abffc82aSNicolas Saenz Julienne interfacing with RPi4's co-processor and model these firmware 171abffc82aSNicolas Saenz Julienne initialization routines as reset lines. 172abffc82aSNicolas Saenz Julienne 173c8ae9c2dSSudeep Hollaconfig RESET_SCMI 174c8ae9c2dSSudeep Holla tristate "Reset driver controlled via ARM SCMI interface" 175c8ae9c2dSSudeep Holla depends on ARM_SCMI_PROTOCOL || COMPILE_TEST 176c8ae9c2dSSudeep Holla default ARM_SCMI_PROTOCOL 177c8ae9c2dSSudeep Holla help 178c8ae9c2dSSudeep Holla This driver provides support for reset signal/domains that are 179c8ae9c2dSSudeep Holla controlled by firmware that implements the SCMI interface. 180c8ae9c2dSSudeep Holla 181c8ae9c2dSSudeep Holla This driver uses SCMI Message Protocol to interact with the 182c8ae9c2dSSudeep Holla firmware controlling all the reset signals. 183c8ae9c2dSSudeep Holla 18481c22ad0SPhilipp Zabelconfig RESET_SIMPLE 18581c22ad0SPhilipp Zabel bool "Simple Reset Controller Driver" if COMPILE_TEST 186*4a9a1a56SKrzysztof Kozlowski default ARCH_ASPEED || ARCH_BCM4908 || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || (ARCH_INTEL_SOCFPGA && ARM64) || ARCH_SUNXI || ARC 18781c22ad0SPhilipp Zabel help 18881c22ad0SPhilipp Zabel This enables a simple reset controller driver for reset lines that 18981c22ad0SPhilipp Zabel that can be asserted and deasserted by toggling bits in a contiguous, 19081c22ad0SPhilipp Zabel exclusive register space. 19181c22ad0SPhilipp Zabel 1921d7592f8SJoel Stanley Currently this driver supports: 1931d7592f8SJoel Stanley - Altera SoCFPGAs 1941d7592f8SJoel Stanley - ASPEED BMC SoCs 1955ac33eebSAndreas Färber - Bitmain BM1880 SoC 1963ab831e5SAndreas Färber - Realtek SoCs 1971d7592f8SJoel Stanley - RCC reset controller in STM32 MCUs 1981d7592f8SJoel Stanley - Allwinner SoCs 1991d7592f8SJoel Stanley - ZTE's zx2967 family 2007e0e901dSPhilipp Zabel 201197858b6SGabriel Fernandezconfig RESET_STM32MP157 202197858b6SGabriel Fernandez bool "STM32MP157 Reset Driver" if COMPILE_TEST 203197858b6SGabriel Fernandez default MACH_STM32MP157 204197858b6SGabriel Fernandez help 205197858b6SGabriel Fernandez This enables the RCC reset controller driver for STM32 MPUs. 206197858b6SGabriel Fernandez 207b3ca9888SDinh Nguyenconfig RESET_SOCFPGA 208b3ca9888SDinh Nguyen bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA 209b3ca9888SDinh Nguyen default ARCH_SOCFPGA 210b3ca9888SDinh Nguyen select RESET_SIMPLE 211b3ca9888SDinh Nguyen help 212b3ca9888SDinh Nguyen This enables the reset driver for the SoCFPGA ARMv7 platforms. This 213b3ca9888SDinh Nguyen driver gets initialized early during platform init calls. 214b3ca9888SDinh Nguyen 2150ae08419SPhilipp Zabelconfig RESET_SUNXI 2160ae08419SPhilipp Zabel bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI 2170ae08419SPhilipp Zabel default ARCH_SUNXI 218e13c205aSPhilipp Zabel select RESET_SIMPLE 2190ae08419SPhilipp Zabel help 2200ae08419SPhilipp Zabel This enables the reset driver for Allwinner SoCs. 2210ae08419SPhilipp Zabel 22228df169bSAndrew F. Davisconfig RESET_TI_SCI 22328df169bSAndrew F. Davis tristate "TI System Control Interface (TI-SCI) reset driver" 22428df169bSAndrew F. Davis depends on TI_SCI_PROTOCOL 22528df169bSAndrew F. Davis help 22628df169bSAndrew F. Davis This enables the reset driver support over TI System Control Interface 22728df169bSAndrew F. Davis available on some new TI's SoCs. If you wish to use reset resources 22828df169bSAndrew F. Davis managed by the TI System Controller, say Y here. Otherwise, say N. 22928df169bSAndrew F. Davis 230dd9bf863SSuman Annaconfig RESET_TI_SYSCON 231cc7c2bb1SAndrew F. Davis tristate "TI SYSCON Reset Driver" 232cc7c2bb1SAndrew F. Davis depends on HAS_IOMEM 233cc7c2bb1SAndrew F. Davis select MFD_SYSCON 234cc7c2bb1SAndrew F. Davis help 235cc7c2bb1SAndrew F. Davis This enables the reset driver support for TI devices with 236cc7c2bb1SAndrew F. Davis memory-mapped reset registers as part of a syscon device node. If 237cc7c2bb1SAndrew F. Davis you wish to use the reset framework for such memory-mapped devices, 238cc7c2bb1SAndrew F. Davis say Y here. Otherwise, say N. 239cc7c2bb1SAndrew F. Davis 24054e991b5SMasahiro Yamadaconfig RESET_UNIPHIER 24154e991b5SMasahiro Yamada tristate "Reset controller driver for UniPhier SoCs" 24254e991b5SMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 24354e991b5SMasahiro Yamada depends on OF && MFD_SYSCON 24454e991b5SMasahiro Yamada default ARCH_UNIPHIER 24554e991b5SMasahiro Yamada help 24654e991b5SMasahiro Yamada Support for reset controllers on UniPhier SoCs. 24754e991b5SMasahiro Yamada Say Y if you want to control reset signals provided by System Control 24854e991b5SMasahiro Yamada block, Media I/O block, Peripheral Block. 24954e991b5SMasahiro Yamada 2503eb8f765SKunihiko Hayashiconfig RESET_UNIPHIER_GLUE 2513eb8f765SKunihiko Hayashi tristate "Reset driver in glue layer for UniPhier SoCs" 252499fef09SKunihiko Hayashi depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF 253499fef09SKunihiko Hayashi default ARCH_UNIPHIER 254499fef09SKunihiko Hayashi select RESET_SIMPLE 255499fef09SKunihiko Hayashi help 2563eb8f765SKunihiko Hayashi Support for peripheral core reset included in its own glue layer 2573eb8f765SKunihiko Hayashi on UniPhier SoCs. Say Y if you want to control reset signals 2583eb8f765SKunihiko Hayashi provided by the glue layer. 259499fef09SKunihiko Hayashi 2606f51b860SPhilipp Zabelconfig RESET_ZYNQ 2616f51b860SPhilipp Zabel bool "ZYNQ Reset Driver" if COMPILE_TEST 2626f51b860SPhilipp Zabel default ARCH_ZYNQ 2636f51b860SPhilipp Zabel help 2646f51b860SPhilipp Zabel This enables the reset controller driver for Xilinx Zynq SoCs. 2656f51b860SPhilipp Zabel 266e5d76075SStephen Gallimoresource "drivers/reset/sti/Kconfig" 267f59d23c2SChen Fengsource "drivers/reset/hisilicon/Kconfig" 268dc606c52SThierry Redingsource "drivers/reset/tegra/Kconfig" 269998cd463SMasahiro Yamada 270998cd463SMasahiro Yamadaendif 271