xref: /openbmc/linux/drivers/reset/Kconfig (revision 3bfe8933)
1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only
261fc4131SPhilipp Zabelconfig ARCH_HAS_RESET_CONTROLLER
361fc4131SPhilipp Zabel	bool
461fc4131SPhilipp Zabel
561fc4131SPhilipp Zabelmenuconfig RESET_CONTROLLER
661fc4131SPhilipp Zabel	bool "Reset Controller Support"
761fc4131SPhilipp Zabel	default y if ARCH_HAS_RESET_CONTROLLER
861fc4131SPhilipp Zabel	help
961fc4131SPhilipp Zabel	  Generic Reset Controller support.
1061fc4131SPhilipp Zabel
1161fc4131SPhilipp Zabel	  This framework is designed to abstract reset handling of devices
1261fc4131SPhilipp Zabel	  via GPIOs or SoC-internal reset controller modules.
1361fc4131SPhilipp Zabel
1461fc4131SPhilipp Zabel	  If unsure, say no.
15e5d76075SStephen Gallimore
16998cd463SMasahiro Yamadaif RESET_CONTROLLER
17998cd463SMasahiro Yamada
1862700682SThor Thayerconfig RESET_A10SR
1962700682SThor Thayer	tristate "Altera Arria10 System Resource Reset"
2062700682SThor Thayer	depends on MFD_ALTERA_A10SR
2162700682SThor Thayer	help
2262700682SThor Thayer	  This option enables support for the external reset functions for
2362700682SThor Thayer	  peripheral PHYs on the Altera Arria10 System Resource Chip.
2462700682SThor Thayer
25e27b4a6eSPhilipp Zabelconfig RESET_ATH79
26e27b4a6eSPhilipp Zabel	bool "AR71xx Reset Driver" if COMPILE_TEST
27e27b4a6eSPhilipp Zabel	default ATH79
28e27b4a6eSPhilipp Zabel	help
29e27b4a6eSPhilipp Zabel	  This enables the ATH79 reset controller driver that supports the
30e27b4a6eSPhilipp Zabel	  AR71xx SoC reset controller.
31e27b4a6eSPhilipp Zabel
3237634923SEugeniy Paltsevconfig RESET_AXS10X
3337634923SEugeniy Paltsev	bool "AXS10x Reset Driver" if COMPILE_TEST
3437634923SEugeniy Paltsev	default ARC_PLAT_AXS10X
3537634923SEugeniy Paltsev	help
3637634923SEugeniy Paltsev	  This enables the reset controller driver for AXS10x.
3737634923SEugeniy Paltsev
3870d467eaSPhilipp Zabelconfig RESET_BERLIN
3970d467eaSPhilipp Zabel	bool "Berlin Reset Driver" if COMPILE_TEST
4070d467eaSPhilipp Zabel	default ARCH_BERLIN
4170d467eaSPhilipp Zabel	help
4270d467eaSPhilipp Zabel	  This enables the reset controller driver for Marvell Berlin SoCs.
4370d467eaSPhilipp Zabel
4477750bc0SFlorian Fainelliconfig RESET_BRCMSTB
4577750bc0SFlorian Fainelli	tristate "Broadcom STB reset controller"
4677750bc0SFlorian Fainelli	depends on ARCH_BRCMSTB || COMPILE_TEST
4777750bc0SFlorian Fainelli	default ARCH_BRCMSTB
4877750bc0SFlorian Fainelli	help
4977750bc0SFlorian Fainelli	  This enables the reset controller driver for Broadcom STB SoCs using
5077750bc0SFlorian Fainelli	  a SUN_TOP_CTRL_SW_INIT style controller.
5177750bc0SFlorian Fainelli
524cf176e5SJim Quinlanconfig RESET_BRCMSTB_RESCAL
534cf176e5SJim Quinlan	bool "Broadcom STB RESCAL reset controller"
547fbcc535SBrendan Higgins	depends on HAS_IOMEM
554cf176e5SJim Quinlan	default ARCH_BRCMSTB || COMPILE_TEST
564cf176e5SJim Quinlan	help
574cf176e5SJim Quinlan	  This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on
584cf176e5SJim Quinlan	  BCM7216.
594cf176e5SJim Quinlan
6013541226SVineet Guptaconfig RESET_HSDK
6113541226SVineet Gupta	bool "Synopsys HSDK Reset Driver"
622d48a237SThomas Meyer	depends on HAS_IOMEM
63544e3bf4SGeert Uytterhoeven	depends on ARC_SOC_HSDK || COMPILE_TEST
64e0be864fSEugeniy Paltsev	help
6513541226SVineet Gupta	  This enables the reset controller driver for HSDK board.
66e0be864fSEugeniy Paltsev
67abf97755SAndrey Smirnovconfig RESET_IMX7
68a442abbbSAnson Huang	tristate "i.MX7/8 Reset Driver"
698fa56620SMasahiro Yamada	depends on HAS_IOMEM
70a442abbbSAnson Huang	depends on SOC_IMX7D || (ARM64 && ARCH_MXC) || COMPILE_TEST
71a442abbbSAnson Huang	default y if SOC_IMX7D
72abf97755SAndrey Smirnov	select MFD_SYSCON
73abf97755SAndrey Smirnov	help
74abf97755SAndrey Smirnov	  This enables the reset controller driver for i.MX7 SoCs.
75abf97755SAndrey Smirnov
76c9aef213SDilip Kotaconfig RESET_INTEL_GW
77c9aef213SDilip Kota	bool "Intel Reset Controller Driver"
78b460e0a9SBrendan Higgins	depends on OF && HAS_IOMEM
79c9aef213SDilip Kota	select REGMAP_MMIO
80c9aef213SDilip Kota	help
81c9aef213SDilip Kota	  This enables the reset controller driver for Intel Gateway SoCs.
82c9aef213SDilip Kota	  Say Y to control the reset signals provided by reset controller.
83c9aef213SDilip Kota	  Otherwise, say N.
84c9aef213SDilip Kota
8579797b6fSMartin Blumenstinglconfig RESET_LANTIQ
8679797b6fSMartin Blumenstingl	bool "Lantiq XWAY Reset Driver" if COMPILE_TEST
8779797b6fSMartin Blumenstingl	default SOC_TYPE_XWAY
8879797b6fSMartin Blumenstingl	help
8979797b6fSMartin Blumenstingl	  This enables the reset controller driver for Lantiq / Intel XWAY SoCs.
9079797b6fSMartin Blumenstingl
91cd7f4b81SPhilipp Zabelconfig RESET_LPC18XX
92cd7f4b81SPhilipp Zabel	bool "LPC18xx/43xx Reset Driver" if COMPILE_TEST
93cd7f4b81SPhilipp Zabel	default ARCH_LPC18XX
94cd7f4b81SPhilipp Zabel	help
95cd7f4b81SPhilipp Zabel	  This enables the reset controller driver for NXP LPC18xx/43xx SoCs.
96cd7f4b81SPhilipp Zabel
9744336c24SPhilipp Zabelconfig RESET_MESON
98*3bfe8933SNeil Armstrong	tristate "Meson Reset Driver"
99*3bfe8933SNeil Armstrong	depends on ARCH_MESON || COMPILE_TEST
10044336c24SPhilipp Zabel	default ARCH_MESON
10144336c24SPhilipp Zabel	help
10244336c24SPhilipp Zabel	  This enables the reset driver for Amlogic Meson SoCs.
10344336c24SPhilipp Zabel
104d903779bSJerome Brunetconfig RESET_MESON_AUDIO_ARB
105d903779bSJerome Brunet	tristate "Meson Audio Memory Arbiter Reset Driver"
106d903779bSJerome Brunet	depends on ARCH_MESON || COMPILE_TEST
107d903779bSJerome Brunet	help
108d903779bSJerome Brunet	  This enables the reset driver for Audio Memory Arbiter of
109d903779bSJerome Brunet	  Amlogic's A113 based SoCs
110d903779bSJerome Brunet
1119c81b2ccSTomer Maimonconfig RESET_NPCM
1129c81b2ccSTomer Maimon	bool "NPCM BMC Reset Driver" if COMPILE_TEST
1139c81b2ccSTomer Maimon	default ARCH_NPCM
1149c81b2ccSTomer Maimon	help
1159c81b2ccSTomer Maimon	  This enables the reset controller driver for Nuvoton NPCM
1169c81b2ccSTomer Maimon	  BMC SoCs.
1179c81b2ccSTomer Maimon
1186e667facSNeil Armstrongconfig RESET_OXNAS
1196e667facSNeil Armstrong	bool
1206e667facSNeil Armstrong
121fab3f730SPhilipp Zabelconfig RESET_PISTACHIO
122fab3f730SPhilipp Zabel	bool "Pistachio Reset Driver" if COMPILE_TEST
123fab3f730SPhilipp Zabel	default MACH_PISTACHIO
124fab3f730SPhilipp Zabel	help
125fab3f730SPhilipp Zabel	  This enables the reset driver for ImgTec Pistachio SoCs.
126fab3f730SPhilipp Zabel
1275ecb0651SSibi Sankarconfig RESET_QCOM_AOSS
128e2d5e833SJohn Stultz	tristate "Qcom AOSS Reset Driver"
1295ecb0651SSibi Sankar	depends on ARCH_QCOM || COMPILE_TEST
1305ecb0651SSibi Sankar	help
1315ecb0651SSibi Sankar	  This enables the AOSS (always on subsystem) reset driver
1325ecb0651SSibi Sankar	  for Qualcomm SDM845 SoCs. Say Y if you want to control
1335ecb0651SSibi Sankar	  reset signals provided by AOSS for Modem, Venus, ADSP,
1345ecb0651SSibi Sankar	  GPU, Camera, Wireless, Display subsystem. Otherwise, say N.
1355ecb0651SSibi Sankar
136eea2926bSSibi Sankarconfig RESET_QCOM_PDC
137eea2926bSSibi Sankar	tristate "Qualcomm PDC Reset Driver"
138eea2926bSSibi Sankar	depends on ARCH_QCOM || COMPILE_TEST
139eea2926bSSibi Sankar	help
140eea2926bSSibi Sankar	  This enables the PDC (Power Domain Controller) reset driver
141eea2926bSSibi Sankar	  for Qualcomm Technologies Inc SDM845 SoCs. Say Y if you want
142eea2926bSSibi Sankar	  to control reset signals provided by PDC for Modem, Compute,
143eea2926bSSibi Sankar	  Display, GPU, Debug, AOP, Sensors, Audio, SP and APPS.
144eea2926bSSibi Sankar
145abffc82aSNicolas Saenz Julienneconfig RESET_RASPBERRYPI
146abffc82aSNicolas Saenz Julienne	tristate "Raspberry Pi 4 Firmware Reset Driver"
147abffc82aSNicolas Saenz Julienne	depends on RASPBERRYPI_FIRMWARE || (RASPBERRYPI_FIRMWARE=n && COMPILE_TEST)
148abffc82aSNicolas Saenz Julienne	default USB_XHCI_PCI
149abffc82aSNicolas Saenz Julienne	help
150abffc82aSNicolas Saenz Julienne	  Raspberry Pi 4's co-processor controls some of the board's HW
151abffc82aSNicolas Saenz Julienne	  initialization process, but it's up to Linux to trigger it when
152abffc82aSNicolas Saenz Julienne	  relevant. This driver provides a reset controller capable of
153abffc82aSNicolas Saenz Julienne	  interfacing with RPi4's co-processor and model these firmware
154abffc82aSNicolas Saenz Julienne	  initialization routines as reset lines.
155abffc82aSNicolas Saenz Julienne
156c8ae9c2dSSudeep Hollaconfig RESET_SCMI
157c8ae9c2dSSudeep Holla	tristate "Reset driver controlled via ARM SCMI interface"
158c8ae9c2dSSudeep Holla	depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
159c8ae9c2dSSudeep Holla	default ARM_SCMI_PROTOCOL
160c8ae9c2dSSudeep Holla	help
161c8ae9c2dSSudeep Holla	  This driver provides support for reset signal/domains that are
162c8ae9c2dSSudeep Holla	  controlled by firmware that implements the SCMI interface.
163c8ae9c2dSSudeep Holla
164c8ae9c2dSSudeep Holla	  This driver uses SCMI Message Protocol to interact with the
165c8ae9c2dSSudeep Holla	  firmware controlling all the reset signals.
166c8ae9c2dSSudeep Holla
16781c22ad0SPhilipp Zabelconfig RESET_SIMPLE
16881c22ad0SPhilipp Zabel	bool "Simple Reset Controller Driver" if COMPILE_TEST
1693ab831e5SAndreas Färber	default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC
17081c22ad0SPhilipp Zabel	help
17181c22ad0SPhilipp Zabel	  This enables a simple reset controller driver for reset lines that
17281c22ad0SPhilipp Zabel	  that can be asserted and deasserted by toggling bits in a contiguous,
17381c22ad0SPhilipp Zabel	  exclusive register space.
17481c22ad0SPhilipp Zabel
1751d7592f8SJoel Stanley	  Currently this driver supports:
1761d7592f8SJoel Stanley	   - Altera SoCFPGAs
1771d7592f8SJoel Stanley	   - ASPEED BMC SoCs
1785ac33eebSAndreas Färber	   - Bitmain BM1880 SoC
1793ab831e5SAndreas Färber	   - Realtek SoCs
1801d7592f8SJoel Stanley	   - RCC reset controller in STM32 MCUs
1811d7592f8SJoel Stanley	   - Allwinner SoCs
1821d7592f8SJoel Stanley	   - ZTE's zx2967 family
1837e0e901dSPhilipp Zabel
184197858b6SGabriel Fernandezconfig RESET_STM32MP157
185197858b6SGabriel Fernandez	bool "STM32MP157 Reset Driver" if COMPILE_TEST
186197858b6SGabriel Fernandez	default MACH_STM32MP157
187197858b6SGabriel Fernandez	help
188197858b6SGabriel Fernandez	  This enables the RCC reset controller driver for STM32 MPUs.
189197858b6SGabriel Fernandez
190b3ca9888SDinh Nguyenconfig RESET_SOCFPGA
191b3ca9888SDinh Nguyen	bool "SoCFPGA Reset Driver" if COMPILE_TEST && !ARCH_SOCFPGA
192b3ca9888SDinh Nguyen	default ARCH_SOCFPGA
193b3ca9888SDinh Nguyen	select RESET_SIMPLE
194b3ca9888SDinh Nguyen	help
195b3ca9888SDinh Nguyen	  This enables the reset driver for the SoCFPGA ARMv7 platforms. This
196b3ca9888SDinh Nguyen	  driver gets initialized early during platform init calls.
197b3ca9888SDinh Nguyen
1980ae08419SPhilipp Zabelconfig RESET_SUNXI
1990ae08419SPhilipp Zabel	bool "Allwinner SoCs Reset Driver" if COMPILE_TEST && !ARCH_SUNXI
2000ae08419SPhilipp Zabel	default ARCH_SUNXI
201e13c205aSPhilipp Zabel	select RESET_SIMPLE
2020ae08419SPhilipp Zabel	help
2030ae08419SPhilipp Zabel	  This enables the reset driver for Allwinner SoCs.
2040ae08419SPhilipp Zabel
20528df169bSAndrew F. Davisconfig RESET_TI_SCI
20628df169bSAndrew F. Davis	tristate "TI System Control Interface (TI-SCI) reset driver"
20728df169bSAndrew F. Davis	depends on TI_SCI_PROTOCOL
20828df169bSAndrew F. Davis	help
20928df169bSAndrew F. Davis	  This enables the reset driver support over TI System Control Interface
21028df169bSAndrew F. Davis	  available on some new TI's SoCs. If you wish to use reset resources
21128df169bSAndrew F. Davis	  managed by the TI System Controller, say Y here. Otherwise, say N.
21228df169bSAndrew F. Davis
213dd9bf863SSuman Annaconfig RESET_TI_SYSCON
214cc7c2bb1SAndrew F. Davis	tristate "TI SYSCON Reset Driver"
215cc7c2bb1SAndrew F. Davis	depends on HAS_IOMEM
216cc7c2bb1SAndrew F. Davis	select MFD_SYSCON
217cc7c2bb1SAndrew F. Davis	help
218cc7c2bb1SAndrew F. Davis	  This enables the reset driver support for TI devices with
219cc7c2bb1SAndrew F. Davis	  memory-mapped reset registers as part of a syscon device node. If
220cc7c2bb1SAndrew F. Davis	  you wish to use the reset framework for such memory-mapped devices,
221cc7c2bb1SAndrew F. Davis	  say Y here. Otherwise, say N.
222cc7c2bb1SAndrew F. Davis
22354e991b5SMasahiro Yamadaconfig RESET_UNIPHIER
22454e991b5SMasahiro Yamada	tristate "Reset controller driver for UniPhier SoCs"
22554e991b5SMasahiro Yamada	depends on ARCH_UNIPHIER || COMPILE_TEST
22654e991b5SMasahiro Yamada	depends on OF && MFD_SYSCON
22754e991b5SMasahiro Yamada	default ARCH_UNIPHIER
22854e991b5SMasahiro Yamada	help
22954e991b5SMasahiro Yamada	  Support for reset controllers on UniPhier SoCs.
23054e991b5SMasahiro Yamada	  Say Y if you want to control reset signals provided by System Control
23154e991b5SMasahiro Yamada	  block, Media I/O block, Peripheral Block.
23254e991b5SMasahiro Yamada
2333eb8f765SKunihiko Hayashiconfig RESET_UNIPHIER_GLUE
2343eb8f765SKunihiko Hayashi	tristate "Reset driver in glue layer for UniPhier SoCs"
235499fef09SKunihiko Hayashi	depends on (ARCH_UNIPHIER || COMPILE_TEST) && OF
236499fef09SKunihiko Hayashi	default ARCH_UNIPHIER
237499fef09SKunihiko Hayashi	select RESET_SIMPLE
238499fef09SKunihiko Hayashi	help
2393eb8f765SKunihiko Hayashi	  Support for peripheral core reset included in its own glue layer
2403eb8f765SKunihiko Hayashi	  on UniPhier SoCs. Say Y if you want to control reset signals
2413eb8f765SKunihiko Hayashi	  provided by the glue layer.
242499fef09SKunihiko Hayashi
2436f51b860SPhilipp Zabelconfig RESET_ZYNQ
2446f51b860SPhilipp Zabel	bool "ZYNQ Reset Driver" if COMPILE_TEST
2456f51b860SPhilipp Zabel	default ARCH_ZYNQ
2466f51b860SPhilipp Zabel	help
2476f51b860SPhilipp Zabel	  This enables the reset controller driver for Xilinx Zynq SoCs.
2486f51b860SPhilipp Zabel
249e5d76075SStephen Gallimoresource "drivers/reset/sti/Kconfig"
250f59d23c2SChen Fengsource "drivers/reset/hisilicon/Kconfig"
251dc606c52SThierry Redingsource "drivers/reset/tegra/Kconfig"
252998cd463SMasahiro Yamada
253998cd463SMasahiro Yamadaendif
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