1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996 4 * 5 * Copyright (C) 2016 Linaro Ltd 6 * Copyright (C) 2014 Sony Mobile Communications AB 7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/firmware.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/of_address.h> 16 #include <linux/of_device.h> 17 #include <linux/platform_device.h> 18 #include <linux/pm_domain.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/qcom_scm.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/remoteproc.h> 23 #include <linux/soc/qcom/mdt_loader.h> 24 #include <linux/soc/qcom/smem.h> 25 #include <linux/soc/qcom/smem_state.h> 26 27 #include "qcom_common.h" 28 #include "qcom_q6v5.h" 29 #include "remoteproc_internal.h" 30 31 struct adsp_data { 32 int crash_reason_smem; 33 const char *firmware_name; 34 int pas_id; 35 bool has_aggre2_clk; 36 bool auto_boot; 37 38 char **active_pd_names; 39 char **proxy_pd_names; 40 41 const char *ssr_name; 42 const char *sysmon_name; 43 int ssctl_id; 44 }; 45 46 struct qcom_adsp { 47 struct device *dev; 48 struct rproc *rproc; 49 50 struct qcom_q6v5 q6v5; 51 52 struct clk *xo; 53 struct clk *aggre2_clk; 54 55 struct regulator *cx_supply; 56 struct regulator *px_supply; 57 58 struct device *active_pds[1]; 59 struct device *proxy_pds[3]; 60 61 int active_pd_count; 62 int proxy_pd_count; 63 64 int pas_id; 65 int crash_reason_smem; 66 bool has_aggre2_clk; 67 68 struct completion start_done; 69 struct completion stop_done; 70 71 phys_addr_t mem_phys; 72 phys_addr_t mem_reloc; 73 void *mem_region; 74 size_t mem_size; 75 76 struct qcom_rproc_glink glink_subdev; 77 struct qcom_rproc_subdev smd_subdev; 78 struct qcom_rproc_ssr ssr_subdev; 79 struct qcom_sysmon *sysmon; 80 }; 81 82 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds, 83 size_t pd_count) 84 { 85 int ret; 86 int i; 87 88 for (i = 0; i < pd_count; i++) { 89 dev_pm_genpd_set_performance_state(pds[i], INT_MAX); 90 ret = pm_runtime_get_sync(pds[i]); 91 if (ret < 0) 92 goto unroll_pd_votes; 93 } 94 95 return 0; 96 97 unroll_pd_votes: 98 for (i--; i >= 0; i--) { 99 dev_pm_genpd_set_performance_state(pds[i], 0); 100 pm_runtime_put(pds[i]); 101 } 102 103 return ret; 104 }; 105 106 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds, 107 size_t pd_count) 108 { 109 int i; 110 111 for (i = 0; i < pd_count; i++) { 112 dev_pm_genpd_set_performance_state(pds[i], 0); 113 pm_runtime_put(pds[i]); 114 } 115 } 116 117 static int adsp_load(struct rproc *rproc, const struct firmware *fw) 118 { 119 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 120 121 return qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id, 122 adsp->mem_region, adsp->mem_phys, adsp->mem_size, 123 &adsp->mem_reloc); 124 125 } 126 127 static int adsp_start(struct rproc *rproc) 128 { 129 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 130 int ret; 131 132 qcom_q6v5_prepare(&adsp->q6v5); 133 134 ret = adsp_pds_enable(adsp, adsp->active_pds, adsp->active_pd_count); 135 if (ret < 0) 136 goto disable_irqs; 137 138 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 139 if (ret < 0) 140 goto disable_active_pds; 141 142 ret = clk_prepare_enable(adsp->xo); 143 if (ret) 144 goto disable_proxy_pds; 145 146 ret = clk_prepare_enable(adsp->aggre2_clk); 147 if (ret) 148 goto disable_xo_clk; 149 150 ret = regulator_enable(adsp->cx_supply); 151 if (ret) 152 goto disable_aggre2_clk; 153 154 ret = regulator_enable(adsp->px_supply); 155 if (ret) 156 goto disable_cx_supply; 157 158 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); 159 if (ret) { 160 dev_err(adsp->dev, 161 "failed to authenticate image and release reset\n"); 162 goto disable_px_supply; 163 } 164 165 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); 166 if (ret == -ETIMEDOUT) { 167 dev_err(adsp->dev, "start timed out\n"); 168 qcom_scm_pas_shutdown(adsp->pas_id); 169 goto disable_px_supply; 170 } 171 172 return 0; 173 174 disable_px_supply: 175 regulator_disable(adsp->px_supply); 176 disable_cx_supply: 177 regulator_disable(adsp->cx_supply); 178 disable_aggre2_clk: 179 clk_disable_unprepare(adsp->aggre2_clk); 180 disable_xo_clk: 181 clk_disable_unprepare(adsp->xo); 182 disable_proxy_pds: 183 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 184 disable_active_pds: 185 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count); 186 disable_irqs: 187 qcom_q6v5_unprepare(&adsp->q6v5); 188 189 return ret; 190 } 191 192 static void qcom_pas_handover(struct qcom_q6v5 *q6v5) 193 { 194 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5); 195 196 regulator_disable(adsp->px_supply); 197 regulator_disable(adsp->cx_supply); 198 clk_disable_unprepare(adsp->aggre2_clk); 199 clk_disable_unprepare(adsp->xo); 200 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 201 } 202 203 static int adsp_stop(struct rproc *rproc) 204 { 205 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 206 int handover; 207 int ret; 208 209 ret = qcom_q6v5_request_stop(&adsp->q6v5); 210 if (ret == -ETIMEDOUT) 211 dev_err(adsp->dev, "timed out on wait\n"); 212 213 ret = qcom_scm_pas_shutdown(adsp->pas_id); 214 if (ret) 215 dev_err(adsp->dev, "failed to shutdown: %d\n", ret); 216 217 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count); 218 handover = qcom_q6v5_unprepare(&adsp->q6v5); 219 if (handover) 220 qcom_pas_handover(&adsp->q6v5); 221 222 return ret; 223 } 224 225 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len) 226 { 227 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 228 int offset; 229 230 offset = da - adsp->mem_reloc; 231 if (offset < 0 || offset + len > adsp->mem_size) 232 return NULL; 233 234 return adsp->mem_region + offset; 235 } 236 237 static unsigned long adsp_panic(struct rproc *rproc) 238 { 239 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 240 241 return qcom_q6v5_panic(&adsp->q6v5); 242 } 243 244 static const struct rproc_ops adsp_ops = { 245 .start = adsp_start, 246 .stop = adsp_stop, 247 .da_to_va = adsp_da_to_va, 248 .parse_fw = qcom_register_dump_segments, 249 .load = adsp_load, 250 .panic = adsp_panic, 251 }; 252 253 static int adsp_init_clock(struct qcom_adsp *adsp) 254 { 255 int ret; 256 257 adsp->xo = devm_clk_get(adsp->dev, "xo"); 258 if (IS_ERR(adsp->xo)) { 259 ret = PTR_ERR(adsp->xo); 260 if (ret != -EPROBE_DEFER) 261 dev_err(adsp->dev, "failed to get xo clock"); 262 return ret; 263 } 264 265 if (adsp->has_aggre2_clk) { 266 adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2"); 267 if (IS_ERR(adsp->aggre2_clk)) { 268 ret = PTR_ERR(adsp->aggre2_clk); 269 if (ret != -EPROBE_DEFER) 270 dev_err(adsp->dev, 271 "failed to get aggre2 clock"); 272 return ret; 273 } 274 } 275 276 return 0; 277 } 278 279 static int adsp_init_regulator(struct qcom_adsp *adsp) 280 { 281 adsp->cx_supply = devm_regulator_get(adsp->dev, "cx"); 282 if (IS_ERR(adsp->cx_supply)) 283 return PTR_ERR(adsp->cx_supply); 284 285 regulator_set_load(adsp->cx_supply, 100000); 286 287 adsp->px_supply = devm_regulator_get(adsp->dev, "px"); 288 return PTR_ERR_OR_ZERO(adsp->px_supply); 289 } 290 291 static int adsp_pds_attach(struct device *dev, struct device **devs, 292 char **pd_names) 293 { 294 size_t num_pds = 0; 295 int ret; 296 int i; 297 298 if (!pd_names) 299 return 0; 300 301 /* Handle single power domain */ 302 if (dev->pm_domain) { 303 devs[0] = dev; 304 pm_runtime_enable(dev); 305 return 1; 306 } 307 308 while (pd_names[num_pds]) 309 num_pds++; 310 311 for (i = 0; i < num_pds; i++) { 312 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]); 313 if (IS_ERR_OR_NULL(devs[i])) { 314 ret = PTR_ERR(devs[i]) ? : -ENODATA; 315 goto unroll_attach; 316 } 317 } 318 319 return num_pds; 320 321 unroll_attach: 322 for (i--; i >= 0; i--) 323 dev_pm_domain_detach(devs[i], false); 324 325 return ret; 326 }; 327 328 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds, 329 size_t pd_count) 330 { 331 struct device *dev = adsp->dev; 332 int i; 333 334 /* Handle single power domain */ 335 if (dev->pm_domain && pd_count) { 336 pm_runtime_disable(dev); 337 return; 338 } 339 340 for (i = 0; i < pd_count; i++) 341 dev_pm_domain_detach(pds[i], false); 342 } 343 344 static int adsp_alloc_memory_region(struct qcom_adsp *adsp) 345 { 346 struct device_node *node; 347 struct resource r; 348 int ret; 349 350 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); 351 if (!node) { 352 dev_err(adsp->dev, "no memory-region specified\n"); 353 return -EINVAL; 354 } 355 356 ret = of_address_to_resource(node, 0, &r); 357 if (ret) 358 return ret; 359 360 adsp->mem_phys = adsp->mem_reloc = r.start; 361 adsp->mem_size = resource_size(&r); 362 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size); 363 if (!adsp->mem_region) { 364 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", 365 &r.start, adsp->mem_size); 366 return -EBUSY; 367 } 368 369 return 0; 370 } 371 372 static int adsp_probe(struct platform_device *pdev) 373 { 374 const struct adsp_data *desc; 375 struct qcom_adsp *adsp; 376 struct rproc *rproc; 377 const char *fw_name; 378 int ret; 379 380 desc = of_device_get_match_data(&pdev->dev); 381 if (!desc) 382 return -EINVAL; 383 384 if (!qcom_scm_is_available()) 385 return -EPROBE_DEFER; 386 387 fw_name = desc->firmware_name; 388 ret = of_property_read_string(pdev->dev.of_node, "firmware-name", 389 &fw_name); 390 if (ret < 0 && ret != -EINVAL) 391 return ret; 392 393 rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops, 394 fw_name, sizeof(*adsp)); 395 if (!rproc) { 396 dev_err(&pdev->dev, "unable to allocate remoteproc\n"); 397 return -ENOMEM; 398 } 399 400 rproc->auto_boot = desc->auto_boot; 401 402 adsp = (struct qcom_adsp *)rproc->priv; 403 adsp->dev = &pdev->dev; 404 adsp->rproc = rproc; 405 adsp->pas_id = desc->pas_id; 406 adsp->has_aggre2_clk = desc->has_aggre2_clk; 407 platform_set_drvdata(pdev, adsp); 408 409 ret = adsp_alloc_memory_region(adsp); 410 if (ret) 411 goto free_rproc; 412 413 ret = adsp_init_clock(adsp); 414 if (ret) 415 goto free_rproc; 416 417 ret = adsp_init_regulator(adsp); 418 if (ret) 419 goto free_rproc; 420 421 ret = adsp_pds_attach(&pdev->dev, adsp->active_pds, 422 desc->active_pd_names); 423 if (ret < 0) 424 goto free_rproc; 425 adsp->active_pd_count = ret; 426 427 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds, 428 desc->proxy_pd_names); 429 if (ret < 0) 430 goto detach_active_pds; 431 adsp->proxy_pd_count = ret; 432 433 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, 434 qcom_pas_handover); 435 if (ret) 436 goto detach_proxy_pds; 437 438 qcom_add_glink_subdev(rproc, &adsp->glink_subdev); 439 qcom_add_smd_subdev(rproc, &adsp->smd_subdev); 440 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name); 441 adsp->sysmon = qcom_add_sysmon_subdev(rproc, 442 desc->sysmon_name, 443 desc->ssctl_id); 444 if (IS_ERR(adsp->sysmon)) { 445 ret = PTR_ERR(adsp->sysmon); 446 goto detach_proxy_pds; 447 } 448 449 ret = rproc_add(rproc); 450 if (ret) 451 goto detach_proxy_pds; 452 453 return 0; 454 455 detach_proxy_pds: 456 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 457 detach_active_pds: 458 adsp_pds_detach(adsp, adsp->active_pds, adsp->active_pd_count); 459 free_rproc: 460 rproc_free(rproc); 461 462 return ret; 463 } 464 465 static int adsp_remove(struct platform_device *pdev) 466 { 467 struct qcom_adsp *adsp = platform_get_drvdata(pdev); 468 469 rproc_del(adsp->rproc); 470 471 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); 472 qcom_remove_sysmon_subdev(adsp->sysmon); 473 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); 474 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev); 475 rproc_free(adsp->rproc); 476 477 return 0; 478 } 479 480 static const struct adsp_data adsp_resource_init = { 481 .crash_reason_smem = 423, 482 .firmware_name = "adsp.mdt", 483 .pas_id = 1, 484 .has_aggre2_clk = false, 485 .auto_boot = true, 486 .ssr_name = "lpass", 487 .sysmon_name = "adsp", 488 .ssctl_id = 0x14, 489 }; 490 491 static const struct adsp_data sm8150_adsp_resource = { 492 .crash_reason_smem = 423, 493 .firmware_name = "adsp.mdt", 494 .pas_id = 1, 495 .has_aggre2_clk = false, 496 .auto_boot = true, 497 .active_pd_names = (char*[]){ 498 "load_state", 499 NULL 500 }, 501 .proxy_pd_names = (char*[]){ 502 "cx", 503 NULL 504 }, 505 .ssr_name = "lpass", 506 .sysmon_name = "adsp", 507 .ssctl_id = 0x14, 508 }; 509 510 static const struct adsp_data msm8998_adsp_resource = { 511 .crash_reason_smem = 423, 512 .firmware_name = "adsp.mdt", 513 .pas_id = 1, 514 .has_aggre2_clk = false, 515 .auto_boot = true, 516 .proxy_pd_names = (char*[]){ 517 "cx", 518 NULL 519 }, 520 .ssr_name = "lpass", 521 .sysmon_name = "adsp", 522 .ssctl_id = 0x14, 523 }; 524 525 static const struct adsp_data cdsp_resource_init = { 526 .crash_reason_smem = 601, 527 .firmware_name = "cdsp.mdt", 528 .pas_id = 18, 529 .has_aggre2_clk = false, 530 .auto_boot = true, 531 .ssr_name = "cdsp", 532 .sysmon_name = "cdsp", 533 .ssctl_id = 0x17, 534 }; 535 536 static const struct adsp_data sm8150_cdsp_resource = { 537 .crash_reason_smem = 601, 538 .firmware_name = "cdsp.mdt", 539 .pas_id = 18, 540 .has_aggre2_clk = false, 541 .auto_boot = true, 542 .active_pd_names = (char*[]){ 543 "load_state", 544 NULL 545 }, 546 .proxy_pd_names = (char*[]){ 547 "cx", 548 NULL 549 }, 550 .ssr_name = "cdsp", 551 .sysmon_name = "cdsp", 552 .ssctl_id = 0x17, 553 }; 554 555 static const struct adsp_data mpss_resource_init = { 556 .crash_reason_smem = 421, 557 .firmware_name = "modem.mdt", 558 .pas_id = 4, 559 .has_aggre2_clk = false, 560 .auto_boot = false, 561 .active_pd_names = (char*[]){ 562 "load_state", 563 NULL 564 }, 565 .proxy_pd_names = (char*[]){ 566 "cx", 567 "mss", 568 NULL 569 }, 570 .ssr_name = "mpss", 571 .sysmon_name = "modem", 572 .ssctl_id = 0x12, 573 }; 574 575 static const struct adsp_data slpi_resource_init = { 576 .crash_reason_smem = 424, 577 .firmware_name = "slpi.mdt", 578 .pas_id = 12, 579 .has_aggre2_clk = true, 580 .auto_boot = true, 581 .ssr_name = "dsps", 582 .sysmon_name = "slpi", 583 .ssctl_id = 0x16, 584 }; 585 586 static const struct adsp_data sm8150_slpi_resource = { 587 .crash_reason_smem = 424, 588 .firmware_name = "slpi.mdt", 589 .pas_id = 12, 590 .has_aggre2_clk = false, 591 .auto_boot = true, 592 .active_pd_names = (char*[]){ 593 "load_state", 594 NULL 595 }, 596 .proxy_pd_names = (char*[]){ 597 "lcx", 598 "lmx", 599 NULL 600 }, 601 .ssr_name = "dsps", 602 .sysmon_name = "slpi", 603 .ssctl_id = 0x16, 604 }; 605 606 static const struct adsp_data msm8998_slpi_resource = { 607 .crash_reason_smem = 424, 608 .firmware_name = "slpi.mdt", 609 .pas_id = 12, 610 .has_aggre2_clk = true, 611 .auto_boot = true, 612 .proxy_pd_names = (char*[]){ 613 "ssc_cx", 614 NULL 615 }, 616 .ssr_name = "dsps", 617 .sysmon_name = "slpi", 618 .ssctl_id = 0x16, 619 }; 620 621 static const struct adsp_data wcss_resource_init = { 622 .crash_reason_smem = 421, 623 .firmware_name = "wcnss.mdt", 624 .pas_id = 6, 625 .auto_boot = true, 626 .ssr_name = "mpss", 627 .sysmon_name = "wcnss", 628 .ssctl_id = 0x12, 629 }; 630 631 static const struct of_device_id adsp_of_match[] = { 632 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, 633 { .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init}, 634 { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init}, 635 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8998_adsp_resource}, 636 { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8998_slpi_resource}, 637 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init }, 638 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init }, 639 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init }, 640 { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init}, 641 { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init}, 642 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource}, 643 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource}, 644 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init}, 645 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource}, 646 { }, 647 }; 648 MODULE_DEVICE_TABLE(of, adsp_of_match); 649 650 static struct platform_driver adsp_driver = { 651 .probe = adsp_probe, 652 .remove = adsp_remove, 653 .driver = { 654 .name = "qcom_q6v5_pas", 655 .of_match_table = adsp_of_match, 656 }, 657 }; 658 659 module_platform_driver(adsp_driver); 660 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver"); 661 MODULE_LICENSE("GPL v2"); 662