1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996 4 * 5 * Copyright (C) 2016 Linaro Ltd 6 * Copyright (C) 2014 Sony Mobile Communications AB 7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. 8 */ 9 10 #include <linux/clk.h> 11 #include <linux/firmware.h> 12 #include <linux/interrupt.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/of_address.h> 16 #include <linux/of_device.h> 17 #include <linux/platform_device.h> 18 #include <linux/pm_domain.h> 19 #include <linux/pm_runtime.h> 20 #include <linux/qcom_scm.h> 21 #include <linux/regulator/consumer.h> 22 #include <linux/remoteproc.h> 23 #include <linux/soc/qcom/mdt_loader.h> 24 #include <linux/soc/qcom/smem.h> 25 #include <linux/soc/qcom/smem_state.h> 26 27 #include "qcom_common.h" 28 #include "qcom_q6v5.h" 29 #include "remoteproc_internal.h" 30 31 struct adsp_data { 32 int crash_reason_smem; 33 const char *firmware_name; 34 int pas_id; 35 bool has_aggre2_clk; 36 bool auto_boot; 37 38 char **active_pd_names; 39 char **proxy_pd_names; 40 41 const char *ssr_name; 42 const char *sysmon_name; 43 int ssctl_id; 44 }; 45 46 struct qcom_adsp { 47 struct device *dev; 48 struct rproc *rproc; 49 50 struct qcom_q6v5 q6v5; 51 52 struct clk *xo; 53 struct clk *aggre2_clk; 54 55 struct regulator *cx_supply; 56 struct regulator *px_supply; 57 58 struct device *active_pds[1]; 59 struct device *proxy_pds[3]; 60 61 int active_pd_count; 62 int proxy_pd_count; 63 64 int pas_id; 65 int crash_reason_smem; 66 bool has_aggre2_clk; 67 68 struct completion start_done; 69 struct completion stop_done; 70 71 phys_addr_t mem_phys; 72 phys_addr_t mem_reloc; 73 void *mem_region; 74 size_t mem_size; 75 76 struct qcom_rproc_glink glink_subdev; 77 struct qcom_rproc_subdev smd_subdev; 78 struct qcom_rproc_ssr ssr_subdev; 79 struct qcom_sysmon *sysmon; 80 }; 81 82 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds, 83 size_t pd_count) 84 { 85 int ret; 86 int i; 87 88 for (i = 0; i < pd_count; i++) { 89 dev_pm_genpd_set_performance_state(pds[i], INT_MAX); 90 ret = pm_runtime_get_sync(pds[i]); 91 if (ret < 0) 92 goto unroll_pd_votes; 93 } 94 95 return 0; 96 97 unroll_pd_votes: 98 for (i--; i >= 0; i--) { 99 dev_pm_genpd_set_performance_state(pds[i], 0); 100 pm_runtime_put(pds[i]); 101 } 102 103 return ret; 104 }; 105 106 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds, 107 size_t pd_count) 108 { 109 int i; 110 111 for (i = 0; i < pd_count; i++) { 112 dev_pm_genpd_set_performance_state(pds[i], 0); 113 pm_runtime_put(pds[i]); 114 } 115 } 116 117 static int adsp_load(struct rproc *rproc, const struct firmware *fw) 118 { 119 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 120 121 return qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id, 122 adsp->mem_region, adsp->mem_phys, adsp->mem_size, 123 &adsp->mem_reloc); 124 125 } 126 127 static int adsp_start(struct rproc *rproc) 128 { 129 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 130 int ret; 131 132 qcom_q6v5_prepare(&adsp->q6v5); 133 134 ret = adsp_pds_enable(adsp, adsp->active_pds, adsp->active_pd_count); 135 if (ret < 0) 136 goto disable_irqs; 137 138 ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 139 if (ret < 0) 140 goto disable_active_pds; 141 142 ret = clk_prepare_enable(adsp->xo); 143 if (ret) 144 goto disable_proxy_pds; 145 146 ret = clk_prepare_enable(adsp->aggre2_clk); 147 if (ret) 148 goto disable_xo_clk; 149 150 ret = regulator_enable(adsp->cx_supply); 151 if (ret) 152 goto disable_aggre2_clk; 153 154 ret = regulator_enable(adsp->px_supply); 155 if (ret) 156 goto disable_cx_supply; 157 158 ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); 159 if (ret) { 160 dev_err(adsp->dev, 161 "failed to authenticate image and release reset\n"); 162 goto disable_px_supply; 163 } 164 165 ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); 166 if (ret == -ETIMEDOUT) { 167 dev_err(adsp->dev, "start timed out\n"); 168 qcom_scm_pas_shutdown(adsp->pas_id); 169 goto disable_px_supply; 170 } 171 172 return 0; 173 174 disable_px_supply: 175 regulator_disable(adsp->px_supply); 176 disable_cx_supply: 177 regulator_disable(adsp->cx_supply); 178 disable_aggre2_clk: 179 clk_disable_unprepare(adsp->aggre2_clk); 180 disable_xo_clk: 181 clk_disable_unprepare(adsp->xo); 182 disable_proxy_pds: 183 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 184 disable_active_pds: 185 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count); 186 disable_irqs: 187 qcom_q6v5_unprepare(&adsp->q6v5); 188 189 return ret; 190 } 191 192 static void qcom_pas_handover(struct qcom_q6v5 *q6v5) 193 { 194 struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5); 195 196 regulator_disable(adsp->px_supply); 197 regulator_disable(adsp->cx_supply); 198 clk_disable_unprepare(adsp->aggre2_clk); 199 clk_disable_unprepare(adsp->xo); 200 adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 201 } 202 203 static int adsp_stop(struct rproc *rproc) 204 { 205 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 206 int handover; 207 int ret; 208 209 ret = qcom_q6v5_request_stop(&adsp->q6v5); 210 if (ret == -ETIMEDOUT) 211 dev_err(adsp->dev, "timed out on wait\n"); 212 213 ret = qcom_scm_pas_shutdown(adsp->pas_id); 214 if (ret) 215 dev_err(adsp->dev, "failed to shutdown: %d\n", ret); 216 217 adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count); 218 handover = qcom_q6v5_unprepare(&adsp->q6v5); 219 if (handover) 220 qcom_pas_handover(&adsp->q6v5); 221 222 return ret; 223 } 224 225 static void *adsp_da_to_va(struct rproc *rproc, u64 da, int len) 226 { 227 struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; 228 int offset; 229 230 offset = da - adsp->mem_reloc; 231 if (offset < 0 || offset + len > adsp->mem_size) 232 return NULL; 233 234 return adsp->mem_region + offset; 235 } 236 237 static const struct rproc_ops adsp_ops = { 238 .start = adsp_start, 239 .stop = adsp_stop, 240 .da_to_va = adsp_da_to_va, 241 .parse_fw = qcom_register_dump_segments, 242 .load = adsp_load, 243 }; 244 245 static int adsp_init_clock(struct qcom_adsp *adsp) 246 { 247 int ret; 248 249 adsp->xo = devm_clk_get(adsp->dev, "xo"); 250 if (IS_ERR(adsp->xo)) { 251 ret = PTR_ERR(adsp->xo); 252 if (ret != -EPROBE_DEFER) 253 dev_err(adsp->dev, "failed to get xo clock"); 254 return ret; 255 } 256 257 if (adsp->has_aggre2_clk) { 258 adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2"); 259 if (IS_ERR(adsp->aggre2_clk)) { 260 ret = PTR_ERR(adsp->aggre2_clk); 261 if (ret != -EPROBE_DEFER) 262 dev_err(adsp->dev, 263 "failed to get aggre2 clock"); 264 return ret; 265 } 266 } 267 268 return 0; 269 } 270 271 static int adsp_init_regulator(struct qcom_adsp *adsp) 272 { 273 adsp->cx_supply = devm_regulator_get(adsp->dev, "cx"); 274 if (IS_ERR(adsp->cx_supply)) 275 return PTR_ERR(adsp->cx_supply); 276 277 regulator_set_load(adsp->cx_supply, 100000); 278 279 adsp->px_supply = devm_regulator_get(adsp->dev, "px"); 280 return PTR_ERR_OR_ZERO(adsp->px_supply); 281 } 282 283 static int adsp_pds_attach(struct device *dev, struct device **devs, 284 char **pd_names) 285 { 286 size_t num_pds = 0; 287 int ret; 288 int i; 289 290 if (!pd_names) 291 return 0; 292 293 /* Handle single power domain */ 294 if (dev->pm_domain) { 295 devs[0] = dev; 296 pm_runtime_enable(dev); 297 return 1; 298 } 299 300 while (pd_names[num_pds]) 301 num_pds++; 302 303 for (i = 0; i < num_pds; i++) { 304 devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]); 305 if (IS_ERR_OR_NULL(devs[i])) { 306 ret = PTR_ERR(devs[i]) ? : -ENODATA; 307 goto unroll_attach; 308 } 309 } 310 311 return num_pds; 312 313 unroll_attach: 314 for (i--; i >= 0; i--) 315 dev_pm_domain_detach(devs[i], false); 316 317 return ret; 318 }; 319 320 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds, 321 size_t pd_count) 322 { 323 struct device *dev = adsp->dev; 324 int i; 325 326 /* Handle single power domain */ 327 if (dev->pm_domain && pd_count) { 328 pm_runtime_disable(dev); 329 return; 330 } 331 332 for (i = 0; i < pd_count; i++) 333 dev_pm_domain_detach(pds[i], false); 334 } 335 336 static int adsp_alloc_memory_region(struct qcom_adsp *adsp) 337 { 338 struct device_node *node; 339 struct resource r; 340 int ret; 341 342 node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); 343 if (!node) { 344 dev_err(adsp->dev, "no memory-region specified\n"); 345 return -EINVAL; 346 } 347 348 ret = of_address_to_resource(node, 0, &r); 349 if (ret) 350 return ret; 351 352 adsp->mem_phys = adsp->mem_reloc = r.start; 353 adsp->mem_size = resource_size(&r); 354 adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size); 355 if (!adsp->mem_region) { 356 dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", 357 &r.start, adsp->mem_size); 358 return -EBUSY; 359 } 360 361 return 0; 362 } 363 364 static int adsp_probe(struct platform_device *pdev) 365 { 366 const struct adsp_data *desc; 367 struct qcom_adsp *adsp; 368 struct rproc *rproc; 369 const char *fw_name; 370 int ret; 371 372 desc = of_device_get_match_data(&pdev->dev); 373 if (!desc) 374 return -EINVAL; 375 376 if (!qcom_scm_is_available()) 377 return -EPROBE_DEFER; 378 379 fw_name = desc->firmware_name; 380 ret = of_property_read_string(pdev->dev.of_node, "firmware-name", 381 &fw_name); 382 if (ret < 0 && ret != -EINVAL) 383 return ret; 384 385 rproc = rproc_alloc(&pdev->dev, pdev->name, &adsp_ops, 386 fw_name, sizeof(*adsp)); 387 if (!rproc) { 388 dev_err(&pdev->dev, "unable to allocate remoteproc\n"); 389 return -ENOMEM; 390 } 391 392 rproc->auto_boot = desc->auto_boot; 393 394 adsp = (struct qcom_adsp *)rproc->priv; 395 adsp->dev = &pdev->dev; 396 adsp->rproc = rproc; 397 adsp->pas_id = desc->pas_id; 398 adsp->has_aggre2_clk = desc->has_aggre2_clk; 399 platform_set_drvdata(pdev, adsp); 400 401 ret = adsp_alloc_memory_region(adsp); 402 if (ret) 403 goto free_rproc; 404 405 ret = adsp_init_clock(adsp); 406 if (ret) 407 goto free_rproc; 408 409 ret = adsp_init_regulator(adsp); 410 if (ret) 411 goto free_rproc; 412 413 ret = adsp_pds_attach(&pdev->dev, adsp->active_pds, 414 desc->active_pd_names); 415 if (ret < 0) 416 goto free_rproc; 417 adsp->active_pd_count = ret; 418 419 ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds, 420 desc->proxy_pd_names); 421 if (ret < 0) 422 goto detach_active_pds; 423 adsp->proxy_pd_count = ret; 424 425 ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, 426 qcom_pas_handover); 427 if (ret) 428 goto detach_proxy_pds; 429 430 qcom_add_glink_subdev(rproc, &adsp->glink_subdev); 431 qcom_add_smd_subdev(rproc, &adsp->smd_subdev); 432 qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name); 433 adsp->sysmon = qcom_add_sysmon_subdev(rproc, 434 desc->sysmon_name, 435 desc->ssctl_id); 436 if (IS_ERR(adsp->sysmon)) { 437 ret = PTR_ERR(adsp->sysmon); 438 goto detach_proxy_pds; 439 } 440 441 ret = rproc_add(rproc); 442 if (ret) 443 goto detach_proxy_pds; 444 445 return 0; 446 447 detach_proxy_pds: 448 adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 449 detach_active_pds: 450 adsp_pds_detach(adsp, adsp->active_pds, adsp->active_pd_count); 451 free_rproc: 452 rproc_free(rproc); 453 454 return ret; 455 } 456 457 static int adsp_remove(struct platform_device *pdev) 458 { 459 struct qcom_adsp *adsp = platform_get_drvdata(pdev); 460 461 rproc_del(adsp->rproc); 462 463 qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); 464 qcom_remove_sysmon_subdev(adsp->sysmon); 465 qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); 466 qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev); 467 rproc_free(adsp->rproc); 468 469 return 0; 470 } 471 472 static const struct adsp_data adsp_resource_init = { 473 .crash_reason_smem = 423, 474 .firmware_name = "adsp.mdt", 475 .pas_id = 1, 476 .has_aggre2_clk = false, 477 .auto_boot = true, 478 .ssr_name = "lpass", 479 .sysmon_name = "adsp", 480 .ssctl_id = 0x14, 481 }; 482 483 static const struct adsp_data sm8150_adsp_resource = { 484 .crash_reason_smem = 423, 485 .firmware_name = "adsp.mdt", 486 .pas_id = 1, 487 .has_aggre2_clk = false, 488 .auto_boot = true, 489 .active_pd_names = (char*[]){ 490 "load_state", 491 NULL 492 }, 493 .proxy_pd_names = (char*[]){ 494 "cx", 495 NULL 496 }, 497 .ssr_name = "lpass", 498 .sysmon_name = "adsp", 499 .ssctl_id = 0x14, 500 }; 501 502 static const struct adsp_data msm8998_adsp_resource = { 503 .crash_reason_smem = 423, 504 .firmware_name = "adsp.mdt", 505 .pas_id = 1, 506 .has_aggre2_clk = false, 507 .auto_boot = true, 508 .proxy_pd_names = (char*[]){ 509 "cx", 510 NULL 511 }, 512 .ssr_name = "lpass", 513 .sysmon_name = "adsp", 514 .ssctl_id = 0x14, 515 }; 516 517 static const struct adsp_data cdsp_resource_init = { 518 .crash_reason_smem = 601, 519 .firmware_name = "cdsp.mdt", 520 .pas_id = 18, 521 .has_aggre2_clk = false, 522 .auto_boot = true, 523 .ssr_name = "cdsp", 524 .sysmon_name = "cdsp", 525 .ssctl_id = 0x17, 526 }; 527 528 static const struct adsp_data sm8150_cdsp_resource = { 529 .crash_reason_smem = 601, 530 .firmware_name = "cdsp.mdt", 531 .pas_id = 18, 532 .has_aggre2_clk = false, 533 .auto_boot = true, 534 .active_pd_names = (char*[]){ 535 "load_state", 536 NULL 537 }, 538 .proxy_pd_names = (char*[]){ 539 "cx", 540 NULL 541 }, 542 .ssr_name = "cdsp", 543 .sysmon_name = "cdsp", 544 .ssctl_id = 0x17, 545 }; 546 547 static const struct adsp_data mpss_resource_init = { 548 .crash_reason_smem = 421, 549 .firmware_name = "modem.mdt", 550 .pas_id = 4, 551 .has_aggre2_clk = false, 552 .auto_boot = false, 553 .active_pd_names = (char*[]){ 554 "load_state", 555 NULL 556 }, 557 .proxy_pd_names = (char*[]){ 558 "cx", 559 "mss", 560 NULL 561 }, 562 .ssr_name = "mpss", 563 .sysmon_name = "modem", 564 .ssctl_id = 0x12, 565 }; 566 567 static const struct adsp_data slpi_resource_init = { 568 .crash_reason_smem = 424, 569 .firmware_name = "slpi.mdt", 570 .pas_id = 12, 571 .has_aggre2_clk = true, 572 .auto_boot = true, 573 .ssr_name = "dsps", 574 .sysmon_name = "slpi", 575 .ssctl_id = 0x16, 576 }; 577 578 static const struct adsp_data sm8150_slpi_resource = { 579 .crash_reason_smem = 424, 580 .firmware_name = "slpi.mdt", 581 .pas_id = 12, 582 .has_aggre2_clk = false, 583 .auto_boot = true, 584 .active_pd_names = (char*[]){ 585 "load_state", 586 NULL 587 }, 588 .proxy_pd_names = (char*[]){ 589 "lcx", 590 "lmx", 591 NULL 592 }, 593 .ssr_name = "dsps", 594 .sysmon_name = "slpi", 595 .ssctl_id = 0x16, 596 }; 597 598 static const struct adsp_data msm8998_slpi_resource = { 599 .crash_reason_smem = 424, 600 .firmware_name = "slpi.mdt", 601 .pas_id = 12, 602 .has_aggre2_clk = true, 603 .auto_boot = true, 604 .proxy_pd_names = (char*[]){ 605 "ssc_cx", 606 NULL 607 }, 608 .ssr_name = "dsps", 609 .sysmon_name = "slpi", 610 .ssctl_id = 0x16, 611 }; 612 613 static const struct adsp_data wcss_resource_init = { 614 .crash_reason_smem = 421, 615 .firmware_name = "wcnss.mdt", 616 .pas_id = 6, 617 .auto_boot = true, 618 .ssr_name = "mpss", 619 .sysmon_name = "wcnss", 620 .ssctl_id = 0x12, 621 }; 622 623 static const struct of_device_id adsp_of_match[] = { 624 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, 625 { .compatible = "qcom,msm8996-adsp-pil", .data = &adsp_resource_init}, 626 { .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init}, 627 { .compatible = "qcom,msm8998-adsp-pas", .data = &msm8998_adsp_resource}, 628 { .compatible = "qcom,msm8998-slpi-pas", .data = &msm8998_slpi_resource}, 629 { .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init }, 630 { .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init }, 631 { .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init }, 632 { .compatible = "qcom,sdm845-adsp-pas", .data = &adsp_resource_init}, 633 { .compatible = "qcom,sdm845-cdsp-pas", .data = &cdsp_resource_init}, 634 { .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource}, 635 { .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource}, 636 { .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init}, 637 { .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource}, 638 { }, 639 }; 640 MODULE_DEVICE_TABLE(of, adsp_of_match); 641 642 static struct platform_driver adsp_driver = { 643 .probe = adsp_probe, 644 .remove = adsp_remove, 645 .driver = { 646 .name = "qcom_q6v5_pas", 647 .of_match_table = adsp_of_match, 648 }, 649 }; 650 651 module_platform_driver(adsp_driver); 652 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver"); 653 MODULE_LICENSE("GPL v2"); 654