1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
4  *
5  * Copyright (C) 2016 Linaro Ltd
6  * Copyright (C) 2014 Sony Mobile Communications AB
7  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
8  */
9 
10 #include <linux/clk.h>
11 #include <linux/firmware.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_domain.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/qcom_scm.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/remoteproc.h>
23 #include <linux/soc/qcom/mdt_loader.h>
24 #include <linux/soc/qcom/smem.h>
25 #include <linux/soc/qcom/smem_state.h>
26 
27 #include "qcom_common.h"
28 #include "qcom_pil_info.h"
29 #include "qcom_q6v5.h"
30 #include "remoteproc_internal.h"
31 
32 struct adsp_data {
33 	int crash_reason_smem;
34 	const char *firmware_name;
35 	int pas_id;
36 	unsigned int minidump_id;
37 	bool has_aggre2_clk;
38 	bool auto_boot;
39 
40 	char **proxy_pd_names;
41 
42 	const char *load_state;
43 	const char *ssr_name;
44 	const char *sysmon_name;
45 	int ssctl_id;
46 };
47 
48 struct qcom_adsp {
49 	struct device *dev;
50 	struct rproc *rproc;
51 
52 	struct qcom_q6v5 q6v5;
53 
54 	struct clk *xo;
55 	struct clk *aggre2_clk;
56 
57 	struct regulator *cx_supply;
58 	struct regulator *px_supply;
59 
60 	struct device *proxy_pds[3];
61 
62 	int proxy_pd_count;
63 
64 	int pas_id;
65 	unsigned int minidump_id;
66 	int crash_reason_smem;
67 	bool has_aggre2_clk;
68 	const char *info_name;
69 
70 	struct completion start_done;
71 	struct completion stop_done;
72 
73 	phys_addr_t mem_phys;
74 	phys_addr_t mem_reloc;
75 	void *mem_region;
76 	size_t mem_size;
77 
78 	struct qcom_rproc_glink glink_subdev;
79 	struct qcom_rproc_subdev smd_subdev;
80 	struct qcom_rproc_ssr ssr_subdev;
81 	struct qcom_sysmon *sysmon;
82 };
83 
84 static void adsp_minidump(struct rproc *rproc)
85 {
86 	struct qcom_adsp *adsp = rproc->priv;
87 
88 	qcom_minidump(rproc, adsp->minidump_id);
89 }
90 
91 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
92 			   size_t pd_count)
93 {
94 	int ret;
95 	int i;
96 
97 	for (i = 0; i < pd_count; i++) {
98 		dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
99 		ret = pm_runtime_get_sync(pds[i]);
100 		if (ret < 0) {
101 			pm_runtime_put_noidle(pds[i]);
102 			dev_pm_genpd_set_performance_state(pds[i], 0);
103 			goto unroll_pd_votes;
104 		}
105 	}
106 
107 	return 0;
108 
109 unroll_pd_votes:
110 	for (i--; i >= 0; i--) {
111 		dev_pm_genpd_set_performance_state(pds[i], 0);
112 		pm_runtime_put(pds[i]);
113 	}
114 
115 	return ret;
116 };
117 
118 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
119 			     size_t pd_count)
120 {
121 	int i;
122 
123 	for (i = 0; i < pd_count; i++) {
124 		dev_pm_genpd_set_performance_state(pds[i], 0);
125 		pm_runtime_put(pds[i]);
126 	}
127 }
128 
129 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
130 {
131 	struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
132 	int ret;
133 
134 	ret = qcom_mdt_load(adsp->dev, fw, rproc->firmware, adsp->pas_id,
135 			    adsp->mem_region, adsp->mem_phys, adsp->mem_size,
136 			    &adsp->mem_reloc);
137 	if (ret)
138 		return ret;
139 
140 	qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
141 
142 	return 0;
143 }
144 
145 static int adsp_start(struct rproc *rproc)
146 {
147 	struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
148 	int ret;
149 
150 	ret = qcom_q6v5_prepare(&adsp->q6v5);
151 	if (ret)
152 		return ret;
153 
154 	ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
155 	if (ret < 0)
156 		goto disable_irqs;
157 
158 	ret = clk_prepare_enable(adsp->xo);
159 	if (ret)
160 		goto disable_proxy_pds;
161 
162 	ret = clk_prepare_enable(adsp->aggre2_clk);
163 	if (ret)
164 		goto disable_xo_clk;
165 
166 	ret = regulator_enable(adsp->cx_supply);
167 	if (ret)
168 		goto disable_aggre2_clk;
169 
170 	ret = regulator_enable(adsp->px_supply);
171 	if (ret)
172 		goto disable_cx_supply;
173 
174 	ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
175 	if (ret) {
176 		dev_err(adsp->dev,
177 			"failed to authenticate image and release reset\n");
178 		goto disable_px_supply;
179 	}
180 
181 	ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
182 	if (ret == -ETIMEDOUT) {
183 		dev_err(adsp->dev, "start timed out\n");
184 		qcom_scm_pas_shutdown(adsp->pas_id);
185 		goto disable_px_supply;
186 	}
187 
188 	return 0;
189 
190 disable_px_supply:
191 	regulator_disable(adsp->px_supply);
192 disable_cx_supply:
193 	regulator_disable(adsp->cx_supply);
194 disable_aggre2_clk:
195 	clk_disable_unprepare(adsp->aggre2_clk);
196 disable_xo_clk:
197 	clk_disable_unprepare(adsp->xo);
198 disable_proxy_pds:
199 	adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
200 disable_irqs:
201 	qcom_q6v5_unprepare(&adsp->q6v5);
202 
203 	return ret;
204 }
205 
206 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
207 {
208 	struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
209 
210 	regulator_disable(adsp->px_supply);
211 	regulator_disable(adsp->cx_supply);
212 	clk_disable_unprepare(adsp->aggre2_clk);
213 	clk_disable_unprepare(adsp->xo);
214 	adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
215 }
216 
217 static int adsp_stop(struct rproc *rproc)
218 {
219 	struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
220 	int handover;
221 	int ret;
222 
223 	ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
224 	if (ret == -ETIMEDOUT)
225 		dev_err(adsp->dev, "timed out on wait\n");
226 
227 	ret = qcom_scm_pas_shutdown(adsp->pas_id);
228 	if (ret)
229 		dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
230 
231 	handover = qcom_q6v5_unprepare(&adsp->q6v5);
232 	if (handover)
233 		qcom_pas_handover(&adsp->q6v5);
234 
235 	return ret;
236 }
237 
238 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
239 {
240 	struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
241 	int offset;
242 
243 	offset = da - adsp->mem_reloc;
244 	if (offset < 0 || offset + len > adsp->mem_size)
245 		return NULL;
246 
247 	return adsp->mem_region + offset;
248 }
249 
250 static unsigned long adsp_panic(struct rproc *rproc)
251 {
252 	struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv;
253 
254 	return qcom_q6v5_panic(&adsp->q6v5);
255 }
256 
257 static const struct rproc_ops adsp_ops = {
258 	.start = adsp_start,
259 	.stop = adsp_stop,
260 	.da_to_va = adsp_da_to_va,
261 	.parse_fw = qcom_register_dump_segments,
262 	.load = adsp_load,
263 	.panic = adsp_panic,
264 };
265 
266 static const struct rproc_ops adsp_minidump_ops = {
267 	.start = adsp_start,
268 	.stop = adsp_stop,
269 	.da_to_va = adsp_da_to_va,
270 	.load = adsp_load,
271 	.panic = adsp_panic,
272 	.coredump = adsp_minidump,
273 };
274 
275 static int adsp_init_clock(struct qcom_adsp *adsp)
276 {
277 	int ret;
278 
279 	adsp->xo = devm_clk_get(adsp->dev, "xo");
280 	if (IS_ERR(adsp->xo)) {
281 		ret = PTR_ERR(adsp->xo);
282 		if (ret != -EPROBE_DEFER)
283 			dev_err(adsp->dev, "failed to get xo clock");
284 		return ret;
285 	}
286 
287 	if (adsp->has_aggre2_clk) {
288 		adsp->aggre2_clk = devm_clk_get(adsp->dev, "aggre2");
289 		if (IS_ERR(adsp->aggre2_clk)) {
290 			ret = PTR_ERR(adsp->aggre2_clk);
291 			if (ret != -EPROBE_DEFER)
292 				dev_err(adsp->dev,
293 					"failed to get aggre2 clock");
294 			return ret;
295 		}
296 	}
297 
298 	return 0;
299 }
300 
301 static int adsp_init_regulator(struct qcom_adsp *adsp)
302 {
303 	adsp->cx_supply = devm_regulator_get(adsp->dev, "cx");
304 	if (IS_ERR(adsp->cx_supply))
305 		return PTR_ERR(adsp->cx_supply);
306 
307 	regulator_set_load(adsp->cx_supply, 100000);
308 
309 	adsp->px_supply = devm_regulator_get(adsp->dev, "px");
310 	return PTR_ERR_OR_ZERO(adsp->px_supply);
311 }
312 
313 static int adsp_pds_attach(struct device *dev, struct device **devs,
314 			   char **pd_names)
315 {
316 	size_t num_pds = 0;
317 	int ret;
318 	int i;
319 
320 	if (!pd_names)
321 		return 0;
322 
323 	/* Handle single power domain */
324 	if (dev->pm_domain) {
325 		devs[0] = dev;
326 		pm_runtime_enable(dev);
327 		return 1;
328 	}
329 
330 	while (pd_names[num_pds])
331 		num_pds++;
332 
333 	for (i = 0; i < num_pds; i++) {
334 		devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
335 		if (IS_ERR_OR_NULL(devs[i])) {
336 			ret = PTR_ERR(devs[i]) ? : -ENODATA;
337 			goto unroll_attach;
338 		}
339 	}
340 
341 	return num_pds;
342 
343 unroll_attach:
344 	for (i--; i >= 0; i--)
345 		dev_pm_domain_detach(devs[i], false);
346 
347 	return ret;
348 };
349 
350 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
351 			    size_t pd_count)
352 {
353 	struct device *dev = adsp->dev;
354 	int i;
355 
356 	/* Handle single power domain */
357 	if (dev->pm_domain && pd_count) {
358 		pm_runtime_disable(dev);
359 		return;
360 	}
361 
362 	for (i = 0; i < pd_count; i++)
363 		dev_pm_domain_detach(pds[i], false);
364 }
365 
366 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
367 {
368 	struct device_node *node;
369 	struct resource r;
370 	int ret;
371 
372 	node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
373 	if (!node) {
374 		dev_err(adsp->dev, "no memory-region specified\n");
375 		return -EINVAL;
376 	}
377 
378 	ret = of_address_to_resource(node, 0, &r);
379 	if (ret)
380 		return ret;
381 
382 	adsp->mem_phys = adsp->mem_reloc = r.start;
383 	adsp->mem_size = resource_size(&r);
384 	adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
385 	if (!adsp->mem_region) {
386 		dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
387 			&r.start, adsp->mem_size);
388 		return -EBUSY;
389 	}
390 
391 	return 0;
392 }
393 
394 static int adsp_probe(struct platform_device *pdev)
395 {
396 	const struct adsp_data *desc;
397 	struct qcom_adsp *adsp;
398 	struct rproc *rproc;
399 	const char *fw_name;
400 	const struct rproc_ops *ops = &adsp_ops;
401 	int ret;
402 
403 	desc = of_device_get_match_data(&pdev->dev);
404 	if (!desc)
405 		return -EINVAL;
406 
407 	if (!qcom_scm_is_available())
408 		return -EPROBE_DEFER;
409 
410 	fw_name = desc->firmware_name;
411 	ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
412 				      &fw_name);
413 	if (ret < 0 && ret != -EINVAL)
414 		return ret;
415 
416 	if (desc->minidump_id)
417 		ops = &adsp_minidump_ops;
418 
419 	rproc = rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
420 
421 	if (!rproc) {
422 		dev_err(&pdev->dev, "unable to allocate remoteproc\n");
423 		return -ENOMEM;
424 	}
425 
426 	rproc->auto_boot = desc->auto_boot;
427 	rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
428 
429 	adsp = (struct qcom_adsp *)rproc->priv;
430 	adsp->dev = &pdev->dev;
431 	adsp->rproc = rproc;
432 	adsp->minidump_id = desc->minidump_id;
433 	adsp->pas_id = desc->pas_id;
434 	adsp->has_aggre2_clk = desc->has_aggre2_clk;
435 	adsp->info_name = desc->sysmon_name;
436 	platform_set_drvdata(pdev, adsp);
437 
438 	device_wakeup_enable(adsp->dev);
439 
440 	ret = adsp_alloc_memory_region(adsp);
441 	if (ret)
442 		goto free_rproc;
443 
444 	ret = adsp_init_clock(adsp);
445 	if (ret)
446 		goto free_rproc;
447 
448 	ret = adsp_init_regulator(adsp);
449 	if (ret)
450 		goto free_rproc;
451 
452 	ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
453 			      desc->proxy_pd_names);
454 	if (ret < 0)
455 		goto free_rproc;
456 	adsp->proxy_pd_count = ret;
457 
458 	ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
459 			     qcom_pas_handover);
460 	if (ret)
461 		goto detach_proxy_pds;
462 
463 	qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
464 	qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
465 	qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
466 	adsp->sysmon = qcom_add_sysmon_subdev(rproc,
467 					      desc->sysmon_name,
468 					      desc->ssctl_id);
469 	if (IS_ERR(adsp->sysmon)) {
470 		ret = PTR_ERR(adsp->sysmon);
471 		goto detach_proxy_pds;
472 	}
473 
474 	ret = rproc_add(rproc);
475 	if (ret)
476 		goto detach_proxy_pds;
477 
478 	return 0;
479 
480 detach_proxy_pds:
481 	adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
482 free_rproc:
483 	rproc_free(rproc);
484 
485 	return ret;
486 }
487 
488 static int adsp_remove(struct platform_device *pdev)
489 {
490 	struct qcom_adsp *adsp = platform_get_drvdata(pdev);
491 
492 	rproc_del(adsp->rproc);
493 
494 	qcom_q6v5_deinit(&adsp->q6v5);
495 	qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
496 	qcom_remove_sysmon_subdev(adsp->sysmon);
497 	qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
498 	qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
499 	rproc_free(adsp->rproc);
500 
501 	return 0;
502 }
503 
504 static const struct adsp_data adsp_resource_init = {
505 		.crash_reason_smem = 423,
506 		.firmware_name = "adsp.mdt",
507 		.pas_id = 1,
508 		.has_aggre2_clk = false,
509 		.auto_boot = true,
510 		.ssr_name = "lpass",
511 		.sysmon_name = "adsp",
512 		.ssctl_id = 0x14,
513 };
514 
515 static const struct adsp_data sdm845_adsp_resource_init = {
516 		.crash_reason_smem = 423,
517 		.firmware_name = "adsp.mdt",
518 		.pas_id = 1,
519 		.has_aggre2_clk = false,
520 		.auto_boot = true,
521 		.load_state = "adsp",
522 		.ssr_name = "lpass",
523 		.sysmon_name = "adsp",
524 		.ssctl_id = 0x14,
525 };
526 
527 static const struct adsp_data sm8150_adsp_resource = {
528 		.crash_reason_smem = 423,
529 		.firmware_name = "adsp.mdt",
530 		.pas_id = 1,
531 		.has_aggre2_clk = false,
532 		.auto_boot = true,
533 		.proxy_pd_names = (char*[]){
534 			"cx",
535 			NULL
536 		},
537 		.load_state = "adsp",
538 		.ssr_name = "lpass",
539 		.sysmon_name = "adsp",
540 		.ssctl_id = 0x14,
541 };
542 
543 static const struct adsp_data sm8250_adsp_resource = {
544 	.crash_reason_smem = 423,
545 	.firmware_name = "adsp.mdt",
546 	.pas_id = 1,
547 	.has_aggre2_clk = false,
548 	.auto_boot = true,
549 	.proxy_pd_names = (char*[]){
550 		"lcx",
551 		"lmx",
552 		NULL
553 	},
554 	.load_state = "adsp",
555 	.ssr_name = "lpass",
556 	.sysmon_name = "adsp",
557 	.ssctl_id = 0x14,
558 };
559 
560 static const struct adsp_data sm8350_adsp_resource = {
561 	.crash_reason_smem = 423,
562 	.firmware_name = "adsp.mdt",
563 	.pas_id = 1,
564 	.has_aggre2_clk = false,
565 	.auto_boot = true,
566 	.proxy_pd_names = (char*[]){
567 		"lcx",
568 		"lmx",
569 		NULL
570 	},
571 	.load_state = "adsp",
572 	.ssr_name = "lpass",
573 	.sysmon_name = "adsp",
574 	.ssctl_id = 0x14,
575 };
576 
577 static const struct adsp_data msm8996_adsp_resource = {
578 		.crash_reason_smem = 423,
579 		.firmware_name = "adsp.mdt",
580 		.pas_id = 1,
581 		.has_aggre2_clk = false,
582 		.auto_boot = true,
583 		.proxy_pd_names = (char*[]){
584 			"cx",
585 			NULL
586 		},
587 		.ssr_name = "lpass",
588 		.sysmon_name = "adsp",
589 		.ssctl_id = 0x14,
590 };
591 
592 static const struct adsp_data cdsp_resource_init = {
593 	.crash_reason_smem = 601,
594 	.firmware_name = "cdsp.mdt",
595 	.pas_id = 18,
596 	.has_aggre2_clk = false,
597 	.auto_boot = true,
598 	.ssr_name = "cdsp",
599 	.sysmon_name = "cdsp",
600 	.ssctl_id = 0x17,
601 };
602 
603 static const struct adsp_data sdm845_cdsp_resource_init = {
604 	.crash_reason_smem = 601,
605 	.firmware_name = "cdsp.mdt",
606 	.pas_id = 18,
607 	.has_aggre2_clk = false,
608 	.auto_boot = true,
609 	.load_state = "cdsp",
610 	.ssr_name = "cdsp",
611 	.sysmon_name = "cdsp",
612 	.ssctl_id = 0x17,
613 };
614 
615 static const struct adsp_data sm8150_cdsp_resource = {
616 	.crash_reason_smem = 601,
617 	.firmware_name = "cdsp.mdt",
618 	.pas_id = 18,
619 	.has_aggre2_clk = false,
620 	.auto_boot = true,
621 	.proxy_pd_names = (char*[]){
622 		"cx",
623 		NULL
624 	},
625 	.load_state = "cdsp",
626 	.ssr_name = "cdsp",
627 	.sysmon_name = "cdsp",
628 	.ssctl_id = 0x17,
629 };
630 
631 static const struct adsp_data sm8250_cdsp_resource = {
632 	.crash_reason_smem = 601,
633 	.firmware_name = "cdsp.mdt",
634 	.pas_id = 18,
635 	.has_aggre2_clk = false,
636 	.auto_boot = true,
637 	.proxy_pd_names = (char*[]){
638 		"cx",
639 		NULL
640 	},
641 	.load_state = "cdsp",
642 	.ssr_name = "cdsp",
643 	.sysmon_name = "cdsp",
644 	.ssctl_id = 0x17,
645 };
646 
647 static const struct adsp_data sm8350_cdsp_resource = {
648 	.crash_reason_smem = 601,
649 	.firmware_name = "cdsp.mdt",
650 	.pas_id = 18,
651 	.has_aggre2_clk = false,
652 	.auto_boot = true,
653 	.proxy_pd_names = (char*[]){
654 		"cx",
655 		NULL
656 	},
657 	.load_state = "cdsp",
658 	.ssr_name = "cdsp",
659 	.sysmon_name = "cdsp",
660 	.ssctl_id = 0x17,
661 };
662 
663 static const struct adsp_data mpss_resource_init = {
664 	.crash_reason_smem = 421,
665 	.firmware_name = "modem.mdt",
666 	.pas_id = 4,
667 	.minidump_id = 3,
668 	.has_aggre2_clk = false,
669 	.auto_boot = false,
670 	.proxy_pd_names = (char*[]){
671 		"cx",
672 		"mss",
673 		NULL
674 	},
675 	.load_state = "modem",
676 	.ssr_name = "mpss",
677 	.sysmon_name = "modem",
678 	.ssctl_id = 0x12,
679 };
680 
681 static const struct adsp_data sc8180x_mpss_resource = {
682 	.crash_reason_smem = 421,
683 	.firmware_name = "modem.mdt",
684 	.pas_id = 4,
685 	.has_aggre2_clk = false,
686 	.auto_boot = false,
687 	.proxy_pd_names = (char*[]){
688 		"cx",
689 		NULL
690 	},
691 	.load_state = "modem",
692 	.ssr_name = "mpss",
693 	.sysmon_name = "modem",
694 	.ssctl_id = 0x12,
695 };
696 
697 static const struct adsp_data slpi_resource_init = {
698 		.crash_reason_smem = 424,
699 		.firmware_name = "slpi.mdt",
700 		.pas_id = 12,
701 		.has_aggre2_clk = true,
702 		.auto_boot = true,
703 		.proxy_pd_names = (char*[]){
704 			"ssc_cx",
705 			NULL
706 		},
707 		.ssr_name = "dsps",
708 		.sysmon_name = "slpi",
709 		.ssctl_id = 0x16,
710 };
711 
712 static const struct adsp_data sm8150_slpi_resource = {
713 		.crash_reason_smem = 424,
714 		.firmware_name = "slpi.mdt",
715 		.pas_id = 12,
716 		.has_aggre2_clk = false,
717 		.auto_boot = true,
718 		.proxy_pd_names = (char*[]){
719 			"lcx",
720 			"lmx",
721 			NULL
722 		},
723 		.load_state = "slpi",
724 		.ssr_name = "dsps",
725 		.sysmon_name = "slpi",
726 		.ssctl_id = 0x16,
727 };
728 
729 static const struct adsp_data sm8250_slpi_resource = {
730 	.crash_reason_smem = 424,
731 	.firmware_name = "slpi.mdt",
732 	.pas_id = 12,
733 	.has_aggre2_clk = false,
734 	.auto_boot = true,
735 	.proxy_pd_names = (char*[]){
736 		"lcx",
737 		"lmx",
738 		NULL
739 	},
740 	.load_state = "slpi",
741 	.ssr_name = "dsps",
742 	.sysmon_name = "slpi",
743 	.ssctl_id = 0x16,
744 };
745 
746 static const struct adsp_data sm8350_slpi_resource = {
747 	.crash_reason_smem = 424,
748 	.firmware_name = "slpi.mdt",
749 	.pas_id = 12,
750 	.has_aggre2_clk = false,
751 	.auto_boot = true,
752 	.proxy_pd_names = (char*[]){
753 		"lcx",
754 		"lmx",
755 		NULL
756 	},
757 	.load_state = "slpi",
758 	.ssr_name = "dsps",
759 	.sysmon_name = "slpi",
760 	.ssctl_id = 0x16,
761 };
762 
763 static const struct adsp_data wcss_resource_init = {
764 	.crash_reason_smem = 421,
765 	.firmware_name = "wcnss.mdt",
766 	.pas_id = 6,
767 	.auto_boot = true,
768 	.ssr_name = "mpss",
769 	.sysmon_name = "wcnss",
770 	.ssctl_id = 0x12,
771 };
772 
773 static const struct adsp_data sdx55_mpss_resource = {
774 	.crash_reason_smem = 421,
775 	.firmware_name = "modem.mdt",
776 	.pas_id = 4,
777 	.has_aggre2_clk = false,
778 	.auto_boot = true,
779 	.proxy_pd_names = (char*[]){
780 		"cx",
781 		"mss",
782 		NULL
783 	},
784 	.ssr_name = "mpss",
785 	.sysmon_name = "modem",
786 	.ssctl_id = 0x22,
787 };
788 
789 static const struct of_device_id adsp_of_match[] = {
790 	{ .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
791 	{ .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
792 	{ .compatible = "qcom,msm8996-slpi-pil", .data = &slpi_resource_init},
793 	{ .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
794 	{ .compatible = "qcom,msm8998-slpi-pas", .data = &slpi_resource_init},
795 	{ .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
796 	{ .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
797 	{ .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
798 	{ .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
799 	{ .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
800 	{ .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
801 	{ .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
802 	{ .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
803 	{ .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
804 	{ .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
805 	{ .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
806 	{ .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
807 	{ .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
808 	{ .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
809 	{ .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
810 	{ .compatible = "qcom,sm8150-slpi-pas", .data = &sm8150_slpi_resource},
811 	{ .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
812 	{ .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
813 	{ .compatible = "qcom,sm8250-slpi-pas", .data = &sm8250_slpi_resource},
814 	{ .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
815 	{ .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
816 	{ .compatible = "qcom,sm8350-slpi-pas", .data = &sm8350_slpi_resource},
817 	{ .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
818 	{ },
819 };
820 MODULE_DEVICE_TABLE(of, adsp_of_match);
821 
822 static struct platform_driver adsp_driver = {
823 	.probe = adsp_probe,
824 	.remove = adsp_remove,
825 	.driver = {
826 		.name = "qcom_q6v5_pas",
827 		.of_match_table = adsp_of_match,
828 	},
829 };
830 
831 module_platform_driver(adsp_driver);
832 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
833 MODULE_LICENSE("GPL v2");
834