1d4ce2de7SSuman Anna // SPDX-License-Identifier: GPL-2.0-only 2d4ce2de7SSuman Anna /* 3d4ce2de7SSuman Anna * PRU-ICSS remoteproc driver for various TI SoCs 4d4ce2de7SSuman Anna * 5d4ce2de7SSuman Anna * Copyright (C) 2014-2020 Texas Instruments Incorporated - https://www.ti.com/ 6d4ce2de7SSuman Anna * 7d4ce2de7SSuman Anna * Author(s): 8d4ce2de7SSuman Anna * Suman Anna <s-anna@ti.com> 9d4ce2de7SSuman Anna * Andrew F. Davis <afd@ti.com> 10d4ce2de7SSuman Anna * Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org> for Texas Instruments 11d4ce2de7SSuman Anna */ 12d4ce2de7SSuman Anna 13d4ce2de7SSuman Anna #include <linux/bitops.h> 1420ad1de0SSuman Anna #include <linux/debugfs.h> 15c75c9fdaSGrzegorz Jaszczyk #include <linux/irqdomain.h> 16d4ce2de7SSuman Anna #include <linux/module.h> 17d4ce2de7SSuman Anna #include <linux/of_device.h> 18c75c9fdaSGrzegorz Jaszczyk #include <linux/of_irq.h> 19d4ce2de7SSuman Anna #include <linux/pruss_driver.h> 20d4ce2de7SSuman Anna #include <linux/remoteproc.h> 21d4ce2de7SSuman Anna 22d4ce2de7SSuman Anna #include "remoteproc_internal.h" 23d4ce2de7SSuman Anna #include "remoteproc_elf_helpers.h" 24c75c9fdaSGrzegorz Jaszczyk #include "pru_rproc.h" 25d4ce2de7SSuman Anna 26d4ce2de7SSuman Anna /* PRU_ICSS_PRU_CTRL registers */ 27d4ce2de7SSuman Anna #define PRU_CTRL_CTRL 0x0000 28d4ce2de7SSuman Anna #define PRU_CTRL_STS 0x0004 2920ad1de0SSuman Anna #define PRU_CTRL_WAKEUP_EN 0x0008 3020ad1de0SSuman Anna #define PRU_CTRL_CYCLE 0x000C 3120ad1de0SSuman Anna #define PRU_CTRL_STALL 0x0010 3220ad1de0SSuman Anna #define PRU_CTRL_CTBIR0 0x0020 3320ad1de0SSuman Anna #define PRU_CTRL_CTBIR1 0x0024 3420ad1de0SSuman Anna #define PRU_CTRL_CTPPR0 0x0028 3520ad1de0SSuman Anna #define PRU_CTRL_CTPPR1 0x002C 36d4ce2de7SSuman Anna 37d4ce2de7SSuman Anna /* CTRL register bit-fields */ 38d4ce2de7SSuman Anna #define CTRL_CTRL_SOFT_RST_N BIT(0) 39d4ce2de7SSuman Anna #define CTRL_CTRL_EN BIT(1) 40d4ce2de7SSuman Anna #define CTRL_CTRL_SLEEPING BIT(2) 41d4ce2de7SSuman Anna #define CTRL_CTRL_CTR_EN BIT(3) 42d4ce2de7SSuman Anna #define CTRL_CTRL_SINGLE_STEP BIT(8) 43d4ce2de7SSuman Anna #define CTRL_CTRL_RUNSTATE BIT(15) 44d4ce2de7SSuman Anna 4520ad1de0SSuman Anna /* PRU_ICSS_PRU_DEBUG registers */ 4620ad1de0SSuman Anna #define PRU_DEBUG_GPREG(x) (0x0000 + (x) * 4) 4720ad1de0SSuman Anna #define PRU_DEBUG_CT_REG(x) (0x0080 + (x) * 4) 4820ad1de0SSuman Anna 491d39f4d1SSuman Anna /* PRU/RTU/Tx_PRU Core IRAM address masks */ 50d4ce2de7SSuman Anna #define PRU_IRAM_ADDR_MASK 0x3ffff 51d4ce2de7SSuman Anna #define PRU0_IRAM_ADDR_MASK 0x34000 52d4ce2de7SSuman Anna #define PRU1_IRAM_ADDR_MASK 0x38000 531d39f4d1SSuman Anna #define RTU0_IRAM_ADDR_MASK 0x4000 541d39f4d1SSuman Anna #define RTU1_IRAM_ADDR_MASK 0x6000 551d39f4d1SSuman Anna #define TX_PRU0_IRAM_ADDR_MASK 0xa000 561d39f4d1SSuman Anna #define TX_PRU1_IRAM_ADDR_MASK 0xc000 57d4ce2de7SSuman Anna 58d4ce2de7SSuman Anna /* PRU device addresses for various type of PRU RAMs */ 59d4ce2de7SSuman Anna #define PRU_IRAM_DA 0 /* Instruction RAM */ 60d4ce2de7SSuman Anna #define PRU_PDRAM_DA 0 /* Primary Data RAM */ 61d4ce2de7SSuman Anna #define PRU_SDRAM_DA 0x2000 /* Secondary Data RAM */ 62d4ce2de7SSuman Anna #define PRU_SHRDRAM_DA 0x10000 /* Shared Data RAM */ 63d4ce2de7SSuman Anna 64c75c9fdaSGrzegorz Jaszczyk #define MAX_PRU_SYS_EVENTS 160 65c75c9fdaSGrzegorz Jaszczyk 66d4ce2de7SSuman Anna /** 67d4ce2de7SSuman Anna * enum pru_iomem - PRU core memory/register range identifiers 68d4ce2de7SSuman Anna * 69d4ce2de7SSuman Anna * @PRU_IOMEM_IRAM: PRU Instruction RAM range 70d4ce2de7SSuman Anna * @PRU_IOMEM_CTRL: PRU Control register range 71d4ce2de7SSuman Anna * @PRU_IOMEM_DEBUG: PRU Debug register range 72d4ce2de7SSuman Anna * @PRU_IOMEM_MAX: just keep this one at the end 73d4ce2de7SSuman Anna */ 74d4ce2de7SSuman Anna enum pru_iomem { 75d4ce2de7SSuman Anna PRU_IOMEM_IRAM = 0, 76d4ce2de7SSuman Anna PRU_IOMEM_CTRL, 77d4ce2de7SSuman Anna PRU_IOMEM_DEBUG, 78d4ce2de7SSuman Anna PRU_IOMEM_MAX, 79d4ce2de7SSuman Anna }; 80d4ce2de7SSuman Anna 81d4ce2de7SSuman Anna /** 821d39f4d1SSuman Anna * enum pru_type - PRU core type identifier 831d39f4d1SSuman Anna * 841d39f4d1SSuman Anna * @PRU_TYPE_PRU: Programmable Real-time Unit 851d39f4d1SSuman Anna * @PRU_TYPE_RTU: Auxiliary Programmable Real-Time Unit 861d39f4d1SSuman Anna * @PRU_TYPE_TX_PRU: Transmit Programmable Real-Time Unit 871d39f4d1SSuman Anna * @PRU_TYPE_MAX: just keep this one at the end 881d39f4d1SSuman Anna */ 891d39f4d1SSuman Anna enum pru_type { 901d39f4d1SSuman Anna PRU_TYPE_PRU = 0, 911d39f4d1SSuman Anna PRU_TYPE_RTU, 921d39f4d1SSuman Anna PRU_TYPE_TX_PRU, 931d39f4d1SSuman Anna PRU_TYPE_MAX, 941d39f4d1SSuman Anna }; 951d39f4d1SSuman Anna 961d39f4d1SSuman Anna /** 971d39f4d1SSuman Anna * struct pru_private_data - device data for a PRU core 981d39f4d1SSuman Anna * @type: type of the PRU core (PRU, RTU, Tx_PRU) 991d39f4d1SSuman Anna * @is_k3: flag used to identify the need for special load handling 1001d39f4d1SSuman Anna */ 1011d39f4d1SSuman Anna struct pru_private_data { 1021d39f4d1SSuman Anna enum pru_type type; 1031d39f4d1SSuman Anna unsigned int is_k3 : 1; 1041d39f4d1SSuman Anna }; 1051d39f4d1SSuman Anna 1061d39f4d1SSuman Anna /** 107d4ce2de7SSuman Anna * struct pru_rproc - PRU remoteproc structure 108d4ce2de7SSuman Anna * @id: id of the PRU core within the PRUSS 109d4ce2de7SSuman Anna * @dev: PRU core device pointer 110d4ce2de7SSuman Anna * @pruss: back-reference to parent PRUSS structure 111d4ce2de7SSuman Anna * @rproc: remoteproc pointer for this PRU core 1121d39f4d1SSuman Anna * @data: PRU core specific data 113d4ce2de7SSuman Anna * @mem_regions: data for each of the PRU memory regions 114d4ce2de7SSuman Anna * @fw_name: name of firmware image used during loading 115c75c9fdaSGrzegorz Jaszczyk * @mapped_irq: virtual interrupt numbers of created fw specific mapping 116c75c9fdaSGrzegorz Jaszczyk * @pru_interrupt_map: pointer to interrupt mapping description (firmware) 117c75c9fdaSGrzegorz Jaszczyk * @pru_interrupt_map_sz: pru_interrupt_map size 11820ad1de0SSuman Anna * @dbg_single_step: debug state variable to set PRU into single step mode 11920ad1de0SSuman Anna * @dbg_continuous: debug state variable to restore PRU execution mode 120c75c9fdaSGrzegorz Jaszczyk * @evt_count: number of mapped events 121d4ce2de7SSuman Anna */ 122d4ce2de7SSuman Anna struct pru_rproc { 123d4ce2de7SSuman Anna int id; 124d4ce2de7SSuman Anna struct device *dev; 125d4ce2de7SSuman Anna struct pruss *pruss; 126d4ce2de7SSuman Anna struct rproc *rproc; 1271d39f4d1SSuman Anna const struct pru_private_data *data; 128d4ce2de7SSuman Anna struct pruss_mem_region mem_regions[PRU_IOMEM_MAX]; 129d4ce2de7SSuman Anna const char *fw_name; 130c75c9fdaSGrzegorz Jaszczyk unsigned int *mapped_irq; 131c75c9fdaSGrzegorz Jaszczyk struct pru_irq_rsc *pru_interrupt_map; 132c75c9fdaSGrzegorz Jaszczyk size_t pru_interrupt_map_sz; 13320ad1de0SSuman Anna u32 dbg_single_step; 13420ad1de0SSuman Anna u32 dbg_continuous; 135c75c9fdaSGrzegorz Jaszczyk u8 evt_count; 136d4ce2de7SSuman Anna }; 137d4ce2de7SSuman Anna 138d4ce2de7SSuman Anna static inline u32 pru_control_read_reg(struct pru_rproc *pru, unsigned int reg) 139d4ce2de7SSuman Anna { 140d4ce2de7SSuman Anna return readl_relaxed(pru->mem_regions[PRU_IOMEM_CTRL].va + reg); 141d4ce2de7SSuman Anna } 142d4ce2de7SSuman Anna 143d4ce2de7SSuman Anna static inline 144d4ce2de7SSuman Anna void pru_control_write_reg(struct pru_rproc *pru, unsigned int reg, u32 val) 145d4ce2de7SSuman Anna { 146d4ce2de7SSuman Anna writel_relaxed(val, pru->mem_regions[PRU_IOMEM_CTRL].va + reg); 147d4ce2de7SSuman Anna } 148d4ce2de7SSuman Anna 14920ad1de0SSuman Anna static inline u32 pru_debug_read_reg(struct pru_rproc *pru, unsigned int reg) 15020ad1de0SSuman Anna { 15120ad1de0SSuman Anna return readl_relaxed(pru->mem_regions[PRU_IOMEM_DEBUG].va + reg); 15220ad1de0SSuman Anna } 15320ad1de0SSuman Anna 15420ad1de0SSuman Anna static int regs_show(struct seq_file *s, void *data) 15520ad1de0SSuman Anna { 15620ad1de0SSuman Anna struct rproc *rproc = s->private; 15720ad1de0SSuman Anna struct pru_rproc *pru = rproc->priv; 15820ad1de0SSuman Anna int i, nregs = 32; 15920ad1de0SSuman Anna u32 pru_sts; 16020ad1de0SSuman Anna int pru_is_running; 16120ad1de0SSuman Anna 16220ad1de0SSuman Anna seq_puts(s, "============== Control Registers ==============\n"); 16320ad1de0SSuman Anna seq_printf(s, "CTRL := 0x%08x\n", 16420ad1de0SSuman Anna pru_control_read_reg(pru, PRU_CTRL_CTRL)); 16520ad1de0SSuman Anna pru_sts = pru_control_read_reg(pru, PRU_CTRL_STS); 16620ad1de0SSuman Anna seq_printf(s, "STS (PC) := 0x%08x (0x%08x)\n", pru_sts, pru_sts << 2); 16720ad1de0SSuman Anna seq_printf(s, "WAKEUP_EN := 0x%08x\n", 16820ad1de0SSuman Anna pru_control_read_reg(pru, PRU_CTRL_WAKEUP_EN)); 16920ad1de0SSuman Anna seq_printf(s, "CYCLE := 0x%08x\n", 17020ad1de0SSuman Anna pru_control_read_reg(pru, PRU_CTRL_CYCLE)); 17120ad1de0SSuman Anna seq_printf(s, "STALL := 0x%08x\n", 17220ad1de0SSuman Anna pru_control_read_reg(pru, PRU_CTRL_STALL)); 17320ad1de0SSuman Anna seq_printf(s, "CTBIR0 := 0x%08x\n", 17420ad1de0SSuman Anna pru_control_read_reg(pru, PRU_CTRL_CTBIR0)); 17520ad1de0SSuman Anna seq_printf(s, "CTBIR1 := 0x%08x\n", 17620ad1de0SSuman Anna pru_control_read_reg(pru, PRU_CTRL_CTBIR1)); 17720ad1de0SSuman Anna seq_printf(s, "CTPPR0 := 0x%08x\n", 17820ad1de0SSuman Anna pru_control_read_reg(pru, PRU_CTRL_CTPPR0)); 17920ad1de0SSuman Anna seq_printf(s, "CTPPR1 := 0x%08x\n", 18020ad1de0SSuman Anna pru_control_read_reg(pru, PRU_CTRL_CTPPR1)); 18120ad1de0SSuman Anna 18220ad1de0SSuman Anna seq_puts(s, "=============== Debug Registers ===============\n"); 18320ad1de0SSuman Anna pru_is_running = pru_control_read_reg(pru, PRU_CTRL_CTRL) & 18420ad1de0SSuman Anna CTRL_CTRL_RUNSTATE; 18520ad1de0SSuman Anna if (pru_is_running) { 18620ad1de0SSuman Anna seq_puts(s, "PRU is executing, cannot print/access debug registers.\n"); 18720ad1de0SSuman Anna return 0; 18820ad1de0SSuman Anna } 18920ad1de0SSuman Anna 19020ad1de0SSuman Anna for (i = 0; i < nregs; i++) { 19120ad1de0SSuman Anna seq_printf(s, "GPREG%-2d := 0x%08x\tCT_REG%-2d := 0x%08x\n", 19220ad1de0SSuman Anna i, pru_debug_read_reg(pru, PRU_DEBUG_GPREG(i)), 19320ad1de0SSuman Anna i, pru_debug_read_reg(pru, PRU_DEBUG_CT_REG(i))); 19420ad1de0SSuman Anna } 19520ad1de0SSuman Anna 19620ad1de0SSuman Anna return 0; 19720ad1de0SSuman Anna } 19820ad1de0SSuman Anna DEFINE_SHOW_ATTRIBUTE(regs); 19920ad1de0SSuman Anna 20020ad1de0SSuman Anna /* 20120ad1de0SSuman Anna * Control PRU single-step mode 20220ad1de0SSuman Anna * 20320ad1de0SSuman Anna * This is a debug helper function used for controlling the single-step 20420ad1de0SSuman Anna * mode of the PRU. The PRU Debug registers are not accessible when the 20520ad1de0SSuman Anna * PRU is in RUNNING state. 20620ad1de0SSuman Anna * 20720ad1de0SSuman Anna * Writing a non-zero value sets the PRU into single-step mode irrespective 20820ad1de0SSuman Anna * of its previous state. The PRU mode is saved only on the first set into 20920ad1de0SSuman Anna * a single-step mode. Writing a zero value will restore the PRU into its 21020ad1de0SSuman Anna * original mode. 21120ad1de0SSuman Anna */ 21220ad1de0SSuman Anna static int pru_rproc_debug_ss_set(void *data, u64 val) 21320ad1de0SSuman Anna { 21420ad1de0SSuman Anna struct rproc *rproc = data; 21520ad1de0SSuman Anna struct pru_rproc *pru = rproc->priv; 21620ad1de0SSuman Anna u32 reg_val; 21720ad1de0SSuman Anna 21820ad1de0SSuman Anna val = val ? 1 : 0; 21920ad1de0SSuman Anna if (!val && !pru->dbg_single_step) 22020ad1de0SSuman Anna return 0; 22120ad1de0SSuman Anna 22220ad1de0SSuman Anna reg_val = pru_control_read_reg(pru, PRU_CTRL_CTRL); 22320ad1de0SSuman Anna 22420ad1de0SSuman Anna if (val && !pru->dbg_single_step) 22520ad1de0SSuman Anna pru->dbg_continuous = reg_val; 22620ad1de0SSuman Anna 22720ad1de0SSuman Anna if (val) 22820ad1de0SSuman Anna reg_val |= CTRL_CTRL_SINGLE_STEP | CTRL_CTRL_EN; 22920ad1de0SSuman Anna else 23020ad1de0SSuman Anna reg_val = pru->dbg_continuous; 23120ad1de0SSuman Anna 23220ad1de0SSuman Anna pru->dbg_single_step = val; 23320ad1de0SSuman Anna pru_control_write_reg(pru, PRU_CTRL_CTRL, reg_val); 23420ad1de0SSuman Anna 23520ad1de0SSuman Anna return 0; 23620ad1de0SSuman Anna } 23720ad1de0SSuman Anna 23820ad1de0SSuman Anna static int pru_rproc_debug_ss_get(void *data, u64 *val) 23920ad1de0SSuman Anna { 24020ad1de0SSuman Anna struct rproc *rproc = data; 24120ad1de0SSuman Anna struct pru_rproc *pru = rproc->priv; 24220ad1de0SSuman Anna 24320ad1de0SSuman Anna *val = pru->dbg_single_step; 24420ad1de0SSuman Anna 24520ad1de0SSuman Anna return 0; 24620ad1de0SSuman Anna } 24720ad1de0SSuman Anna DEFINE_SIMPLE_ATTRIBUTE(pru_rproc_debug_ss_fops, pru_rproc_debug_ss_get, 24820ad1de0SSuman Anna pru_rproc_debug_ss_set, "%llu\n"); 24920ad1de0SSuman Anna 25020ad1de0SSuman Anna /* 25120ad1de0SSuman Anna * Create PRU-specific debugfs entries 25220ad1de0SSuman Anna * 25320ad1de0SSuman Anna * The entries are created only if the parent remoteproc debugfs directory 25420ad1de0SSuman Anna * exists, and will be cleaned up by the remoteproc core. 25520ad1de0SSuman Anna */ 25620ad1de0SSuman Anna static void pru_rproc_create_debug_entries(struct rproc *rproc) 25720ad1de0SSuman Anna { 25820ad1de0SSuman Anna if (!rproc->dbg_dir) 25920ad1de0SSuman Anna return; 26020ad1de0SSuman Anna 26120ad1de0SSuman Anna debugfs_create_file("regs", 0400, rproc->dbg_dir, 26220ad1de0SSuman Anna rproc, ®s_fops); 26320ad1de0SSuman Anna debugfs_create_file("single_step", 0600, rproc->dbg_dir, 26420ad1de0SSuman Anna rproc, &pru_rproc_debug_ss_fops); 26520ad1de0SSuman Anna } 26620ad1de0SSuman Anna 267c75c9fdaSGrzegorz Jaszczyk static void pru_dispose_irq_mapping(struct pru_rproc *pru) 268c75c9fdaSGrzegorz Jaszczyk { 269c75c9fdaSGrzegorz Jaszczyk while (pru->evt_count--) { 270c75c9fdaSGrzegorz Jaszczyk if (pru->mapped_irq[pru->evt_count] > 0) 271c75c9fdaSGrzegorz Jaszczyk irq_dispose_mapping(pru->mapped_irq[pru->evt_count]); 272c75c9fdaSGrzegorz Jaszczyk } 273c75c9fdaSGrzegorz Jaszczyk 274c75c9fdaSGrzegorz Jaszczyk kfree(pru->mapped_irq); 275c75c9fdaSGrzegorz Jaszczyk } 276c75c9fdaSGrzegorz Jaszczyk 277c75c9fdaSGrzegorz Jaszczyk /* 278c75c9fdaSGrzegorz Jaszczyk * Parse the custom PRU interrupt map resource and configure the INTC 279c75c9fdaSGrzegorz Jaszczyk * appropriately. 280c75c9fdaSGrzegorz Jaszczyk */ 281c75c9fdaSGrzegorz Jaszczyk static int pru_handle_intrmap(struct rproc *rproc) 282c75c9fdaSGrzegorz Jaszczyk { 283c75c9fdaSGrzegorz Jaszczyk struct device *dev = rproc->dev.parent; 284c75c9fdaSGrzegorz Jaszczyk struct pru_rproc *pru = rproc->priv; 285c75c9fdaSGrzegorz Jaszczyk struct pru_irq_rsc *rsc = pru->pru_interrupt_map; 286c75c9fdaSGrzegorz Jaszczyk struct irq_fwspec fwspec; 287c75c9fdaSGrzegorz Jaszczyk struct device_node *irq_parent; 288c75c9fdaSGrzegorz Jaszczyk int i, ret = 0; 289c75c9fdaSGrzegorz Jaszczyk 290c75c9fdaSGrzegorz Jaszczyk /* not having pru_interrupt_map is not an error */ 291c75c9fdaSGrzegorz Jaszczyk if (!rsc) 292c75c9fdaSGrzegorz Jaszczyk return 0; 293c75c9fdaSGrzegorz Jaszczyk 294c75c9fdaSGrzegorz Jaszczyk /* currently supporting only type 0 */ 295c75c9fdaSGrzegorz Jaszczyk if (rsc->type != 0) { 296c75c9fdaSGrzegorz Jaszczyk dev_err(dev, "unsupported rsc type: %d\n", rsc->type); 297c75c9fdaSGrzegorz Jaszczyk return -EINVAL; 298c75c9fdaSGrzegorz Jaszczyk } 299c75c9fdaSGrzegorz Jaszczyk 300c75c9fdaSGrzegorz Jaszczyk if (rsc->num_evts > MAX_PRU_SYS_EVENTS) 301c75c9fdaSGrzegorz Jaszczyk return -EINVAL; 302c75c9fdaSGrzegorz Jaszczyk 303c75c9fdaSGrzegorz Jaszczyk if (sizeof(*rsc) + rsc->num_evts * sizeof(struct pruss_int_map) != 304c75c9fdaSGrzegorz Jaszczyk pru->pru_interrupt_map_sz) 305c75c9fdaSGrzegorz Jaszczyk return -EINVAL; 306c75c9fdaSGrzegorz Jaszczyk 307c75c9fdaSGrzegorz Jaszczyk pru->evt_count = rsc->num_evts; 308c75c9fdaSGrzegorz Jaszczyk pru->mapped_irq = kcalloc(pru->evt_count, sizeof(unsigned int), 309c75c9fdaSGrzegorz Jaszczyk GFP_KERNEL); 310c75c9fdaSGrzegorz Jaszczyk if (!pru->mapped_irq) 311c75c9fdaSGrzegorz Jaszczyk return -ENOMEM; 312c75c9fdaSGrzegorz Jaszczyk 313c75c9fdaSGrzegorz Jaszczyk /* 314c75c9fdaSGrzegorz Jaszczyk * parse and fill in system event to interrupt channel and 315c75c9fdaSGrzegorz Jaszczyk * channel-to-host mapping 316c75c9fdaSGrzegorz Jaszczyk */ 317c75c9fdaSGrzegorz Jaszczyk irq_parent = of_irq_find_parent(pru->dev->of_node); 318c75c9fdaSGrzegorz Jaszczyk if (!irq_parent) { 319c75c9fdaSGrzegorz Jaszczyk kfree(pru->mapped_irq); 320c75c9fdaSGrzegorz Jaszczyk return -ENODEV; 321c75c9fdaSGrzegorz Jaszczyk } 322c75c9fdaSGrzegorz Jaszczyk 323c75c9fdaSGrzegorz Jaszczyk fwspec.fwnode = of_node_to_fwnode(irq_parent); 324c75c9fdaSGrzegorz Jaszczyk fwspec.param_count = 3; 325c75c9fdaSGrzegorz Jaszczyk for (i = 0; i < pru->evt_count; i++) { 326c75c9fdaSGrzegorz Jaszczyk fwspec.param[0] = rsc->pru_intc_map[i].event; 327c75c9fdaSGrzegorz Jaszczyk fwspec.param[1] = rsc->pru_intc_map[i].chnl; 328c75c9fdaSGrzegorz Jaszczyk fwspec.param[2] = rsc->pru_intc_map[i].host; 329c75c9fdaSGrzegorz Jaszczyk 330c75c9fdaSGrzegorz Jaszczyk dev_dbg(dev, "mapping%d: event %d, chnl %d, host %d\n", 331c75c9fdaSGrzegorz Jaszczyk i, fwspec.param[0], fwspec.param[1], fwspec.param[2]); 332c75c9fdaSGrzegorz Jaszczyk 333c75c9fdaSGrzegorz Jaszczyk pru->mapped_irq[i] = irq_create_fwspec_mapping(&fwspec); 334c75c9fdaSGrzegorz Jaszczyk if (!pru->mapped_irq[i]) { 335c75c9fdaSGrzegorz Jaszczyk dev_err(dev, "failed to get virq\n"); 336c75c9fdaSGrzegorz Jaszczyk ret = pru->mapped_irq[i]; 337c75c9fdaSGrzegorz Jaszczyk goto map_fail; 338c75c9fdaSGrzegorz Jaszczyk } 339c75c9fdaSGrzegorz Jaszczyk } 340c75c9fdaSGrzegorz Jaszczyk 341c75c9fdaSGrzegorz Jaszczyk return ret; 342c75c9fdaSGrzegorz Jaszczyk 343c75c9fdaSGrzegorz Jaszczyk map_fail: 344c75c9fdaSGrzegorz Jaszczyk pru_dispose_irq_mapping(pru); 345c75c9fdaSGrzegorz Jaszczyk 346c75c9fdaSGrzegorz Jaszczyk return ret; 347c75c9fdaSGrzegorz Jaszczyk } 348c75c9fdaSGrzegorz Jaszczyk 349d4ce2de7SSuman Anna static int pru_rproc_start(struct rproc *rproc) 350d4ce2de7SSuman Anna { 351d4ce2de7SSuman Anna struct device *dev = &rproc->dev; 352d4ce2de7SSuman Anna struct pru_rproc *pru = rproc->priv; 3531d39f4d1SSuman Anna const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" }; 354d4ce2de7SSuman Anna u32 val; 355c75c9fdaSGrzegorz Jaszczyk int ret; 356d4ce2de7SSuman Anna 3571d39f4d1SSuman Anna dev_dbg(dev, "starting %s%d: entry-point = 0x%llx\n", 3581d39f4d1SSuman Anna names[pru->data->type], pru->id, (rproc->bootaddr >> 2)); 359d4ce2de7SSuman Anna 360c75c9fdaSGrzegorz Jaszczyk ret = pru_handle_intrmap(rproc); 361c75c9fdaSGrzegorz Jaszczyk /* 362c75c9fdaSGrzegorz Jaszczyk * reset references to pru interrupt map - they will stop being valid 363c75c9fdaSGrzegorz Jaszczyk * after rproc_start returns 364c75c9fdaSGrzegorz Jaszczyk */ 365c75c9fdaSGrzegorz Jaszczyk pru->pru_interrupt_map = NULL; 366c75c9fdaSGrzegorz Jaszczyk pru->pru_interrupt_map_sz = 0; 367c75c9fdaSGrzegorz Jaszczyk if (ret) 368c75c9fdaSGrzegorz Jaszczyk return ret; 369c75c9fdaSGrzegorz Jaszczyk 370d4ce2de7SSuman Anna val = CTRL_CTRL_EN | ((rproc->bootaddr >> 2) << 16); 371d4ce2de7SSuman Anna pru_control_write_reg(pru, PRU_CTRL_CTRL, val); 372d4ce2de7SSuman Anna 373d4ce2de7SSuman Anna return 0; 374d4ce2de7SSuman Anna } 375d4ce2de7SSuman Anna 376d4ce2de7SSuman Anna static int pru_rproc_stop(struct rproc *rproc) 377d4ce2de7SSuman Anna { 378d4ce2de7SSuman Anna struct device *dev = &rproc->dev; 379d4ce2de7SSuman Anna struct pru_rproc *pru = rproc->priv; 3801d39f4d1SSuman Anna const char *names[PRU_TYPE_MAX] = { "PRU", "RTU", "Tx_PRU" }; 381d4ce2de7SSuman Anna u32 val; 382d4ce2de7SSuman Anna 3831d39f4d1SSuman Anna dev_dbg(dev, "stopping %s%d\n", names[pru->data->type], pru->id); 384d4ce2de7SSuman Anna 385d4ce2de7SSuman Anna val = pru_control_read_reg(pru, PRU_CTRL_CTRL); 386d4ce2de7SSuman Anna val &= ~CTRL_CTRL_EN; 387d4ce2de7SSuman Anna pru_control_write_reg(pru, PRU_CTRL_CTRL, val); 388d4ce2de7SSuman Anna 389c75c9fdaSGrzegorz Jaszczyk /* dispose irq mapping - new firmware can provide new mapping */ 390c75c9fdaSGrzegorz Jaszczyk if (pru->mapped_irq) 391c75c9fdaSGrzegorz Jaszczyk pru_dispose_irq_mapping(pru); 392c75c9fdaSGrzegorz Jaszczyk 393d4ce2de7SSuman Anna return 0; 394d4ce2de7SSuman Anna } 395d4ce2de7SSuman Anna 396d4ce2de7SSuman Anna /* 397d4ce2de7SSuman Anna * Convert PRU device address (data spaces only) to kernel virtual address. 398d4ce2de7SSuman Anna * 399d4ce2de7SSuman Anna * Each PRU has access to all data memories within the PRUSS, accessible at 400d4ce2de7SSuman Anna * different ranges. So, look through both its primary and secondary Data 401d4ce2de7SSuman Anna * RAMs as well as any shared Data RAM to convert a PRU device address to 402d4ce2de7SSuman Anna * kernel virtual address. Data RAM0 is primary Data RAM for PRU0 and Data 403d4ce2de7SSuman Anna * RAM1 is primary Data RAM for PRU1. 404d4ce2de7SSuman Anna */ 405d4ce2de7SSuman Anna static void *pru_d_da_to_va(struct pru_rproc *pru, u32 da, size_t len) 406d4ce2de7SSuman Anna { 407d4ce2de7SSuman Anna struct pruss_mem_region dram0, dram1, shrd_ram; 408d4ce2de7SSuman Anna struct pruss *pruss = pru->pruss; 409d4ce2de7SSuman Anna u32 offset; 410d4ce2de7SSuman Anna void *va = NULL; 411d4ce2de7SSuman Anna 412d4ce2de7SSuman Anna if (len == 0) 413d4ce2de7SSuman Anna return NULL; 414d4ce2de7SSuman Anna 415d4ce2de7SSuman Anna dram0 = pruss->mem_regions[PRUSS_MEM_DRAM0]; 416d4ce2de7SSuman Anna dram1 = pruss->mem_regions[PRUSS_MEM_DRAM1]; 417d4ce2de7SSuman Anna /* PRU1 has its local RAM addresses reversed */ 418d4ce2de7SSuman Anna if (pru->id == 1) 419d4ce2de7SSuman Anna swap(dram0, dram1); 420d4ce2de7SSuman Anna shrd_ram = pruss->mem_regions[PRUSS_MEM_SHRD_RAM2]; 421d4ce2de7SSuman Anna 422d4ce2de7SSuman Anna if (da >= PRU_PDRAM_DA && da + len <= PRU_PDRAM_DA + dram0.size) { 423d4ce2de7SSuman Anna offset = da - PRU_PDRAM_DA; 424d4ce2de7SSuman Anna va = (__force void *)(dram0.va + offset); 425d4ce2de7SSuman Anna } else if (da >= PRU_SDRAM_DA && 426d4ce2de7SSuman Anna da + len <= PRU_SDRAM_DA + dram1.size) { 427d4ce2de7SSuman Anna offset = da - PRU_SDRAM_DA; 428d4ce2de7SSuman Anna va = (__force void *)(dram1.va + offset); 429d4ce2de7SSuman Anna } else if (da >= PRU_SHRDRAM_DA && 430d4ce2de7SSuman Anna da + len <= PRU_SHRDRAM_DA + shrd_ram.size) { 431d4ce2de7SSuman Anna offset = da - PRU_SHRDRAM_DA; 432d4ce2de7SSuman Anna va = (__force void *)(shrd_ram.va + offset); 433d4ce2de7SSuman Anna } 434d4ce2de7SSuman Anna 435d4ce2de7SSuman Anna return va; 436d4ce2de7SSuman Anna } 437d4ce2de7SSuman Anna 438d4ce2de7SSuman Anna /* 439d4ce2de7SSuman Anna * Convert PRU device address (instruction space) to kernel virtual address. 440d4ce2de7SSuman Anna * 441d4ce2de7SSuman Anna * A PRU does not have an unified address space. Each PRU has its very own 442d4ce2de7SSuman Anna * private Instruction RAM, and its device address is identical to that of 443d4ce2de7SSuman Anna * its primary Data RAM device address. 444d4ce2de7SSuman Anna */ 445d4ce2de7SSuman Anna static void *pru_i_da_to_va(struct pru_rproc *pru, u32 da, size_t len) 446d4ce2de7SSuman Anna { 447d4ce2de7SSuman Anna u32 offset; 448d4ce2de7SSuman Anna void *va = NULL; 449d4ce2de7SSuman Anna 450d4ce2de7SSuman Anna if (len == 0) 451d4ce2de7SSuman Anna return NULL; 452d4ce2de7SSuman Anna 453e6d9423dSDimitar Dimitrov /* 454e6d9423dSDimitar Dimitrov * GNU binutils do not support multiple address spaces. The GNU 455e6d9423dSDimitar Dimitrov * linker's default linker script places IRAM at an arbitrary high 456e6d9423dSDimitar Dimitrov * offset, in order to differentiate it from DRAM. Hence we need to 457e6d9423dSDimitar Dimitrov * strip the artificial offset in the IRAM addresses coming from the 458e6d9423dSDimitar Dimitrov * ELF file. 459e6d9423dSDimitar Dimitrov * 460e6d9423dSDimitar Dimitrov * The TI proprietary linker would never set those higher IRAM address 461e6d9423dSDimitar Dimitrov * bits anyway. PRU architecture limits the program counter to 16-bit 462e6d9423dSDimitar Dimitrov * word-address range. This in turn corresponds to 18-bit IRAM 463e6d9423dSDimitar Dimitrov * byte-address range for ELF. 464e6d9423dSDimitar Dimitrov * 465e6d9423dSDimitar Dimitrov * Two more bits are added just in case to make the final 20-bit mask. 466e6d9423dSDimitar Dimitrov * Idea is to have a safeguard in case TI decides to add banking 467e6d9423dSDimitar Dimitrov * in future SoCs. 468e6d9423dSDimitar Dimitrov */ 469e6d9423dSDimitar Dimitrov da &= 0xfffff; 470e6d9423dSDimitar Dimitrov 471d4ce2de7SSuman Anna if (da >= PRU_IRAM_DA && 472d4ce2de7SSuman Anna da + len <= PRU_IRAM_DA + pru->mem_regions[PRU_IOMEM_IRAM].size) { 473d4ce2de7SSuman Anna offset = da - PRU_IRAM_DA; 474d4ce2de7SSuman Anna va = (__force void *)(pru->mem_regions[PRU_IOMEM_IRAM].va + 475d4ce2de7SSuman Anna offset); 476d4ce2de7SSuman Anna } 477d4ce2de7SSuman Anna 478d4ce2de7SSuman Anna return va; 479d4ce2de7SSuman Anna } 480d4ce2de7SSuman Anna 481d4ce2de7SSuman Anna /* 482d4ce2de7SSuman Anna * Provide address translations for only PRU Data RAMs through the remoteproc 483d4ce2de7SSuman Anna * core for any PRU client drivers. The PRU Instruction RAM access is restricted 484d4ce2de7SSuman Anna * only to the PRU loader code. 485d4ce2de7SSuman Anna */ 486d4ce2de7SSuman Anna static void *pru_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len) 487d4ce2de7SSuman Anna { 488d4ce2de7SSuman Anna struct pru_rproc *pru = rproc->priv; 489d4ce2de7SSuman Anna 490d4ce2de7SSuman Anna return pru_d_da_to_va(pru, da, len); 491d4ce2de7SSuman Anna } 492d4ce2de7SSuman Anna 493d4ce2de7SSuman Anna /* PRU-specific address translator used by PRU loader. */ 494d4ce2de7SSuman Anna static void *pru_da_to_va(struct rproc *rproc, u64 da, size_t len, bool is_iram) 495d4ce2de7SSuman Anna { 496d4ce2de7SSuman Anna struct pru_rproc *pru = rproc->priv; 497d4ce2de7SSuman Anna void *va; 498d4ce2de7SSuman Anna 499d4ce2de7SSuman Anna if (is_iram) 500d4ce2de7SSuman Anna va = pru_i_da_to_va(pru, da, len); 501d4ce2de7SSuman Anna else 502d4ce2de7SSuman Anna va = pru_d_da_to_va(pru, da, len); 503d4ce2de7SSuman Anna 504d4ce2de7SSuman Anna return va; 505d4ce2de7SSuman Anna } 506d4ce2de7SSuman Anna 507d4ce2de7SSuman Anna static struct rproc_ops pru_rproc_ops = { 508d4ce2de7SSuman Anna .start = pru_rproc_start, 509d4ce2de7SSuman Anna .stop = pru_rproc_stop, 510d4ce2de7SSuman Anna .da_to_va = pru_rproc_da_to_va, 511d4ce2de7SSuman Anna }; 512d4ce2de7SSuman Anna 5131d39f4d1SSuman Anna /* 5141d39f4d1SSuman Anna * Custom memory copy implementation for ICSSG PRU/RTU/Tx_PRU Cores 5151d39f4d1SSuman Anna * 5161d39f4d1SSuman Anna * The ICSSG PRU/RTU/Tx_PRU cores have a memory copying issue with IRAM 5171d39f4d1SSuman Anna * memories, that is not seen on previous generation SoCs. The data is reflected 5181d39f4d1SSuman Anna * properly in the IRAM memories only for integer (4-byte) copies. Any unaligned 5191d39f4d1SSuman Anna * copies result in all the other pre-existing bytes zeroed out within that 5201d39f4d1SSuman Anna * 4-byte boundary, thereby resulting in wrong text/code in the IRAMs. Also, the 5211d39f4d1SSuman Anna * IRAM memory port interface does not allow any 8-byte copies (as commonly used 5221d39f4d1SSuman Anna * by ARM64 memcpy implementation) and throws an exception. The DRAM memory 5231d39f4d1SSuman Anna * ports do not show this behavior. 5241d39f4d1SSuman Anna */ 5251d39f4d1SSuman Anna static int pru_rproc_memcpy(void *dest, const void *src, size_t count) 5261d39f4d1SSuman Anna { 5271d39f4d1SSuman Anna const u32 *s = src; 5281d39f4d1SSuman Anna u32 *d = dest; 5291d39f4d1SSuman Anna size_t size = count / 4; 5301d39f4d1SSuman Anna u32 *tmp_src = NULL; 5311d39f4d1SSuman Anna 5321d39f4d1SSuman Anna /* 5331d39f4d1SSuman Anna * TODO: relax limitation of 4-byte aligned dest addresses and copy 5341d39f4d1SSuman Anna * sizes 5351d39f4d1SSuman Anna */ 5361d39f4d1SSuman Anna if ((long)dest % 4 || count % 4) 5371d39f4d1SSuman Anna return -EINVAL; 5381d39f4d1SSuman Anna 5391d39f4d1SSuman Anna /* src offsets in ELF firmware image can be non-aligned */ 5401d39f4d1SSuman Anna if ((long)src % 4) { 5411d39f4d1SSuman Anna tmp_src = kmemdup(src, count, GFP_KERNEL); 5421d39f4d1SSuman Anna if (!tmp_src) 5431d39f4d1SSuman Anna return -ENOMEM; 5441d39f4d1SSuman Anna s = tmp_src; 5451d39f4d1SSuman Anna } 5461d39f4d1SSuman Anna 5471d39f4d1SSuman Anna while (size--) 5481d39f4d1SSuman Anna *d++ = *s++; 5491d39f4d1SSuman Anna 5501d39f4d1SSuman Anna kfree(tmp_src); 5511d39f4d1SSuman Anna 5521d39f4d1SSuman Anna return 0; 5531d39f4d1SSuman Anna } 5541d39f4d1SSuman Anna 555d4ce2de7SSuman Anna static int 556d4ce2de7SSuman Anna pru_rproc_load_elf_segments(struct rproc *rproc, const struct firmware *fw) 557d4ce2de7SSuman Anna { 5581d39f4d1SSuman Anna struct pru_rproc *pru = rproc->priv; 559d4ce2de7SSuman Anna struct device *dev = &rproc->dev; 560d4ce2de7SSuman Anna struct elf32_hdr *ehdr; 561d4ce2de7SSuman Anna struct elf32_phdr *phdr; 562d4ce2de7SSuman Anna int i, ret = 0; 563d4ce2de7SSuman Anna const u8 *elf_data = fw->data; 564d4ce2de7SSuman Anna 565d4ce2de7SSuman Anna ehdr = (struct elf32_hdr *)elf_data; 566d4ce2de7SSuman Anna phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff); 567d4ce2de7SSuman Anna 568d4ce2de7SSuman Anna /* go through the available ELF segments */ 569d4ce2de7SSuman Anna for (i = 0; i < ehdr->e_phnum; i++, phdr++) { 570d4ce2de7SSuman Anna u32 da = phdr->p_paddr; 571d4ce2de7SSuman Anna u32 memsz = phdr->p_memsz; 572d4ce2de7SSuman Anna u32 filesz = phdr->p_filesz; 573d4ce2de7SSuman Anna u32 offset = phdr->p_offset; 574d4ce2de7SSuman Anna bool is_iram; 575d4ce2de7SSuman Anna void *ptr; 576d4ce2de7SSuman Anna 577d4ce2de7SSuman Anna if (phdr->p_type != PT_LOAD || !filesz) 578d4ce2de7SSuman Anna continue; 579d4ce2de7SSuman Anna 580d4ce2de7SSuman Anna dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n", 581d4ce2de7SSuman Anna phdr->p_type, da, memsz, filesz); 582d4ce2de7SSuman Anna 583d4ce2de7SSuman Anna if (filesz > memsz) { 584d4ce2de7SSuman Anna dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n", 585d4ce2de7SSuman Anna filesz, memsz); 586d4ce2de7SSuman Anna ret = -EINVAL; 587d4ce2de7SSuman Anna break; 588d4ce2de7SSuman Anna } 589d4ce2de7SSuman Anna 590d4ce2de7SSuman Anna if (offset + filesz > fw->size) { 591d4ce2de7SSuman Anna dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n", 592d4ce2de7SSuman Anna offset + filesz, fw->size); 593d4ce2de7SSuman Anna ret = -EINVAL; 594d4ce2de7SSuman Anna break; 595d4ce2de7SSuman Anna } 596d4ce2de7SSuman Anna 597d4ce2de7SSuman Anna /* grab the kernel address for this device address */ 598d4ce2de7SSuman Anna is_iram = phdr->p_flags & PF_X; 599d4ce2de7SSuman Anna ptr = pru_da_to_va(rproc, da, memsz, is_iram); 600d4ce2de7SSuman Anna if (!ptr) { 601d4ce2de7SSuman Anna dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz); 602d4ce2de7SSuman Anna ret = -EINVAL; 603d4ce2de7SSuman Anna break; 604d4ce2de7SSuman Anna } 605d4ce2de7SSuman Anna 606*9afeefcfSSuman Anna if (pru->data->is_k3) { 6071d39f4d1SSuman Anna ret = pru_rproc_memcpy(ptr, elf_data + phdr->p_offset, 6081d39f4d1SSuman Anna filesz); 6091d39f4d1SSuman Anna if (ret) { 6101d39f4d1SSuman Anna dev_err(dev, "PRU memory copy failed for da 0x%x memsz 0x%x\n", 6111d39f4d1SSuman Anna da, memsz); 6121d39f4d1SSuman Anna break; 6131d39f4d1SSuman Anna } 6141d39f4d1SSuman Anna } else { 615d4ce2de7SSuman Anna memcpy(ptr, elf_data + phdr->p_offset, filesz); 6161d39f4d1SSuman Anna } 617d4ce2de7SSuman Anna 618d4ce2de7SSuman Anna /* skip the memzero logic performed by remoteproc ELF loader */ 619d4ce2de7SSuman Anna } 620d4ce2de7SSuman Anna 621d4ce2de7SSuman Anna return ret; 622d4ce2de7SSuman Anna } 623d4ce2de7SSuman Anna 624c75c9fdaSGrzegorz Jaszczyk static const void * 625c75c9fdaSGrzegorz Jaszczyk pru_rproc_find_interrupt_map(struct device *dev, const struct firmware *fw) 626c75c9fdaSGrzegorz Jaszczyk { 627c75c9fdaSGrzegorz Jaszczyk struct elf32_shdr *shdr, *name_table_shdr; 628c75c9fdaSGrzegorz Jaszczyk const char *name_table; 629c75c9fdaSGrzegorz Jaszczyk const u8 *elf_data = fw->data; 630c75c9fdaSGrzegorz Jaszczyk struct elf32_hdr *ehdr = (struct elf32_hdr *)elf_data; 631c75c9fdaSGrzegorz Jaszczyk u16 shnum = ehdr->e_shnum; 632c75c9fdaSGrzegorz Jaszczyk u16 shstrndx = ehdr->e_shstrndx; 633c75c9fdaSGrzegorz Jaszczyk int i; 634c75c9fdaSGrzegorz Jaszczyk 635c75c9fdaSGrzegorz Jaszczyk /* first, get the section header */ 636c75c9fdaSGrzegorz Jaszczyk shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff); 637c75c9fdaSGrzegorz Jaszczyk /* compute name table section header entry in shdr array */ 638c75c9fdaSGrzegorz Jaszczyk name_table_shdr = shdr + shstrndx; 639c75c9fdaSGrzegorz Jaszczyk /* finally, compute the name table section address in elf */ 640c75c9fdaSGrzegorz Jaszczyk name_table = elf_data + name_table_shdr->sh_offset; 641c75c9fdaSGrzegorz Jaszczyk 642c75c9fdaSGrzegorz Jaszczyk for (i = 0; i < shnum; i++, shdr++) { 643c75c9fdaSGrzegorz Jaszczyk u32 size = shdr->sh_size; 644c75c9fdaSGrzegorz Jaszczyk u32 offset = shdr->sh_offset; 645c75c9fdaSGrzegorz Jaszczyk u32 name = shdr->sh_name; 646c75c9fdaSGrzegorz Jaszczyk 647c75c9fdaSGrzegorz Jaszczyk if (strcmp(name_table + name, ".pru_irq_map")) 648c75c9fdaSGrzegorz Jaszczyk continue; 649c75c9fdaSGrzegorz Jaszczyk 650c75c9fdaSGrzegorz Jaszczyk /* make sure we have the entire irq map */ 651c75c9fdaSGrzegorz Jaszczyk if (offset + size > fw->size || offset + size < size) { 652c75c9fdaSGrzegorz Jaszczyk dev_err(dev, ".pru_irq_map section truncated\n"); 653c75c9fdaSGrzegorz Jaszczyk return ERR_PTR(-EINVAL); 654c75c9fdaSGrzegorz Jaszczyk } 655c75c9fdaSGrzegorz Jaszczyk 656c75c9fdaSGrzegorz Jaszczyk /* make sure irq map has at least the header */ 657c75c9fdaSGrzegorz Jaszczyk if (sizeof(struct pru_irq_rsc) > size) { 658c75c9fdaSGrzegorz Jaszczyk dev_err(dev, "header-less .pru_irq_map section\n"); 659c75c9fdaSGrzegorz Jaszczyk return ERR_PTR(-EINVAL); 660c75c9fdaSGrzegorz Jaszczyk } 661c75c9fdaSGrzegorz Jaszczyk 662c75c9fdaSGrzegorz Jaszczyk return shdr; 663c75c9fdaSGrzegorz Jaszczyk } 664c75c9fdaSGrzegorz Jaszczyk 665c75c9fdaSGrzegorz Jaszczyk dev_dbg(dev, "no .pru_irq_map section found for this fw\n"); 666c75c9fdaSGrzegorz Jaszczyk 667c75c9fdaSGrzegorz Jaszczyk return NULL; 668c75c9fdaSGrzegorz Jaszczyk } 669c75c9fdaSGrzegorz Jaszczyk 670d4ce2de7SSuman Anna /* 671d4ce2de7SSuman Anna * Use a custom parse_fw callback function for dealing with PRU firmware 672d4ce2de7SSuman Anna * specific sections. 673c75c9fdaSGrzegorz Jaszczyk * 674c75c9fdaSGrzegorz Jaszczyk * The firmware blob can contain optional ELF sections: .resource_table section 675c75c9fdaSGrzegorz Jaszczyk * and .pru_irq_map one. The second one contains the PRUSS interrupt mapping 676c75c9fdaSGrzegorz Jaszczyk * description, which needs to be setup before powering on the PRU core. To 677c75c9fdaSGrzegorz Jaszczyk * avoid RAM wastage this ELF section is not mapped to any ELF segment (by the 678c75c9fdaSGrzegorz Jaszczyk * firmware linker) and therefore is not loaded to PRU memory. 679d4ce2de7SSuman Anna */ 680d4ce2de7SSuman Anna static int pru_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw) 681d4ce2de7SSuman Anna { 682c75c9fdaSGrzegorz Jaszczyk struct device *dev = &rproc->dev; 683c75c9fdaSGrzegorz Jaszczyk struct pru_rproc *pru = rproc->priv; 684c75c9fdaSGrzegorz Jaszczyk const u8 *elf_data = fw->data; 685c75c9fdaSGrzegorz Jaszczyk const void *shdr; 686c75c9fdaSGrzegorz Jaszczyk u8 class = fw_elf_get_class(fw); 687c75c9fdaSGrzegorz Jaszczyk u64 sh_offset; 688d4ce2de7SSuman Anna int ret; 689d4ce2de7SSuman Anna 690d4ce2de7SSuman Anna /* load optional rsc table */ 691d4ce2de7SSuman Anna ret = rproc_elf_load_rsc_table(rproc, fw); 692d4ce2de7SSuman Anna if (ret == -EINVAL) 693d4ce2de7SSuman Anna dev_dbg(&rproc->dev, "no resource table found for this fw\n"); 694d4ce2de7SSuman Anna else if (ret) 695d4ce2de7SSuman Anna return ret; 696d4ce2de7SSuman Anna 697c75c9fdaSGrzegorz Jaszczyk /* find .pru_interrupt_map section, not having it is not an error */ 698c75c9fdaSGrzegorz Jaszczyk shdr = pru_rproc_find_interrupt_map(dev, fw); 699c75c9fdaSGrzegorz Jaszczyk if (IS_ERR(shdr)) 700c75c9fdaSGrzegorz Jaszczyk return PTR_ERR(shdr); 701c75c9fdaSGrzegorz Jaszczyk 702c75c9fdaSGrzegorz Jaszczyk if (!shdr) 703c75c9fdaSGrzegorz Jaszczyk return 0; 704c75c9fdaSGrzegorz Jaszczyk 705c75c9fdaSGrzegorz Jaszczyk /* preserve pointer to PRU interrupt map together with it size */ 706c75c9fdaSGrzegorz Jaszczyk sh_offset = elf_shdr_get_sh_offset(class, shdr); 707c75c9fdaSGrzegorz Jaszczyk pru->pru_interrupt_map = (struct pru_irq_rsc *)(elf_data + sh_offset); 708c75c9fdaSGrzegorz Jaszczyk pru->pru_interrupt_map_sz = elf_shdr_get_sh_size(class, shdr); 709c75c9fdaSGrzegorz Jaszczyk 710d4ce2de7SSuman Anna return 0; 711d4ce2de7SSuman Anna } 712d4ce2de7SSuman Anna 713d4ce2de7SSuman Anna /* 714d4ce2de7SSuman Anna * Compute PRU id based on the IRAM addresses. The PRU IRAMs are 715d4ce2de7SSuman Anna * always at a particular offset within the PRUSS address space. 716d4ce2de7SSuman Anna */ 717d4ce2de7SSuman Anna static int pru_rproc_set_id(struct pru_rproc *pru) 718d4ce2de7SSuman Anna { 719d4ce2de7SSuman Anna int ret = 0; 720d4ce2de7SSuman Anna 721d4ce2de7SSuman Anna switch (pru->mem_regions[PRU_IOMEM_IRAM].pa & PRU_IRAM_ADDR_MASK) { 7221d39f4d1SSuman Anna case TX_PRU0_IRAM_ADDR_MASK: 7231d39f4d1SSuman Anna fallthrough; 7241d39f4d1SSuman Anna case RTU0_IRAM_ADDR_MASK: 7251d39f4d1SSuman Anna fallthrough; 726d4ce2de7SSuman Anna case PRU0_IRAM_ADDR_MASK: 727d4ce2de7SSuman Anna pru->id = 0; 728d4ce2de7SSuman Anna break; 7291d39f4d1SSuman Anna case TX_PRU1_IRAM_ADDR_MASK: 7301d39f4d1SSuman Anna fallthrough; 7311d39f4d1SSuman Anna case RTU1_IRAM_ADDR_MASK: 7321d39f4d1SSuman Anna fallthrough; 733d4ce2de7SSuman Anna case PRU1_IRAM_ADDR_MASK: 734d4ce2de7SSuman Anna pru->id = 1; 735d4ce2de7SSuman Anna break; 736d4ce2de7SSuman Anna default: 737d4ce2de7SSuman Anna ret = -EINVAL; 738d4ce2de7SSuman Anna } 739d4ce2de7SSuman Anna 740d4ce2de7SSuman Anna return ret; 741d4ce2de7SSuman Anna } 742d4ce2de7SSuman Anna 743d4ce2de7SSuman Anna static int pru_rproc_probe(struct platform_device *pdev) 744d4ce2de7SSuman Anna { 745d4ce2de7SSuman Anna struct device *dev = &pdev->dev; 746d4ce2de7SSuman Anna struct device_node *np = dev->of_node; 747d4ce2de7SSuman Anna struct platform_device *ppdev = to_platform_device(dev->parent); 748d4ce2de7SSuman Anna struct pru_rproc *pru; 749d4ce2de7SSuman Anna const char *fw_name; 750d4ce2de7SSuman Anna struct rproc *rproc = NULL; 751d4ce2de7SSuman Anna struct resource *res; 752d4ce2de7SSuman Anna int i, ret; 7531d39f4d1SSuman Anna const struct pru_private_data *data; 754d4ce2de7SSuman Anna const char *mem_names[PRU_IOMEM_MAX] = { "iram", "control", "debug" }; 755d4ce2de7SSuman Anna 7561d39f4d1SSuman Anna data = of_device_get_match_data(&pdev->dev); 7571d39f4d1SSuman Anna if (!data) 7581d39f4d1SSuman Anna return -ENODEV; 7591d39f4d1SSuman Anna 760d4ce2de7SSuman Anna ret = of_property_read_string(np, "firmware-name", &fw_name); 761d4ce2de7SSuman Anna if (ret) { 762d4ce2de7SSuman Anna dev_err(dev, "unable to retrieve firmware-name %d\n", ret); 763d4ce2de7SSuman Anna return ret; 764d4ce2de7SSuman Anna } 765d4ce2de7SSuman Anna 766d4ce2de7SSuman Anna rproc = devm_rproc_alloc(dev, pdev->name, &pru_rproc_ops, fw_name, 767d4ce2de7SSuman Anna sizeof(*pru)); 768d4ce2de7SSuman Anna if (!rproc) { 769d4ce2de7SSuman Anna dev_err(dev, "rproc_alloc failed\n"); 770d4ce2de7SSuman Anna return -ENOMEM; 771d4ce2de7SSuman Anna } 772d4ce2de7SSuman Anna /* use a custom load function to deal with PRU-specific quirks */ 773d4ce2de7SSuman Anna rproc->ops->load = pru_rproc_load_elf_segments; 774d4ce2de7SSuman Anna 775d4ce2de7SSuman Anna /* use a custom parse function to deal with PRU-specific resources */ 776d4ce2de7SSuman Anna rproc->ops->parse_fw = pru_rproc_parse_fw; 777d4ce2de7SSuman Anna 778d4ce2de7SSuman Anna /* error recovery is not supported for PRUs */ 779d4ce2de7SSuman Anna rproc->recovery_disabled = true; 780d4ce2de7SSuman Anna 781d4ce2de7SSuman Anna /* 782d4ce2de7SSuman Anna * rproc_add will auto-boot the processor normally, but this is not 783d4ce2de7SSuman Anna * desired with PRU client driven boot-flow methodology. A PRU 784d4ce2de7SSuman Anna * application/client driver will boot the corresponding PRU 785d4ce2de7SSuman Anna * remote-processor as part of its state machine either through the 786d4ce2de7SSuman Anna * remoteproc sysfs interface or through the equivalent kernel API. 787d4ce2de7SSuman Anna */ 788d4ce2de7SSuman Anna rproc->auto_boot = false; 789d4ce2de7SSuman Anna 790d4ce2de7SSuman Anna pru = rproc->priv; 791d4ce2de7SSuman Anna pru->dev = dev; 7921d39f4d1SSuman Anna pru->data = data; 793d4ce2de7SSuman Anna pru->pruss = platform_get_drvdata(ppdev); 794d4ce2de7SSuman Anna pru->rproc = rproc; 795d4ce2de7SSuman Anna pru->fw_name = fw_name; 796d4ce2de7SSuman Anna 797d4ce2de7SSuman Anna for (i = 0; i < ARRAY_SIZE(mem_names); i++) { 798d4ce2de7SSuman Anna res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 799d4ce2de7SSuman Anna mem_names[i]); 800d4ce2de7SSuman Anna pru->mem_regions[i].va = devm_ioremap_resource(dev, res); 801d4ce2de7SSuman Anna if (IS_ERR(pru->mem_regions[i].va)) { 802d4ce2de7SSuman Anna dev_err(dev, "failed to parse and map memory resource %d %s\n", 803d4ce2de7SSuman Anna i, mem_names[i]); 804d4ce2de7SSuman Anna ret = PTR_ERR(pru->mem_regions[i].va); 805d4ce2de7SSuman Anna return ret; 806d4ce2de7SSuman Anna } 807d4ce2de7SSuman Anna pru->mem_regions[i].pa = res->start; 808d4ce2de7SSuman Anna pru->mem_regions[i].size = resource_size(res); 809d4ce2de7SSuman Anna 810d4ce2de7SSuman Anna dev_dbg(dev, "memory %8s: pa %pa size 0x%zx va %pK\n", 811d4ce2de7SSuman Anna mem_names[i], &pru->mem_regions[i].pa, 812d4ce2de7SSuman Anna pru->mem_regions[i].size, pru->mem_regions[i].va); 813d4ce2de7SSuman Anna } 814d4ce2de7SSuman Anna 815d4ce2de7SSuman Anna ret = pru_rproc_set_id(pru); 816d4ce2de7SSuman Anna if (ret < 0) 817d4ce2de7SSuman Anna return ret; 818d4ce2de7SSuman Anna 819d4ce2de7SSuman Anna platform_set_drvdata(pdev, rproc); 820d4ce2de7SSuman Anna 821d4ce2de7SSuman Anna ret = devm_rproc_add(dev, pru->rproc); 822d4ce2de7SSuman Anna if (ret) { 823d4ce2de7SSuman Anna dev_err(dev, "rproc_add failed: %d\n", ret); 824d4ce2de7SSuman Anna return ret; 825d4ce2de7SSuman Anna } 826d4ce2de7SSuman Anna 82720ad1de0SSuman Anna pru_rproc_create_debug_entries(rproc); 82820ad1de0SSuman Anna 829d4ce2de7SSuman Anna dev_dbg(dev, "PRU rproc node %pOF probed successfully\n", np); 830d4ce2de7SSuman Anna 831d4ce2de7SSuman Anna return 0; 832d4ce2de7SSuman Anna } 833d4ce2de7SSuman Anna 834d4ce2de7SSuman Anna static int pru_rproc_remove(struct platform_device *pdev) 835d4ce2de7SSuman Anna { 836d4ce2de7SSuman Anna struct device *dev = &pdev->dev; 837d4ce2de7SSuman Anna struct rproc *rproc = platform_get_drvdata(pdev); 838d4ce2de7SSuman Anna 839d4ce2de7SSuman Anna dev_dbg(dev, "%s: removing rproc %s\n", __func__, rproc->name); 840d4ce2de7SSuman Anna 841d4ce2de7SSuman Anna return 0; 842d4ce2de7SSuman Anna } 843d4ce2de7SSuman Anna 8441d39f4d1SSuman Anna static const struct pru_private_data pru_data = { 8451d39f4d1SSuman Anna .type = PRU_TYPE_PRU, 8461d39f4d1SSuman Anna }; 8471d39f4d1SSuman Anna 8481d39f4d1SSuman Anna static const struct pru_private_data k3_pru_data = { 8491d39f4d1SSuman Anna .type = PRU_TYPE_PRU, 8501d39f4d1SSuman Anna .is_k3 = 1, 8511d39f4d1SSuman Anna }; 8521d39f4d1SSuman Anna 8531d39f4d1SSuman Anna static const struct pru_private_data k3_rtu_data = { 8541d39f4d1SSuman Anna .type = PRU_TYPE_RTU, 8551d39f4d1SSuman Anna .is_k3 = 1, 8561d39f4d1SSuman Anna }; 8571d39f4d1SSuman Anna 8581d39f4d1SSuman Anna static const struct pru_private_data k3_tx_pru_data = { 8591d39f4d1SSuman Anna .type = PRU_TYPE_TX_PRU, 8601d39f4d1SSuman Anna .is_k3 = 1, 8611d39f4d1SSuman Anna }; 8621d39f4d1SSuman Anna 863d4ce2de7SSuman Anna static const struct of_device_id pru_rproc_match[] = { 8641d39f4d1SSuman Anna { .compatible = "ti,am3356-pru", .data = &pru_data }, 8651d39f4d1SSuman Anna { .compatible = "ti,am4376-pru", .data = &pru_data }, 8661d39f4d1SSuman Anna { .compatible = "ti,am5728-pru", .data = &pru_data }, 8671d39f4d1SSuman Anna { .compatible = "ti,k2g-pru", .data = &pru_data }, 8681d39f4d1SSuman Anna { .compatible = "ti,am654-pru", .data = &k3_pru_data }, 8691d39f4d1SSuman Anna { .compatible = "ti,am654-rtu", .data = &k3_rtu_data }, 8701d39f4d1SSuman Anna { .compatible = "ti,am654-tx-pru", .data = &k3_tx_pru_data }, 871b44786c9SSuman Anna { .compatible = "ti,j721e-pru", .data = &k3_pru_data }, 872b44786c9SSuman Anna { .compatible = "ti,j721e-rtu", .data = &k3_rtu_data }, 873b44786c9SSuman Anna { .compatible = "ti,j721e-tx-pru", .data = &k3_tx_pru_data }, 874d4ce2de7SSuman Anna {}, 875d4ce2de7SSuman Anna }; 876d4ce2de7SSuman Anna MODULE_DEVICE_TABLE(of, pru_rproc_match); 877d4ce2de7SSuman Anna 878d4ce2de7SSuman Anna static struct platform_driver pru_rproc_driver = { 879d4ce2de7SSuman Anna .driver = { 880d4ce2de7SSuman Anna .name = "pru-rproc", 881d4ce2de7SSuman Anna .of_match_table = pru_rproc_match, 882d4ce2de7SSuman Anna .suppress_bind_attrs = true, 883d4ce2de7SSuman Anna }, 884d4ce2de7SSuman Anna .probe = pru_rproc_probe, 885d4ce2de7SSuman Anna .remove = pru_rproc_remove, 886d4ce2de7SSuman Anna }; 887d4ce2de7SSuman Anna module_platform_driver(pru_rproc_driver); 888d4ce2de7SSuman Anna 889d4ce2de7SSuman Anna MODULE_AUTHOR("Suman Anna <s-anna@ti.com>"); 890d4ce2de7SSuman Anna MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 891d4ce2de7SSuman Anna MODULE_AUTHOR("Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>"); 892d4ce2de7SSuman Anna MODULE_DESCRIPTION("PRU-ICSS Remote Processor Driver"); 893d4ce2de7SSuman Anna MODULE_LICENSE("GPL v2"); 894