1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Copyright (c) 2019 MediaTek Inc. 4 5 #include <asm/barrier.h> 6 #include <linux/clk.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/err.h> 9 #include <linux/interrupt.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/of_address.h> 13 #include <linux/of_platform.h> 14 #include <linux/of_reserved_mem.h> 15 #include <linux/platform_device.h> 16 #include <linux/remoteproc.h> 17 #include <linux/remoteproc/mtk_scp.h> 18 #include <linux/rpmsg/mtk_rpmsg.h> 19 20 #include "mtk_common.h" 21 #include "remoteproc_internal.h" 22 23 #define MAX_CODE_SIZE 0x500000 24 #define SECTION_NAME_IPI_BUFFER ".ipi_buffer" 25 26 /** 27 * scp_get() - get a reference to SCP. 28 * 29 * @pdev: the platform device of the module requesting SCP platform 30 * device for using SCP API. 31 * 32 * Return: Return NULL if failed. otherwise reference to SCP. 33 **/ 34 struct mtk_scp *scp_get(struct platform_device *pdev) 35 { 36 struct device *dev = &pdev->dev; 37 struct device_node *scp_node; 38 struct platform_device *scp_pdev; 39 40 scp_node = of_parse_phandle(dev->of_node, "mediatek,scp", 0); 41 if (!scp_node) { 42 dev_err(dev, "can't get SCP node\n"); 43 return NULL; 44 } 45 46 scp_pdev = of_find_device_by_node(scp_node); 47 of_node_put(scp_node); 48 49 if (WARN_ON(!scp_pdev)) { 50 dev_err(dev, "SCP pdev failed\n"); 51 return NULL; 52 } 53 54 return platform_get_drvdata(scp_pdev); 55 } 56 EXPORT_SYMBOL_GPL(scp_get); 57 58 /** 59 * scp_put() - "free" the SCP 60 * 61 * @scp: mtk_scp structure from scp_get(). 62 **/ 63 void scp_put(struct mtk_scp *scp) 64 { 65 put_device(scp->dev); 66 } 67 EXPORT_SYMBOL_GPL(scp_put); 68 69 static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host) 70 { 71 dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host); 72 rproc_report_crash(scp->rproc, RPROC_WATCHDOG); 73 } 74 75 static void scp_init_ipi_handler(void *data, unsigned int len, void *priv) 76 { 77 struct mtk_scp *scp = (struct mtk_scp *)priv; 78 struct scp_run *run = (struct scp_run *)data; 79 80 scp->run.signaled = run->signaled; 81 strscpy(scp->run.fw_ver, run->fw_ver, SCP_FW_VER_LEN); 82 scp->run.dec_capability = run->dec_capability; 83 scp->run.enc_capability = run->enc_capability; 84 wake_up_interruptible(&scp->run.wq); 85 } 86 87 static void scp_ipi_handler(struct mtk_scp *scp) 88 { 89 struct mtk_share_obj __iomem *rcv_obj = scp->recv_buf; 90 struct scp_ipi_desc *ipi_desc = scp->ipi_desc; 91 u8 tmp_data[SCP_SHARE_BUFFER_SIZE]; 92 scp_ipi_handler_t handler; 93 u32 id = readl(&rcv_obj->id); 94 u32 len = readl(&rcv_obj->len); 95 96 if (len > SCP_SHARE_BUFFER_SIZE) { 97 dev_err(scp->dev, "ipi message too long (len %d, max %d)", len, 98 SCP_SHARE_BUFFER_SIZE); 99 return; 100 } 101 if (id >= SCP_IPI_MAX) { 102 dev_err(scp->dev, "No such ipi id = %d\n", id); 103 return; 104 } 105 106 scp_ipi_lock(scp, id); 107 handler = ipi_desc[id].handler; 108 if (!handler) { 109 dev_err(scp->dev, "No such ipi id = %d\n", id); 110 scp_ipi_unlock(scp, id); 111 return; 112 } 113 114 memcpy_fromio(tmp_data, &rcv_obj->share_buf, len); 115 handler(tmp_data, len, ipi_desc[id].priv); 116 scp_ipi_unlock(scp, id); 117 118 scp->ipi_id_ack[id] = true; 119 wake_up(&scp->ack_wq); 120 } 121 122 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp, 123 const struct firmware *fw, 124 size_t *offset); 125 126 static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw) 127 { 128 int ret; 129 size_t offset; 130 131 /* read the ipi buf addr from FW itself first */ 132 ret = scp_elf_read_ipi_buf_addr(scp, fw, &offset); 133 if (ret) { 134 /* use default ipi buf addr if the FW doesn't have it */ 135 offset = scp->data->ipi_buf_offset; 136 if (!offset) 137 return ret; 138 } 139 dev_info(scp->dev, "IPI buf addr %#010zx\n", offset); 140 141 scp->recv_buf = (struct mtk_share_obj __iomem *) 142 (scp->sram_base + offset); 143 scp->send_buf = (struct mtk_share_obj __iomem *) 144 (scp->sram_base + offset + sizeof(*scp->recv_buf)); 145 memset_io(scp->recv_buf, 0, sizeof(*scp->recv_buf)); 146 memset_io(scp->send_buf, 0, sizeof(*scp->send_buf)); 147 148 return 0; 149 } 150 151 static void mt8183_scp_reset_assert(struct mtk_scp *scp) 152 { 153 u32 val; 154 155 val = readl(scp->reg_base + MT8183_SW_RSTN); 156 val &= ~MT8183_SW_RSTN_BIT; 157 writel(val, scp->reg_base + MT8183_SW_RSTN); 158 } 159 160 static void mt8183_scp_reset_deassert(struct mtk_scp *scp) 161 { 162 u32 val; 163 164 val = readl(scp->reg_base + MT8183_SW_RSTN); 165 val |= MT8183_SW_RSTN_BIT; 166 writel(val, scp->reg_base + MT8183_SW_RSTN); 167 } 168 169 static void mt8192_scp_reset_assert(struct mtk_scp *scp) 170 { 171 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 172 } 173 174 static void mt8192_scp_reset_deassert(struct mtk_scp *scp) 175 { 176 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR); 177 } 178 179 static void mt8183_scp_irq_handler(struct mtk_scp *scp) 180 { 181 u32 scp_to_host; 182 183 scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST); 184 if (scp_to_host & MT8183_SCP_IPC_INT_BIT) 185 scp_ipi_handler(scp); 186 else 187 scp_wdt_handler(scp, scp_to_host); 188 189 /* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */ 190 writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT, 191 scp->reg_base + MT8183_SCP_TO_HOST); 192 } 193 194 static void mt8192_scp_irq_handler(struct mtk_scp *scp) 195 { 196 u32 scp_to_host; 197 198 scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); 199 200 if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { 201 scp_ipi_handler(scp); 202 203 /* 204 * SCP won't send another interrupt until we clear 205 * MT8192_SCP2APMCU_IPC. 206 */ 207 writel(MT8192_SCP_IPC_INT_BIT, 208 scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); 209 } else { 210 scp_wdt_handler(scp, scp_to_host); 211 writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); 212 } 213 } 214 215 static irqreturn_t scp_irq_handler(int irq, void *priv) 216 { 217 struct mtk_scp *scp = priv; 218 int ret; 219 220 ret = clk_prepare_enable(scp->clk); 221 if (ret) { 222 dev_err(scp->dev, "failed to enable clocks\n"); 223 return IRQ_NONE; 224 } 225 226 scp->data->scp_irq_handler(scp); 227 228 clk_disable_unprepare(scp->clk); 229 230 return IRQ_HANDLED; 231 } 232 233 static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw) 234 { 235 struct device *dev = &rproc->dev; 236 struct elf32_hdr *ehdr; 237 struct elf32_phdr *phdr; 238 int i, ret = 0; 239 const u8 *elf_data = fw->data; 240 241 ehdr = (struct elf32_hdr *)elf_data; 242 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff); 243 244 /* go through the available ELF segments */ 245 for (i = 0; i < ehdr->e_phnum; i++, phdr++) { 246 u32 da = phdr->p_paddr; 247 u32 memsz = phdr->p_memsz; 248 u32 filesz = phdr->p_filesz; 249 u32 offset = phdr->p_offset; 250 void __iomem *ptr; 251 252 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n", 253 phdr->p_type, da, memsz, filesz); 254 255 if (phdr->p_type != PT_LOAD) 256 continue; 257 if (!filesz) 258 continue; 259 260 if (filesz > memsz) { 261 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n", 262 filesz, memsz); 263 ret = -EINVAL; 264 break; 265 } 266 267 if (offset + filesz > fw->size) { 268 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n", 269 offset + filesz, fw->size); 270 ret = -EINVAL; 271 break; 272 } 273 274 /* grab the kernel address for this device address */ 275 ptr = (void __iomem *)rproc_da_to_va(rproc, da, memsz, NULL); 276 if (!ptr) { 277 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz); 278 ret = -EINVAL; 279 break; 280 } 281 282 /* put the segment where the remote processor expects it */ 283 scp_memcpy_aligned(ptr, elf_data + phdr->p_offset, filesz); 284 } 285 286 return ret; 287 } 288 289 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp, 290 const struct firmware *fw, 291 size_t *offset) 292 { 293 struct elf32_hdr *ehdr; 294 struct elf32_shdr *shdr, *shdr_strtab; 295 int i; 296 const u8 *elf_data = fw->data; 297 const char *strtab; 298 299 ehdr = (struct elf32_hdr *)elf_data; 300 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff); 301 shdr_strtab = shdr + ehdr->e_shstrndx; 302 strtab = (const char *)(elf_data + shdr_strtab->sh_offset); 303 304 for (i = 0; i < ehdr->e_shnum; i++, shdr++) { 305 if (strcmp(strtab + shdr->sh_name, 306 SECTION_NAME_IPI_BUFFER) == 0) { 307 *offset = shdr->sh_addr; 308 return 0; 309 } 310 } 311 312 return -ENOENT; 313 } 314 315 static int mt8183_scp_clk_get(struct mtk_scp *scp) 316 { 317 struct device *dev = scp->dev; 318 int ret = 0; 319 320 scp->clk = devm_clk_get(dev, "main"); 321 if (IS_ERR(scp->clk)) { 322 dev_err(dev, "Failed to get clock\n"); 323 ret = PTR_ERR(scp->clk); 324 } 325 326 return ret; 327 } 328 329 static int mt8192_scp_clk_get(struct mtk_scp *scp) 330 { 331 return mt8183_scp_clk_get(scp); 332 } 333 334 static int mt8195_scp_clk_get(struct mtk_scp *scp) 335 { 336 scp->clk = NULL; 337 338 return 0; 339 } 340 341 static int mt8183_scp_before_load(struct mtk_scp *scp) 342 { 343 /* Clear SCP to host interrupt */ 344 writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST); 345 346 /* Reset clocks before loading FW */ 347 writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL); 348 writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL); 349 350 /* Initialize TCM before loading FW. */ 351 writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD); 352 writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD); 353 354 /* Turn on the power of SCP's SRAM before using it. */ 355 writel(0x0, scp->reg_base + MT8183_SCP_SRAM_PDN); 356 357 /* 358 * Set I-cache and D-cache size before loading SCP FW. 359 * SCP SRAM logical address may change when cache size setting differs. 360 */ 361 writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB, 362 scp->reg_base + MT8183_SCP_CACHE_CON); 363 writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON); 364 365 return 0; 366 } 367 368 static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask) 369 { 370 int i; 371 372 for (i = 31; i >= 0; i--) 373 writel(GENMASK(i, 0) & ~reserved_mask, addr); 374 writel(0, addr); 375 } 376 377 static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask) 378 { 379 int i; 380 381 writel(0, addr); 382 for (i = 0; i < 32; i++) 383 writel(GENMASK(i, 0) & ~reserved_mask, addr); 384 } 385 386 static int mt8186_scp_before_load(struct mtk_scp *scp) 387 { 388 /* Clear SCP to host interrupt */ 389 writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST); 390 391 /* Reset clocks before loading FW */ 392 writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL); 393 writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL); 394 395 /* Turn on the power of SCP's SRAM before using it. Enable 1 block per time*/ 396 scp_sram_power_on(scp->reg_base + MT8183_SCP_SRAM_PDN, 0); 397 398 /* Initialize TCM before loading FW. */ 399 writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD); 400 writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD); 401 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1); 402 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2); 403 404 return 0; 405 } 406 407 static int mt8192_scp_before_load(struct mtk_scp *scp) 408 { 409 /* clear SPM interrupt, SCP2SPM_IPC_CLR */ 410 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); 411 412 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 413 414 /* enable SRAM clock */ 415 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 416 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 417 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 418 scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); 419 scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 420 421 /* enable MPU for all memory regions */ 422 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); 423 424 return 0; 425 } 426 427 static int mt8195_scp_before_load(struct mtk_scp *scp) 428 { 429 /* clear SPM interrupt, SCP2SPM_IPC_CLR */ 430 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); 431 432 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 433 434 /* enable SRAM clock */ 435 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 436 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 437 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 438 scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 439 MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS); 440 scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 441 442 /* enable MPU for all memory regions */ 443 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); 444 445 return 0; 446 } 447 448 static int scp_load(struct rproc *rproc, const struct firmware *fw) 449 { 450 struct mtk_scp *scp = rproc->priv; 451 struct device *dev = scp->dev; 452 int ret; 453 454 ret = clk_prepare_enable(scp->clk); 455 if (ret) { 456 dev_err(dev, "failed to enable clocks\n"); 457 return ret; 458 } 459 460 /* Hold SCP in reset while loading FW. */ 461 scp->data->scp_reset_assert(scp); 462 463 ret = scp->data->scp_before_load(scp); 464 if (ret < 0) 465 goto leave; 466 467 ret = scp_elf_load_segments(rproc, fw); 468 leave: 469 clk_disable_unprepare(scp->clk); 470 471 return ret; 472 } 473 474 static int scp_parse_fw(struct rproc *rproc, const struct firmware *fw) 475 { 476 struct mtk_scp *scp = rproc->priv; 477 struct device *dev = scp->dev; 478 int ret; 479 480 ret = clk_prepare_enable(scp->clk); 481 if (ret) { 482 dev_err(dev, "failed to enable clocks\n"); 483 return ret; 484 } 485 486 ret = scp_ipi_init(scp, fw); 487 clk_disable_unprepare(scp->clk); 488 return ret; 489 } 490 491 static int scp_start(struct rproc *rproc) 492 { 493 struct mtk_scp *scp = (struct mtk_scp *)rproc->priv; 494 struct device *dev = scp->dev; 495 struct scp_run *run = &scp->run; 496 int ret; 497 498 ret = clk_prepare_enable(scp->clk); 499 if (ret) { 500 dev_err(dev, "failed to enable clocks\n"); 501 return ret; 502 } 503 504 run->signaled = false; 505 506 scp->data->scp_reset_deassert(scp); 507 508 ret = wait_event_interruptible_timeout( 509 run->wq, 510 run->signaled, 511 msecs_to_jiffies(2000)); 512 513 if (ret == 0) { 514 dev_err(dev, "wait SCP initialization timeout!\n"); 515 ret = -ETIME; 516 goto stop; 517 } 518 if (ret == -ERESTARTSYS) { 519 dev_err(dev, "wait SCP interrupted by a signal!\n"); 520 goto stop; 521 } 522 523 clk_disable_unprepare(scp->clk); 524 dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver); 525 526 return 0; 527 528 stop: 529 scp->data->scp_reset_assert(scp); 530 clk_disable_unprepare(scp->clk); 531 return ret; 532 } 533 534 static void *mt8183_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len) 535 { 536 int offset; 537 538 if (da < scp->sram_size) { 539 offset = da; 540 if (offset >= 0 && (offset + len) <= scp->sram_size) 541 return (void __force *)scp->sram_base + offset; 542 } else if (scp->dram_size) { 543 offset = da - scp->dma_addr; 544 if (offset >= 0 && (offset + len) <= scp->dram_size) 545 return scp->cpu_addr + offset; 546 } 547 548 return NULL; 549 } 550 551 static void *mt8192_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len) 552 { 553 int offset; 554 555 if (da >= scp->sram_phys && 556 (da + len) <= scp->sram_phys + scp->sram_size) { 557 offset = da - scp->sram_phys; 558 return (void __force *)scp->sram_base + offset; 559 } 560 561 /* optional memory region */ 562 if (scp->l1tcm_size && 563 da >= scp->l1tcm_phys && 564 (da + len) <= scp->l1tcm_phys + scp->l1tcm_size) { 565 offset = da - scp->l1tcm_phys; 566 return (void __force *)scp->l1tcm_base + offset; 567 } 568 569 /* optional memory region */ 570 if (scp->dram_size && 571 da >= scp->dma_addr && 572 (da + len) <= scp->dma_addr + scp->dram_size) { 573 offset = da - scp->dma_addr; 574 return scp->cpu_addr + offset; 575 } 576 577 return NULL; 578 } 579 580 static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 581 { 582 struct mtk_scp *scp = (struct mtk_scp *)rproc->priv; 583 584 return scp->data->scp_da_to_va(scp, da, len); 585 } 586 587 static void mt8183_scp_stop(struct mtk_scp *scp) 588 { 589 /* Disable SCP watchdog */ 590 writel(0, scp->reg_base + MT8183_WDT_CFG); 591 } 592 593 static void mt8192_scp_stop(struct mtk_scp *scp) 594 { 595 /* Disable SRAM clock */ 596 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 597 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 598 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 599 scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); 600 scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 601 602 /* Disable SCP watchdog */ 603 writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); 604 } 605 606 static void mt8195_scp_stop(struct mtk_scp *scp) 607 { 608 /* Disable SRAM clock */ 609 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 610 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 611 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 612 scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 613 MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS); 614 scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 615 616 /* Disable SCP watchdog */ 617 writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); 618 } 619 620 static int scp_stop(struct rproc *rproc) 621 { 622 struct mtk_scp *scp = (struct mtk_scp *)rproc->priv; 623 int ret; 624 625 ret = clk_prepare_enable(scp->clk); 626 if (ret) { 627 dev_err(scp->dev, "failed to enable clocks\n"); 628 return ret; 629 } 630 631 scp->data->scp_reset_assert(scp); 632 scp->data->scp_stop(scp); 633 clk_disable_unprepare(scp->clk); 634 635 return 0; 636 } 637 638 static const struct rproc_ops scp_ops = { 639 .start = scp_start, 640 .stop = scp_stop, 641 .load = scp_load, 642 .da_to_va = scp_da_to_va, 643 .parse_fw = scp_parse_fw, 644 }; 645 646 /** 647 * scp_get_device() - get device struct of SCP 648 * 649 * @scp: mtk_scp structure 650 **/ 651 struct device *scp_get_device(struct mtk_scp *scp) 652 { 653 return scp->dev; 654 } 655 EXPORT_SYMBOL_GPL(scp_get_device); 656 657 /** 658 * scp_get_rproc() - get rproc struct of SCP 659 * 660 * @scp: mtk_scp structure 661 **/ 662 struct rproc *scp_get_rproc(struct mtk_scp *scp) 663 { 664 return scp->rproc; 665 } 666 EXPORT_SYMBOL_GPL(scp_get_rproc); 667 668 /** 669 * scp_get_vdec_hw_capa() - get video decoder hardware capability 670 * 671 * @scp: mtk_scp structure 672 * 673 * Return: video decoder hardware capability 674 **/ 675 unsigned int scp_get_vdec_hw_capa(struct mtk_scp *scp) 676 { 677 return scp->run.dec_capability; 678 } 679 EXPORT_SYMBOL_GPL(scp_get_vdec_hw_capa); 680 681 /** 682 * scp_get_venc_hw_capa() - get video encoder hardware capability 683 * 684 * @scp: mtk_scp structure 685 * 686 * Return: video encoder hardware capability 687 **/ 688 unsigned int scp_get_venc_hw_capa(struct mtk_scp *scp) 689 { 690 return scp->run.enc_capability; 691 } 692 EXPORT_SYMBOL_GPL(scp_get_venc_hw_capa); 693 694 /** 695 * scp_mapping_dm_addr() - Mapping SRAM/DRAM to kernel virtual address 696 * 697 * @scp: mtk_scp structure 698 * @mem_addr: SCP views memory address 699 * 700 * Mapping the SCP's SRAM address / 701 * DMEM (Data Extended Memory) memory address / 702 * Working buffer memory address to 703 * kernel virtual address. 704 * 705 * Return: Return ERR_PTR(-EINVAL) if mapping failed, 706 * otherwise the mapped kernel virtual address 707 **/ 708 void *scp_mapping_dm_addr(struct mtk_scp *scp, u32 mem_addr) 709 { 710 void *ptr; 711 712 ptr = scp_da_to_va(scp->rproc, mem_addr, 0, NULL); 713 if (!ptr) 714 return ERR_PTR(-EINVAL); 715 716 return ptr; 717 } 718 EXPORT_SYMBOL_GPL(scp_mapping_dm_addr); 719 720 static int scp_map_memory_region(struct mtk_scp *scp) 721 { 722 int ret; 723 724 ret = of_reserved_mem_device_init(scp->dev); 725 726 /* reserved memory is optional. */ 727 if (ret == -ENODEV) { 728 dev_info(scp->dev, "skipping reserved memory initialization."); 729 return 0; 730 } 731 732 if (ret) { 733 dev_err(scp->dev, "failed to assign memory-region: %d\n", ret); 734 return -ENOMEM; 735 } 736 737 /* Reserved SCP code size */ 738 scp->dram_size = MAX_CODE_SIZE; 739 scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size, 740 &scp->dma_addr, GFP_KERNEL); 741 if (!scp->cpu_addr) 742 return -ENOMEM; 743 744 return 0; 745 } 746 747 static void scp_unmap_memory_region(struct mtk_scp *scp) 748 { 749 if (scp->dram_size == 0) 750 return; 751 752 dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr, 753 scp->dma_addr); 754 of_reserved_mem_device_release(scp->dev); 755 } 756 757 static int scp_register_ipi(struct platform_device *pdev, u32 id, 758 ipi_handler_t handler, void *priv) 759 { 760 struct mtk_scp *scp = platform_get_drvdata(pdev); 761 762 return scp_ipi_register(scp, id, handler, priv); 763 } 764 765 static void scp_unregister_ipi(struct platform_device *pdev, u32 id) 766 { 767 struct mtk_scp *scp = platform_get_drvdata(pdev); 768 769 scp_ipi_unregister(scp, id); 770 } 771 772 static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf, 773 unsigned int len, unsigned int wait) 774 { 775 struct mtk_scp *scp = platform_get_drvdata(pdev); 776 777 return scp_ipi_send(scp, id, buf, len, wait); 778 } 779 780 static struct mtk_rpmsg_info mtk_scp_rpmsg_info = { 781 .send_ipi = scp_send_ipi, 782 .register_ipi = scp_register_ipi, 783 .unregister_ipi = scp_unregister_ipi, 784 .ns_ipi_id = SCP_IPI_NS_SERVICE, 785 }; 786 787 static void scp_add_rpmsg_subdev(struct mtk_scp *scp) 788 { 789 scp->rpmsg_subdev = 790 mtk_rpmsg_create_rproc_subdev(to_platform_device(scp->dev), 791 &mtk_scp_rpmsg_info); 792 if (scp->rpmsg_subdev) 793 rproc_add_subdev(scp->rproc, scp->rpmsg_subdev); 794 } 795 796 static void scp_remove_rpmsg_subdev(struct mtk_scp *scp) 797 { 798 if (scp->rpmsg_subdev) { 799 rproc_remove_subdev(scp->rproc, scp->rpmsg_subdev); 800 mtk_rpmsg_destroy_rproc_subdev(scp->rpmsg_subdev); 801 scp->rpmsg_subdev = NULL; 802 } 803 } 804 805 static int scp_probe(struct platform_device *pdev) 806 { 807 struct device *dev = &pdev->dev; 808 struct device_node *np = dev->of_node; 809 struct mtk_scp *scp; 810 struct rproc *rproc; 811 struct resource *res; 812 const char *fw_name = "scp.img"; 813 int ret, i; 814 815 ret = rproc_of_parse_firmware(dev, 0, &fw_name); 816 if (ret < 0 && ret != -EINVAL) 817 return ret; 818 819 rproc = devm_rproc_alloc(dev, np->name, &scp_ops, fw_name, sizeof(*scp)); 820 if (!rproc) 821 return dev_err_probe(dev, -ENOMEM, "unable to allocate remoteproc\n"); 822 823 scp = (struct mtk_scp *)rproc->priv; 824 scp->rproc = rproc; 825 scp->dev = dev; 826 scp->data = of_device_get_match_data(dev); 827 platform_set_drvdata(pdev, scp); 828 829 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); 830 scp->sram_base = devm_ioremap_resource(dev, res); 831 if (IS_ERR(scp->sram_base)) 832 return dev_err_probe(dev, PTR_ERR(scp->sram_base), 833 "Failed to parse and map sram memory\n"); 834 835 scp->sram_size = resource_size(res); 836 scp->sram_phys = res->start; 837 838 /* l1tcm is an optional memory region */ 839 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm"); 840 scp->l1tcm_base = devm_ioremap_resource(dev, res); 841 if (IS_ERR(scp->l1tcm_base)) { 842 ret = PTR_ERR(scp->l1tcm_base); 843 if (ret != -EINVAL) { 844 return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n"); 845 } 846 } else { 847 scp->l1tcm_size = resource_size(res); 848 scp->l1tcm_phys = res->start; 849 } 850 851 scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); 852 if (IS_ERR(scp->reg_base)) 853 return dev_err_probe(dev, PTR_ERR(scp->reg_base), 854 "Failed to parse and map cfg memory\n"); 855 856 ret = scp->data->scp_clk_get(scp); 857 if (ret) 858 return ret; 859 860 ret = scp_map_memory_region(scp); 861 if (ret) 862 return ret; 863 864 mutex_init(&scp->send_lock); 865 for (i = 0; i < SCP_IPI_MAX; i++) 866 mutex_init(&scp->ipi_desc[i].lock); 867 868 /* register SCP initialization IPI */ 869 ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp); 870 if (ret) { 871 dev_err(dev, "Failed to register IPI_SCP_INIT\n"); 872 goto release_dev_mem; 873 } 874 875 init_waitqueue_head(&scp->run.wq); 876 init_waitqueue_head(&scp->ack_wq); 877 878 scp_add_rpmsg_subdev(scp); 879 880 ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), NULL, 881 scp_irq_handler, IRQF_ONESHOT, 882 pdev->name, scp); 883 884 if (ret) { 885 dev_err(dev, "failed to request irq\n"); 886 goto remove_subdev; 887 } 888 889 ret = rproc_add(rproc); 890 if (ret) 891 goto remove_subdev; 892 893 return 0; 894 895 remove_subdev: 896 scp_remove_rpmsg_subdev(scp); 897 scp_ipi_unregister(scp, SCP_IPI_INIT); 898 release_dev_mem: 899 scp_unmap_memory_region(scp); 900 for (i = 0; i < SCP_IPI_MAX; i++) 901 mutex_destroy(&scp->ipi_desc[i].lock); 902 mutex_destroy(&scp->send_lock); 903 904 return ret; 905 } 906 907 static int scp_remove(struct platform_device *pdev) 908 { 909 struct mtk_scp *scp = platform_get_drvdata(pdev); 910 int i; 911 912 rproc_del(scp->rproc); 913 scp_remove_rpmsg_subdev(scp); 914 scp_ipi_unregister(scp, SCP_IPI_INIT); 915 scp_unmap_memory_region(scp); 916 for (i = 0; i < SCP_IPI_MAX; i++) 917 mutex_destroy(&scp->ipi_desc[i].lock); 918 mutex_destroy(&scp->send_lock); 919 920 return 0; 921 } 922 923 static const struct mtk_scp_of_data mt8183_of_data = { 924 .scp_clk_get = mt8183_scp_clk_get, 925 .scp_before_load = mt8183_scp_before_load, 926 .scp_irq_handler = mt8183_scp_irq_handler, 927 .scp_reset_assert = mt8183_scp_reset_assert, 928 .scp_reset_deassert = mt8183_scp_reset_deassert, 929 .scp_stop = mt8183_scp_stop, 930 .scp_da_to_va = mt8183_scp_da_to_va, 931 .host_to_scp_reg = MT8183_HOST_TO_SCP, 932 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT, 933 .ipi_buf_offset = 0x7bdb0, 934 }; 935 936 static const struct mtk_scp_of_data mt8186_of_data = { 937 .scp_clk_get = mt8195_scp_clk_get, 938 .scp_before_load = mt8186_scp_before_load, 939 .scp_irq_handler = mt8183_scp_irq_handler, 940 .scp_reset_assert = mt8183_scp_reset_assert, 941 .scp_reset_deassert = mt8183_scp_reset_deassert, 942 .scp_stop = mt8183_scp_stop, 943 .scp_da_to_va = mt8183_scp_da_to_va, 944 .host_to_scp_reg = MT8183_HOST_TO_SCP, 945 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT, 946 .ipi_buf_offset = 0x7bdb0, 947 }; 948 949 static const struct mtk_scp_of_data mt8192_of_data = { 950 .scp_clk_get = mt8192_scp_clk_get, 951 .scp_before_load = mt8192_scp_before_load, 952 .scp_irq_handler = mt8192_scp_irq_handler, 953 .scp_reset_assert = mt8192_scp_reset_assert, 954 .scp_reset_deassert = mt8192_scp_reset_deassert, 955 .scp_stop = mt8192_scp_stop, 956 .scp_da_to_va = mt8192_scp_da_to_va, 957 .host_to_scp_reg = MT8192_GIPC_IN_SET, 958 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, 959 }; 960 961 static const struct mtk_scp_of_data mt8195_of_data = { 962 .scp_clk_get = mt8195_scp_clk_get, 963 .scp_before_load = mt8195_scp_before_load, 964 .scp_irq_handler = mt8192_scp_irq_handler, 965 .scp_reset_assert = mt8192_scp_reset_assert, 966 .scp_reset_deassert = mt8192_scp_reset_deassert, 967 .scp_stop = mt8195_scp_stop, 968 .scp_da_to_va = mt8192_scp_da_to_va, 969 .host_to_scp_reg = MT8192_GIPC_IN_SET, 970 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, 971 }; 972 973 static const struct of_device_id mtk_scp_of_match[] = { 974 { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, 975 { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data }, 976 { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data }, 977 { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data }, 978 {}, 979 }; 980 MODULE_DEVICE_TABLE(of, mtk_scp_of_match); 981 982 static struct platform_driver mtk_scp_driver = { 983 .probe = scp_probe, 984 .remove = scp_remove, 985 .driver = { 986 .name = "mtk-scp", 987 .of_match_table = mtk_scp_of_match, 988 }, 989 }; 990 991 module_platform_driver(mtk_scp_driver); 992 993 MODULE_LICENSE("GPL v2"); 994 MODULE_DESCRIPTION("MediaTek SCP control driver"); 995