1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Copyright (c) 2019 MediaTek Inc. 4 5 #include <asm/barrier.h> 6 #include <linux/clk.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/err.h> 9 #include <linux/interrupt.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/of_address.h> 13 #include <linux/of_platform.h> 14 #include <linux/of_reserved_mem.h> 15 #include <linux/platform_device.h> 16 #include <linux/remoteproc.h> 17 #include <linux/remoteproc/mtk_scp.h> 18 #include <linux/rpmsg/mtk_rpmsg.h> 19 20 #include "mtk_common.h" 21 #include "remoteproc_internal.h" 22 23 #define MAX_CODE_SIZE 0x500000 24 #define SECTION_NAME_IPI_BUFFER ".ipi_buffer" 25 26 /** 27 * scp_get() - get a reference to SCP. 28 * 29 * @pdev: the platform device of the module requesting SCP platform 30 * device for using SCP API. 31 * 32 * Return: Return NULL if failed. otherwise reference to SCP. 33 **/ 34 struct mtk_scp *scp_get(struct platform_device *pdev) 35 { 36 struct device *dev = &pdev->dev; 37 struct device_node *scp_node; 38 struct platform_device *scp_pdev; 39 40 scp_node = of_parse_phandle(dev->of_node, "mediatek,scp", 0); 41 if (!scp_node) { 42 dev_err(dev, "can't get SCP node\n"); 43 return NULL; 44 } 45 46 scp_pdev = of_find_device_by_node(scp_node); 47 of_node_put(scp_node); 48 49 if (WARN_ON(!scp_pdev)) { 50 dev_err(dev, "SCP pdev failed\n"); 51 return NULL; 52 } 53 54 return platform_get_drvdata(scp_pdev); 55 } 56 EXPORT_SYMBOL_GPL(scp_get); 57 58 /** 59 * scp_put() - "free" the SCP 60 * 61 * @scp: mtk_scp structure from scp_get(). 62 **/ 63 void scp_put(struct mtk_scp *scp) 64 { 65 put_device(scp->dev); 66 } 67 EXPORT_SYMBOL_GPL(scp_put); 68 69 static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host) 70 { 71 dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host); 72 rproc_report_crash(scp->rproc, RPROC_WATCHDOG); 73 } 74 75 static void scp_init_ipi_handler(void *data, unsigned int len, void *priv) 76 { 77 struct mtk_scp *scp = priv; 78 struct scp_run *run = data; 79 80 scp->run.signaled = run->signaled; 81 strscpy(scp->run.fw_ver, run->fw_ver, SCP_FW_VER_LEN); 82 scp->run.dec_capability = run->dec_capability; 83 scp->run.enc_capability = run->enc_capability; 84 wake_up_interruptible(&scp->run.wq); 85 } 86 87 static void scp_ipi_handler(struct mtk_scp *scp) 88 { 89 struct mtk_share_obj __iomem *rcv_obj = scp->recv_buf; 90 struct scp_ipi_desc *ipi_desc = scp->ipi_desc; 91 u8 tmp_data[SCP_SHARE_BUFFER_SIZE]; 92 scp_ipi_handler_t handler; 93 u32 id = readl(&rcv_obj->id); 94 u32 len = readl(&rcv_obj->len); 95 96 if (len > SCP_SHARE_BUFFER_SIZE) { 97 dev_err(scp->dev, "ipi message too long (len %d, max %d)", len, 98 SCP_SHARE_BUFFER_SIZE); 99 return; 100 } 101 if (id >= SCP_IPI_MAX) { 102 dev_err(scp->dev, "No such ipi id = %d\n", id); 103 return; 104 } 105 106 scp_ipi_lock(scp, id); 107 handler = ipi_desc[id].handler; 108 if (!handler) { 109 dev_err(scp->dev, "No such ipi id = %d\n", id); 110 scp_ipi_unlock(scp, id); 111 return; 112 } 113 114 memcpy_fromio(tmp_data, &rcv_obj->share_buf, len); 115 handler(tmp_data, len, ipi_desc[id].priv); 116 scp_ipi_unlock(scp, id); 117 118 scp->ipi_id_ack[id] = true; 119 wake_up(&scp->ack_wq); 120 } 121 122 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp, 123 const struct firmware *fw, 124 size_t *offset); 125 126 static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw) 127 { 128 int ret; 129 size_t offset; 130 131 /* read the ipi buf addr from FW itself first */ 132 ret = scp_elf_read_ipi_buf_addr(scp, fw, &offset); 133 if (ret) { 134 /* use default ipi buf addr if the FW doesn't have it */ 135 offset = scp->data->ipi_buf_offset; 136 if (!offset) 137 return ret; 138 } 139 dev_info(scp->dev, "IPI buf addr %#010zx\n", offset); 140 141 scp->recv_buf = (struct mtk_share_obj __iomem *) 142 (scp->sram_base + offset); 143 scp->send_buf = (struct mtk_share_obj __iomem *) 144 (scp->sram_base + offset + sizeof(*scp->recv_buf)); 145 memset_io(scp->recv_buf, 0, sizeof(*scp->recv_buf)); 146 memset_io(scp->send_buf, 0, sizeof(*scp->send_buf)); 147 148 return 0; 149 } 150 151 static void mt8183_scp_reset_assert(struct mtk_scp *scp) 152 { 153 u32 val; 154 155 val = readl(scp->reg_base + MT8183_SW_RSTN); 156 val &= ~MT8183_SW_RSTN_BIT; 157 writel(val, scp->reg_base + MT8183_SW_RSTN); 158 } 159 160 static void mt8183_scp_reset_deassert(struct mtk_scp *scp) 161 { 162 u32 val; 163 164 val = readl(scp->reg_base + MT8183_SW_RSTN); 165 val |= MT8183_SW_RSTN_BIT; 166 writel(val, scp->reg_base + MT8183_SW_RSTN); 167 } 168 169 static void mt8192_scp_reset_assert(struct mtk_scp *scp) 170 { 171 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 172 } 173 174 static void mt8192_scp_reset_deassert(struct mtk_scp *scp) 175 { 176 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR); 177 } 178 179 static void mt8183_scp_irq_handler(struct mtk_scp *scp) 180 { 181 u32 scp_to_host; 182 183 scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST); 184 if (scp_to_host & MT8183_SCP_IPC_INT_BIT) 185 scp_ipi_handler(scp); 186 else 187 scp_wdt_handler(scp, scp_to_host); 188 189 /* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */ 190 writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT, 191 scp->reg_base + MT8183_SCP_TO_HOST); 192 } 193 194 static void mt8192_scp_irq_handler(struct mtk_scp *scp) 195 { 196 u32 scp_to_host; 197 198 scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); 199 200 if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { 201 scp_ipi_handler(scp); 202 203 /* 204 * SCP won't send another interrupt until we clear 205 * MT8192_SCP2APMCU_IPC. 206 */ 207 writel(MT8192_SCP_IPC_INT_BIT, 208 scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); 209 } else { 210 scp_wdt_handler(scp, scp_to_host); 211 writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); 212 } 213 } 214 215 static irqreturn_t scp_irq_handler(int irq, void *priv) 216 { 217 struct mtk_scp *scp = priv; 218 int ret; 219 220 ret = clk_prepare_enable(scp->clk); 221 if (ret) { 222 dev_err(scp->dev, "failed to enable clocks\n"); 223 return IRQ_NONE; 224 } 225 226 scp->data->scp_irq_handler(scp); 227 228 clk_disable_unprepare(scp->clk); 229 230 return IRQ_HANDLED; 231 } 232 233 static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw) 234 { 235 struct device *dev = &rproc->dev; 236 struct elf32_hdr *ehdr; 237 struct elf32_phdr *phdr; 238 int i, ret = 0; 239 const u8 *elf_data = fw->data; 240 241 ehdr = (struct elf32_hdr *)elf_data; 242 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff); 243 244 /* go through the available ELF segments */ 245 for (i = 0; i < ehdr->e_phnum; i++, phdr++) { 246 u32 da = phdr->p_paddr; 247 u32 memsz = phdr->p_memsz; 248 u32 filesz = phdr->p_filesz; 249 u32 offset = phdr->p_offset; 250 void __iomem *ptr; 251 252 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n", 253 phdr->p_type, da, memsz, filesz); 254 255 if (phdr->p_type != PT_LOAD) 256 continue; 257 if (!filesz) 258 continue; 259 260 if (filesz > memsz) { 261 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n", 262 filesz, memsz); 263 ret = -EINVAL; 264 break; 265 } 266 267 if (offset + filesz > fw->size) { 268 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n", 269 offset + filesz, fw->size); 270 ret = -EINVAL; 271 break; 272 } 273 274 /* grab the kernel address for this device address */ 275 ptr = (void __iomem *)rproc_da_to_va(rproc, da, memsz, NULL); 276 if (!ptr) { 277 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz); 278 ret = -EINVAL; 279 break; 280 } 281 282 /* put the segment where the remote processor expects it */ 283 scp_memcpy_aligned(ptr, elf_data + phdr->p_offset, filesz); 284 } 285 286 return ret; 287 } 288 289 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp, 290 const struct firmware *fw, 291 size_t *offset) 292 { 293 struct elf32_hdr *ehdr; 294 struct elf32_shdr *shdr, *shdr_strtab; 295 int i; 296 const u8 *elf_data = fw->data; 297 const char *strtab; 298 299 ehdr = (struct elf32_hdr *)elf_data; 300 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff); 301 shdr_strtab = shdr + ehdr->e_shstrndx; 302 strtab = (const char *)(elf_data + shdr_strtab->sh_offset); 303 304 for (i = 0; i < ehdr->e_shnum; i++, shdr++) { 305 if (strcmp(strtab + shdr->sh_name, 306 SECTION_NAME_IPI_BUFFER) == 0) { 307 *offset = shdr->sh_addr; 308 return 0; 309 } 310 } 311 312 return -ENOENT; 313 } 314 315 static int mt8183_scp_clk_get(struct mtk_scp *scp) 316 { 317 struct device *dev = scp->dev; 318 int ret = 0; 319 320 scp->clk = devm_clk_get(dev, "main"); 321 if (IS_ERR(scp->clk)) { 322 dev_err(dev, "Failed to get clock\n"); 323 ret = PTR_ERR(scp->clk); 324 } 325 326 return ret; 327 } 328 329 static int mt8192_scp_clk_get(struct mtk_scp *scp) 330 { 331 return mt8183_scp_clk_get(scp); 332 } 333 334 static int mt8195_scp_clk_get(struct mtk_scp *scp) 335 { 336 scp->clk = NULL; 337 338 return 0; 339 } 340 341 static int mt8183_scp_before_load(struct mtk_scp *scp) 342 { 343 /* Clear SCP to host interrupt */ 344 writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST); 345 346 /* Reset clocks before loading FW */ 347 writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL); 348 writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL); 349 350 /* Initialize TCM before loading FW. */ 351 writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD); 352 writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD); 353 354 /* Turn on the power of SCP's SRAM before using it. */ 355 writel(0x0, scp->reg_base + MT8183_SCP_SRAM_PDN); 356 357 /* 358 * Set I-cache and D-cache size before loading SCP FW. 359 * SCP SRAM logical address may change when cache size setting differs. 360 */ 361 writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB, 362 scp->reg_base + MT8183_SCP_CACHE_CON); 363 writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON); 364 365 return 0; 366 } 367 368 static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask) 369 { 370 int i; 371 372 for (i = 31; i >= 0; i--) 373 writel(GENMASK(i, 0) & ~reserved_mask, addr); 374 writel(0, addr); 375 } 376 377 static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask) 378 { 379 int i; 380 381 writel(0, addr); 382 for (i = 0; i < 32; i++) 383 writel(GENMASK(i, 0) & ~reserved_mask, addr); 384 } 385 386 static int mt8186_scp_before_load(struct mtk_scp *scp) 387 { 388 /* Clear SCP to host interrupt */ 389 writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST); 390 391 /* Reset clocks before loading FW */ 392 writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL); 393 writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL); 394 395 /* Turn on the power of SCP's SRAM before using it. Enable 1 block per time*/ 396 scp_sram_power_on(scp->reg_base + MT8183_SCP_SRAM_PDN, 0); 397 398 /* Initialize TCM before loading FW. */ 399 writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD); 400 writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD); 401 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1); 402 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2); 403 404 /* 405 * Set I-cache and D-cache size before loading SCP FW. 406 * SCP SRAM logical address may change when cache size setting differs. 407 */ 408 writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB, 409 scp->reg_base + MT8183_SCP_CACHE_CON); 410 writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON); 411 412 return 0; 413 } 414 415 static int mt8192_scp_before_load(struct mtk_scp *scp) 416 { 417 /* clear SPM interrupt, SCP2SPM_IPC_CLR */ 418 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); 419 420 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 421 422 /* enable SRAM clock */ 423 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 424 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 425 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 426 scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); 427 scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 428 429 /* enable MPU for all memory regions */ 430 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); 431 432 return 0; 433 } 434 435 static int mt8195_scp_before_load(struct mtk_scp *scp) 436 { 437 /* clear SPM interrupt, SCP2SPM_IPC_CLR */ 438 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); 439 440 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 441 442 /* enable SRAM clock */ 443 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 444 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 445 scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 446 scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 447 MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS); 448 scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 449 450 /* enable MPU for all memory regions */ 451 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); 452 453 return 0; 454 } 455 456 static int scp_load(struct rproc *rproc, const struct firmware *fw) 457 { 458 struct mtk_scp *scp = rproc->priv; 459 struct device *dev = scp->dev; 460 int ret; 461 462 ret = clk_prepare_enable(scp->clk); 463 if (ret) { 464 dev_err(dev, "failed to enable clocks\n"); 465 return ret; 466 } 467 468 /* Hold SCP in reset while loading FW. */ 469 scp->data->scp_reset_assert(scp); 470 471 ret = scp->data->scp_before_load(scp); 472 if (ret < 0) 473 goto leave; 474 475 ret = scp_elf_load_segments(rproc, fw); 476 leave: 477 clk_disable_unprepare(scp->clk); 478 479 return ret; 480 } 481 482 static int scp_parse_fw(struct rproc *rproc, const struct firmware *fw) 483 { 484 struct mtk_scp *scp = rproc->priv; 485 struct device *dev = scp->dev; 486 int ret; 487 488 ret = clk_prepare_enable(scp->clk); 489 if (ret) { 490 dev_err(dev, "failed to enable clocks\n"); 491 return ret; 492 } 493 494 ret = scp_ipi_init(scp, fw); 495 clk_disable_unprepare(scp->clk); 496 return ret; 497 } 498 499 static int scp_start(struct rproc *rproc) 500 { 501 struct mtk_scp *scp = rproc->priv; 502 struct device *dev = scp->dev; 503 struct scp_run *run = &scp->run; 504 int ret; 505 506 ret = clk_prepare_enable(scp->clk); 507 if (ret) { 508 dev_err(dev, "failed to enable clocks\n"); 509 return ret; 510 } 511 512 run->signaled = false; 513 514 scp->data->scp_reset_deassert(scp); 515 516 ret = wait_event_interruptible_timeout( 517 run->wq, 518 run->signaled, 519 msecs_to_jiffies(2000)); 520 521 if (ret == 0) { 522 dev_err(dev, "wait SCP initialization timeout!\n"); 523 ret = -ETIME; 524 goto stop; 525 } 526 if (ret == -ERESTARTSYS) { 527 dev_err(dev, "wait SCP interrupted by a signal!\n"); 528 goto stop; 529 } 530 531 clk_disable_unprepare(scp->clk); 532 dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver); 533 534 return 0; 535 536 stop: 537 scp->data->scp_reset_assert(scp); 538 clk_disable_unprepare(scp->clk); 539 return ret; 540 } 541 542 static void *mt8183_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len) 543 { 544 int offset; 545 546 if (da < scp->sram_size) { 547 offset = da; 548 if (offset >= 0 && (offset + len) <= scp->sram_size) 549 return (void __force *)scp->sram_base + offset; 550 } else if (scp->dram_size) { 551 offset = da - scp->dma_addr; 552 if (offset >= 0 && (offset + len) <= scp->dram_size) 553 return scp->cpu_addr + offset; 554 } 555 556 return NULL; 557 } 558 559 static void *mt8192_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len) 560 { 561 int offset; 562 563 if (da >= scp->sram_phys && 564 (da + len) <= scp->sram_phys + scp->sram_size) { 565 offset = da - scp->sram_phys; 566 return (void __force *)scp->sram_base + offset; 567 } 568 569 /* optional memory region */ 570 if (scp->l1tcm_size && 571 da >= scp->l1tcm_phys && 572 (da + len) <= scp->l1tcm_phys + scp->l1tcm_size) { 573 offset = da - scp->l1tcm_phys; 574 return (void __force *)scp->l1tcm_base + offset; 575 } 576 577 /* optional memory region */ 578 if (scp->dram_size && 579 da >= scp->dma_addr && 580 (da + len) <= scp->dma_addr + scp->dram_size) { 581 offset = da - scp->dma_addr; 582 return scp->cpu_addr + offset; 583 } 584 585 return NULL; 586 } 587 588 static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 589 { 590 struct mtk_scp *scp = rproc->priv; 591 592 return scp->data->scp_da_to_va(scp, da, len); 593 } 594 595 static void mt8183_scp_stop(struct mtk_scp *scp) 596 { 597 /* Disable SCP watchdog */ 598 writel(0, scp->reg_base + MT8183_WDT_CFG); 599 } 600 601 static void mt8192_scp_stop(struct mtk_scp *scp) 602 { 603 /* Disable SRAM clock */ 604 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 605 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 606 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 607 scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0); 608 scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 609 610 /* Disable SCP watchdog */ 611 writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); 612 } 613 614 static void mt8195_scp_stop(struct mtk_scp *scp) 615 { 616 /* Disable SRAM clock */ 617 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0); 618 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0); 619 scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0); 620 scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 621 MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS); 622 scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0); 623 624 /* Disable SCP watchdog */ 625 writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); 626 } 627 628 static int scp_stop(struct rproc *rproc) 629 { 630 struct mtk_scp *scp = rproc->priv; 631 int ret; 632 633 ret = clk_prepare_enable(scp->clk); 634 if (ret) { 635 dev_err(scp->dev, "failed to enable clocks\n"); 636 return ret; 637 } 638 639 scp->data->scp_reset_assert(scp); 640 scp->data->scp_stop(scp); 641 clk_disable_unprepare(scp->clk); 642 643 return 0; 644 } 645 646 static const struct rproc_ops scp_ops = { 647 .start = scp_start, 648 .stop = scp_stop, 649 .load = scp_load, 650 .da_to_va = scp_da_to_va, 651 .parse_fw = scp_parse_fw, 652 .sanity_check = rproc_elf_sanity_check, 653 }; 654 655 /** 656 * scp_get_device() - get device struct of SCP 657 * 658 * @scp: mtk_scp structure 659 **/ 660 struct device *scp_get_device(struct mtk_scp *scp) 661 { 662 return scp->dev; 663 } 664 EXPORT_SYMBOL_GPL(scp_get_device); 665 666 /** 667 * scp_get_rproc() - get rproc struct of SCP 668 * 669 * @scp: mtk_scp structure 670 **/ 671 struct rproc *scp_get_rproc(struct mtk_scp *scp) 672 { 673 return scp->rproc; 674 } 675 EXPORT_SYMBOL_GPL(scp_get_rproc); 676 677 /** 678 * scp_get_vdec_hw_capa() - get video decoder hardware capability 679 * 680 * @scp: mtk_scp structure 681 * 682 * Return: video decoder hardware capability 683 **/ 684 unsigned int scp_get_vdec_hw_capa(struct mtk_scp *scp) 685 { 686 return scp->run.dec_capability; 687 } 688 EXPORT_SYMBOL_GPL(scp_get_vdec_hw_capa); 689 690 /** 691 * scp_get_venc_hw_capa() - get video encoder hardware capability 692 * 693 * @scp: mtk_scp structure 694 * 695 * Return: video encoder hardware capability 696 **/ 697 unsigned int scp_get_venc_hw_capa(struct mtk_scp *scp) 698 { 699 return scp->run.enc_capability; 700 } 701 EXPORT_SYMBOL_GPL(scp_get_venc_hw_capa); 702 703 /** 704 * scp_mapping_dm_addr() - Mapping SRAM/DRAM to kernel virtual address 705 * 706 * @scp: mtk_scp structure 707 * @mem_addr: SCP views memory address 708 * 709 * Mapping the SCP's SRAM address / 710 * DMEM (Data Extended Memory) memory address / 711 * Working buffer memory address to 712 * kernel virtual address. 713 * 714 * Return: Return ERR_PTR(-EINVAL) if mapping failed, 715 * otherwise the mapped kernel virtual address 716 **/ 717 void *scp_mapping_dm_addr(struct mtk_scp *scp, u32 mem_addr) 718 { 719 void *ptr; 720 721 ptr = scp_da_to_va(scp->rproc, mem_addr, 0, NULL); 722 if (!ptr) 723 return ERR_PTR(-EINVAL); 724 725 return ptr; 726 } 727 EXPORT_SYMBOL_GPL(scp_mapping_dm_addr); 728 729 static int scp_map_memory_region(struct mtk_scp *scp) 730 { 731 int ret; 732 733 ret = of_reserved_mem_device_init(scp->dev); 734 735 /* reserved memory is optional. */ 736 if (ret == -ENODEV) { 737 dev_info(scp->dev, "skipping reserved memory initialization."); 738 return 0; 739 } 740 741 if (ret) { 742 dev_err(scp->dev, "failed to assign memory-region: %d\n", ret); 743 return -ENOMEM; 744 } 745 746 /* Reserved SCP code size */ 747 scp->dram_size = MAX_CODE_SIZE; 748 scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size, 749 &scp->dma_addr, GFP_KERNEL); 750 if (!scp->cpu_addr) 751 return -ENOMEM; 752 753 return 0; 754 } 755 756 static void scp_unmap_memory_region(struct mtk_scp *scp) 757 { 758 if (scp->dram_size == 0) 759 return; 760 761 dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr, 762 scp->dma_addr); 763 of_reserved_mem_device_release(scp->dev); 764 } 765 766 static int scp_register_ipi(struct platform_device *pdev, u32 id, 767 ipi_handler_t handler, void *priv) 768 { 769 struct mtk_scp *scp = platform_get_drvdata(pdev); 770 771 return scp_ipi_register(scp, id, handler, priv); 772 } 773 774 static void scp_unregister_ipi(struct platform_device *pdev, u32 id) 775 { 776 struct mtk_scp *scp = platform_get_drvdata(pdev); 777 778 scp_ipi_unregister(scp, id); 779 } 780 781 static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf, 782 unsigned int len, unsigned int wait) 783 { 784 struct mtk_scp *scp = platform_get_drvdata(pdev); 785 786 return scp_ipi_send(scp, id, buf, len, wait); 787 } 788 789 static struct mtk_rpmsg_info mtk_scp_rpmsg_info = { 790 .send_ipi = scp_send_ipi, 791 .register_ipi = scp_register_ipi, 792 .unregister_ipi = scp_unregister_ipi, 793 .ns_ipi_id = SCP_IPI_NS_SERVICE, 794 }; 795 796 static void scp_add_rpmsg_subdev(struct mtk_scp *scp) 797 { 798 scp->rpmsg_subdev = 799 mtk_rpmsg_create_rproc_subdev(to_platform_device(scp->dev), 800 &mtk_scp_rpmsg_info); 801 if (scp->rpmsg_subdev) 802 rproc_add_subdev(scp->rproc, scp->rpmsg_subdev); 803 } 804 805 static void scp_remove_rpmsg_subdev(struct mtk_scp *scp) 806 { 807 if (scp->rpmsg_subdev) { 808 rproc_remove_subdev(scp->rproc, scp->rpmsg_subdev); 809 mtk_rpmsg_destroy_rproc_subdev(scp->rpmsg_subdev); 810 scp->rpmsg_subdev = NULL; 811 } 812 } 813 814 static int scp_probe(struct platform_device *pdev) 815 { 816 struct device *dev = &pdev->dev; 817 struct device_node *np = dev->of_node; 818 struct mtk_scp *scp; 819 struct rproc *rproc; 820 struct resource *res; 821 const char *fw_name = "scp.img"; 822 int ret, i; 823 824 ret = rproc_of_parse_firmware(dev, 0, &fw_name); 825 if (ret < 0 && ret != -EINVAL) 826 return ret; 827 828 rproc = devm_rproc_alloc(dev, np->name, &scp_ops, fw_name, sizeof(*scp)); 829 if (!rproc) 830 return dev_err_probe(dev, -ENOMEM, "unable to allocate remoteproc\n"); 831 832 scp = rproc->priv; 833 scp->rproc = rproc; 834 scp->dev = dev; 835 scp->data = of_device_get_match_data(dev); 836 platform_set_drvdata(pdev, scp); 837 838 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); 839 scp->sram_base = devm_ioremap_resource(dev, res); 840 if (IS_ERR(scp->sram_base)) 841 return dev_err_probe(dev, PTR_ERR(scp->sram_base), 842 "Failed to parse and map sram memory\n"); 843 844 scp->sram_size = resource_size(res); 845 scp->sram_phys = res->start; 846 847 /* l1tcm is an optional memory region */ 848 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm"); 849 scp->l1tcm_base = devm_ioremap_resource(dev, res); 850 if (IS_ERR(scp->l1tcm_base)) { 851 ret = PTR_ERR(scp->l1tcm_base); 852 if (ret != -EINVAL) { 853 return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n"); 854 } 855 } else { 856 scp->l1tcm_size = resource_size(res); 857 scp->l1tcm_phys = res->start; 858 } 859 860 scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); 861 if (IS_ERR(scp->reg_base)) 862 return dev_err_probe(dev, PTR_ERR(scp->reg_base), 863 "Failed to parse and map cfg memory\n"); 864 865 ret = scp->data->scp_clk_get(scp); 866 if (ret) 867 return ret; 868 869 ret = scp_map_memory_region(scp); 870 if (ret) 871 return ret; 872 873 mutex_init(&scp->send_lock); 874 for (i = 0; i < SCP_IPI_MAX; i++) 875 mutex_init(&scp->ipi_desc[i].lock); 876 877 /* register SCP initialization IPI */ 878 ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp); 879 if (ret) { 880 dev_err(dev, "Failed to register IPI_SCP_INIT\n"); 881 goto release_dev_mem; 882 } 883 884 init_waitqueue_head(&scp->run.wq); 885 init_waitqueue_head(&scp->ack_wq); 886 887 scp_add_rpmsg_subdev(scp); 888 889 ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), NULL, 890 scp_irq_handler, IRQF_ONESHOT, 891 pdev->name, scp); 892 893 if (ret) { 894 dev_err(dev, "failed to request irq\n"); 895 goto remove_subdev; 896 } 897 898 ret = rproc_add(rproc); 899 if (ret) 900 goto remove_subdev; 901 902 return 0; 903 904 remove_subdev: 905 scp_remove_rpmsg_subdev(scp); 906 scp_ipi_unregister(scp, SCP_IPI_INIT); 907 release_dev_mem: 908 scp_unmap_memory_region(scp); 909 for (i = 0; i < SCP_IPI_MAX; i++) 910 mutex_destroy(&scp->ipi_desc[i].lock); 911 mutex_destroy(&scp->send_lock); 912 913 return ret; 914 } 915 916 static int scp_remove(struct platform_device *pdev) 917 { 918 struct mtk_scp *scp = platform_get_drvdata(pdev); 919 int i; 920 921 rproc_del(scp->rproc); 922 scp_remove_rpmsg_subdev(scp); 923 scp_ipi_unregister(scp, SCP_IPI_INIT); 924 scp_unmap_memory_region(scp); 925 for (i = 0; i < SCP_IPI_MAX; i++) 926 mutex_destroy(&scp->ipi_desc[i].lock); 927 mutex_destroy(&scp->send_lock); 928 929 return 0; 930 } 931 932 static const struct mtk_scp_of_data mt8183_of_data = { 933 .scp_clk_get = mt8183_scp_clk_get, 934 .scp_before_load = mt8183_scp_before_load, 935 .scp_irq_handler = mt8183_scp_irq_handler, 936 .scp_reset_assert = mt8183_scp_reset_assert, 937 .scp_reset_deassert = mt8183_scp_reset_deassert, 938 .scp_stop = mt8183_scp_stop, 939 .scp_da_to_va = mt8183_scp_da_to_va, 940 .host_to_scp_reg = MT8183_HOST_TO_SCP, 941 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT, 942 .ipi_buf_offset = 0x7bdb0, 943 }; 944 945 static const struct mtk_scp_of_data mt8186_of_data = { 946 .scp_clk_get = mt8195_scp_clk_get, 947 .scp_before_load = mt8186_scp_before_load, 948 .scp_irq_handler = mt8183_scp_irq_handler, 949 .scp_reset_assert = mt8183_scp_reset_assert, 950 .scp_reset_deassert = mt8183_scp_reset_deassert, 951 .scp_stop = mt8183_scp_stop, 952 .scp_da_to_va = mt8183_scp_da_to_va, 953 .host_to_scp_reg = MT8183_HOST_TO_SCP, 954 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT, 955 .ipi_buf_offset = 0x3bdb0, 956 }; 957 958 static const struct mtk_scp_of_data mt8188_of_data = { 959 .scp_clk_get = mt8195_scp_clk_get, 960 .scp_before_load = mt8192_scp_before_load, 961 .scp_irq_handler = mt8192_scp_irq_handler, 962 .scp_reset_assert = mt8192_scp_reset_assert, 963 .scp_reset_deassert = mt8192_scp_reset_deassert, 964 .scp_stop = mt8192_scp_stop, 965 .scp_da_to_va = mt8192_scp_da_to_va, 966 .host_to_scp_reg = MT8192_GIPC_IN_SET, 967 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, 968 }; 969 970 static const struct mtk_scp_of_data mt8192_of_data = { 971 .scp_clk_get = mt8192_scp_clk_get, 972 .scp_before_load = mt8192_scp_before_load, 973 .scp_irq_handler = mt8192_scp_irq_handler, 974 .scp_reset_assert = mt8192_scp_reset_assert, 975 .scp_reset_deassert = mt8192_scp_reset_deassert, 976 .scp_stop = mt8192_scp_stop, 977 .scp_da_to_va = mt8192_scp_da_to_va, 978 .host_to_scp_reg = MT8192_GIPC_IN_SET, 979 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, 980 }; 981 982 static const struct mtk_scp_of_data mt8195_of_data = { 983 .scp_clk_get = mt8195_scp_clk_get, 984 .scp_before_load = mt8195_scp_before_load, 985 .scp_irq_handler = mt8192_scp_irq_handler, 986 .scp_reset_assert = mt8192_scp_reset_assert, 987 .scp_reset_deassert = mt8192_scp_reset_deassert, 988 .scp_stop = mt8195_scp_stop, 989 .scp_da_to_va = mt8192_scp_da_to_va, 990 .host_to_scp_reg = MT8192_GIPC_IN_SET, 991 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, 992 }; 993 994 static const struct of_device_id mtk_scp_of_match[] = { 995 { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, 996 { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data }, 997 { .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data }, 998 { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data }, 999 { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data }, 1000 {}, 1001 }; 1002 MODULE_DEVICE_TABLE(of, mtk_scp_of_match); 1003 1004 static struct platform_driver mtk_scp_driver = { 1005 .probe = scp_probe, 1006 .remove = scp_remove, 1007 .driver = { 1008 .name = "mtk-scp", 1009 .of_match_table = mtk_scp_of_match, 1010 }, 1011 }; 1012 1013 module_platform_driver(mtk_scp_driver); 1014 1015 MODULE_LICENSE("GPL v2"); 1016 MODULE_DESCRIPTION("MediaTek SCP control driver"); 1017