1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Copyright (c) 2019 MediaTek Inc. 4 5 #include <asm/barrier.h> 6 #include <linux/clk.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/err.h> 9 #include <linux/interrupt.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/of_address.h> 13 #include <linux/of_platform.h> 14 #include <linux/of_reserved_mem.h> 15 #include <linux/platform_device.h> 16 #include <linux/remoteproc.h> 17 #include <linux/remoteproc/mtk_scp.h> 18 #include <linux/rpmsg/mtk_rpmsg.h> 19 20 #include "mtk_common.h" 21 #include "remoteproc_internal.h" 22 23 #define MAX_CODE_SIZE 0x500000 24 #define SECTION_NAME_IPI_BUFFER ".ipi_buffer" 25 26 /** 27 * scp_get() - get a reference to SCP. 28 * 29 * @pdev: the platform device of the module requesting SCP platform 30 * device for using SCP API. 31 * 32 * Return: Return NULL if failed. otherwise reference to SCP. 33 **/ 34 struct mtk_scp *scp_get(struct platform_device *pdev) 35 { 36 struct device *dev = &pdev->dev; 37 struct device_node *scp_node; 38 struct platform_device *scp_pdev; 39 40 scp_node = of_parse_phandle(dev->of_node, "mediatek,scp", 0); 41 if (!scp_node) { 42 dev_err(dev, "can't get SCP node\n"); 43 return NULL; 44 } 45 46 scp_pdev = of_find_device_by_node(scp_node); 47 of_node_put(scp_node); 48 49 if (WARN_ON(!scp_pdev)) { 50 dev_err(dev, "SCP pdev failed\n"); 51 return NULL; 52 } 53 54 return platform_get_drvdata(scp_pdev); 55 } 56 EXPORT_SYMBOL_GPL(scp_get); 57 58 /** 59 * scp_put() - "free" the SCP 60 * 61 * @scp: mtk_scp structure from scp_get(). 62 **/ 63 void scp_put(struct mtk_scp *scp) 64 { 65 put_device(scp->dev); 66 } 67 EXPORT_SYMBOL_GPL(scp_put); 68 69 static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host) 70 { 71 dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host); 72 rproc_report_crash(scp->rproc, RPROC_WATCHDOG); 73 } 74 75 static void scp_init_ipi_handler(void *data, unsigned int len, void *priv) 76 { 77 struct mtk_scp *scp = (struct mtk_scp *)priv; 78 struct scp_run *run = (struct scp_run *)data; 79 80 scp->run.signaled = run->signaled; 81 strscpy(scp->run.fw_ver, run->fw_ver, SCP_FW_VER_LEN); 82 scp->run.dec_capability = run->dec_capability; 83 scp->run.enc_capability = run->enc_capability; 84 wake_up_interruptible(&scp->run.wq); 85 } 86 87 static void scp_ipi_handler(struct mtk_scp *scp) 88 { 89 struct mtk_share_obj __iomem *rcv_obj = scp->recv_buf; 90 struct scp_ipi_desc *ipi_desc = scp->ipi_desc; 91 u8 tmp_data[SCP_SHARE_BUFFER_SIZE]; 92 scp_ipi_handler_t handler; 93 u32 id = readl(&rcv_obj->id); 94 u32 len = readl(&rcv_obj->len); 95 96 if (len > SCP_SHARE_BUFFER_SIZE) { 97 dev_err(scp->dev, "ipi message too long (len %d, max %d)", len, 98 SCP_SHARE_BUFFER_SIZE); 99 return; 100 } 101 if (id >= SCP_IPI_MAX) { 102 dev_err(scp->dev, "No such ipi id = %d\n", id); 103 return; 104 } 105 106 scp_ipi_lock(scp, id); 107 handler = ipi_desc[id].handler; 108 if (!handler) { 109 dev_err(scp->dev, "No such ipi id = %d\n", id); 110 scp_ipi_unlock(scp, id); 111 return; 112 } 113 114 memcpy_fromio(tmp_data, &rcv_obj->share_buf, len); 115 handler(tmp_data, len, ipi_desc[id].priv); 116 scp_ipi_unlock(scp, id); 117 118 scp->ipi_id_ack[id] = true; 119 wake_up(&scp->ack_wq); 120 } 121 122 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp, 123 const struct firmware *fw, 124 size_t *offset); 125 126 static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw) 127 { 128 int ret; 129 size_t offset; 130 131 /* read the ipi buf addr from FW itself first */ 132 ret = scp_elf_read_ipi_buf_addr(scp, fw, &offset); 133 if (ret) { 134 /* use default ipi buf addr if the FW doesn't have it */ 135 offset = scp->data->ipi_buf_offset; 136 if (!offset) 137 return ret; 138 } 139 dev_info(scp->dev, "IPI buf addr %#010zx\n", offset); 140 141 scp->recv_buf = (struct mtk_share_obj __iomem *) 142 (scp->sram_base + offset); 143 scp->send_buf = (struct mtk_share_obj __iomem *) 144 (scp->sram_base + offset + sizeof(*scp->recv_buf)); 145 memset_io(scp->recv_buf, 0, sizeof(*scp->recv_buf)); 146 memset_io(scp->send_buf, 0, sizeof(*scp->send_buf)); 147 148 return 0; 149 } 150 151 static void mt8183_scp_reset_assert(struct mtk_scp *scp) 152 { 153 u32 val; 154 155 val = readl(scp->reg_base + MT8183_SW_RSTN); 156 val &= ~MT8183_SW_RSTN_BIT; 157 writel(val, scp->reg_base + MT8183_SW_RSTN); 158 } 159 160 static void mt8183_scp_reset_deassert(struct mtk_scp *scp) 161 { 162 u32 val; 163 164 val = readl(scp->reg_base + MT8183_SW_RSTN); 165 val |= MT8183_SW_RSTN_BIT; 166 writel(val, scp->reg_base + MT8183_SW_RSTN); 167 } 168 169 static void mt8192_scp_reset_assert(struct mtk_scp *scp) 170 { 171 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 172 } 173 174 static void mt8192_scp_reset_deassert(struct mtk_scp *scp) 175 { 176 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR); 177 } 178 179 static void mt8183_scp_irq_handler(struct mtk_scp *scp) 180 { 181 u32 scp_to_host; 182 183 scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST); 184 if (scp_to_host & MT8183_SCP_IPC_INT_BIT) 185 scp_ipi_handler(scp); 186 else 187 scp_wdt_handler(scp, scp_to_host); 188 189 /* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */ 190 writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT, 191 scp->reg_base + MT8183_SCP_TO_HOST); 192 } 193 194 static void mt8192_scp_irq_handler(struct mtk_scp *scp) 195 { 196 u32 scp_to_host; 197 198 scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); 199 200 if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { 201 scp_ipi_handler(scp); 202 203 /* 204 * SCP won't send another interrupt until we clear 205 * MT8192_SCP2APMCU_IPC. 206 */ 207 writel(MT8192_SCP_IPC_INT_BIT, 208 scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); 209 } else { 210 scp_wdt_handler(scp, scp_to_host); 211 writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); 212 } 213 } 214 215 static irqreturn_t scp_irq_handler(int irq, void *priv) 216 { 217 struct mtk_scp *scp = priv; 218 int ret; 219 220 ret = clk_prepare_enable(scp->clk); 221 if (ret) { 222 dev_err(scp->dev, "failed to enable clocks\n"); 223 return IRQ_NONE; 224 } 225 226 scp->data->scp_irq_handler(scp); 227 228 clk_disable_unprepare(scp->clk); 229 230 return IRQ_HANDLED; 231 } 232 233 static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw) 234 { 235 struct device *dev = &rproc->dev; 236 struct elf32_hdr *ehdr; 237 struct elf32_phdr *phdr; 238 int i, ret = 0; 239 const u8 *elf_data = fw->data; 240 241 ehdr = (struct elf32_hdr *)elf_data; 242 phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff); 243 244 /* go through the available ELF segments */ 245 for (i = 0; i < ehdr->e_phnum; i++, phdr++) { 246 u32 da = phdr->p_paddr; 247 u32 memsz = phdr->p_memsz; 248 u32 filesz = phdr->p_filesz; 249 u32 offset = phdr->p_offset; 250 void __iomem *ptr; 251 252 dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n", 253 phdr->p_type, da, memsz, filesz); 254 255 if (phdr->p_type != PT_LOAD) 256 continue; 257 if (!filesz) 258 continue; 259 260 if (filesz > memsz) { 261 dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n", 262 filesz, memsz); 263 ret = -EINVAL; 264 break; 265 } 266 267 if (offset + filesz > fw->size) { 268 dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n", 269 offset + filesz, fw->size); 270 ret = -EINVAL; 271 break; 272 } 273 274 /* grab the kernel address for this device address */ 275 ptr = (void __iomem *)rproc_da_to_va(rproc, da, memsz, NULL); 276 if (!ptr) { 277 dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz); 278 ret = -EINVAL; 279 break; 280 } 281 282 /* put the segment where the remote processor expects it */ 283 scp_memcpy_aligned(ptr, elf_data + phdr->p_offset, filesz); 284 } 285 286 return ret; 287 } 288 289 static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp, 290 const struct firmware *fw, 291 size_t *offset) 292 { 293 struct elf32_hdr *ehdr; 294 struct elf32_shdr *shdr, *shdr_strtab; 295 int i; 296 const u8 *elf_data = fw->data; 297 const char *strtab; 298 299 ehdr = (struct elf32_hdr *)elf_data; 300 shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff); 301 shdr_strtab = shdr + ehdr->e_shstrndx; 302 strtab = (const char *)(elf_data + shdr_strtab->sh_offset); 303 304 for (i = 0; i < ehdr->e_shnum; i++, shdr++) { 305 if (strcmp(strtab + shdr->sh_name, 306 SECTION_NAME_IPI_BUFFER) == 0) { 307 *offset = shdr->sh_addr; 308 return 0; 309 } 310 } 311 312 return -ENOENT; 313 } 314 315 static int mt8183_scp_clk_get(struct mtk_scp *scp) 316 { 317 struct device *dev = scp->dev; 318 int ret = 0; 319 320 scp->clk = devm_clk_get(dev, "main"); 321 if (IS_ERR(scp->clk)) { 322 dev_err(dev, "Failed to get clock\n"); 323 ret = PTR_ERR(scp->clk); 324 } 325 326 return ret; 327 } 328 329 static int mt8192_scp_clk_get(struct mtk_scp *scp) 330 { 331 return mt8183_scp_clk_get(scp); 332 } 333 334 static int mt8195_scp_clk_get(struct mtk_scp *scp) 335 { 336 scp->clk = NULL; 337 338 return 0; 339 } 340 341 static int mt8183_scp_before_load(struct mtk_scp *scp) 342 { 343 /* Clear SCP to host interrupt */ 344 writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST); 345 346 /* Reset clocks before loading FW */ 347 writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL); 348 writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL); 349 350 /* Initialize TCM before loading FW. */ 351 writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD); 352 writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD); 353 354 /* Turn on the power of SCP's SRAM before using it. */ 355 writel(0x0, scp->reg_base + MT8183_SCP_SRAM_PDN); 356 357 /* 358 * Set I-cache and D-cache size before loading SCP FW. 359 * SCP SRAM logical address may change when cache size setting differs. 360 */ 361 writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB, 362 scp->reg_base + MT8183_SCP_CACHE_CON); 363 writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON); 364 365 return 0; 366 } 367 368 static void mt8192_power_on_sram(void __iomem *addr) 369 { 370 int i; 371 372 for (i = 31; i >= 0; i--) 373 writel(GENMASK(i, 0), addr); 374 writel(0, addr); 375 } 376 377 static void mt8192_power_off_sram(void __iomem *addr) 378 { 379 int i; 380 381 writel(0, addr); 382 for (i = 0; i < 32; i++) 383 writel(GENMASK(i, 0), addr); 384 } 385 386 static int mt8186_scp_before_load(struct mtk_scp *scp) 387 { 388 /* Clear SCP to host interrupt */ 389 writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST); 390 391 /* Reset clocks before loading FW */ 392 writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL); 393 writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL); 394 395 /* Turn on the power of SCP's SRAM before using it. Enable 1 block per time*/ 396 mt8192_power_on_sram(scp->reg_base + MT8183_SCP_SRAM_PDN); 397 398 /* Initialize TCM before loading FW. */ 399 writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD); 400 writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD); 401 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1); 402 writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2); 403 404 return 0; 405 } 406 407 static int mt8192_scp_before_load(struct mtk_scp *scp) 408 { 409 /* clear SPM interrupt, SCP2SPM_IPC_CLR */ 410 writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR); 411 412 writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET); 413 414 /* enable SRAM clock */ 415 mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0); 416 mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1); 417 mt8192_power_on_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2); 418 mt8192_power_on_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN); 419 mt8192_power_on_sram(scp->reg_base + MT8192_CPU0_SRAM_PD); 420 421 /* enable MPU for all memory regions */ 422 writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF); 423 424 return 0; 425 } 426 427 static int scp_load(struct rproc *rproc, const struct firmware *fw) 428 { 429 struct mtk_scp *scp = rproc->priv; 430 struct device *dev = scp->dev; 431 int ret; 432 433 ret = clk_prepare_enable(scp->clk); 434 if (ret) { 435 dev_err(dev, "failed to enable clocks\n"); 436 return ret; 437 } 438 439 /* Hold SCP in reset while loading FW. */ 440 scp->data->scp_reset_assert(scp); 441 442 ret = scp->data->scp_before_load(scp); 443 if (ret < 0) 444 goto leave; 445 446 ret = scp_elf_load_segments(rproc, fw); 447 leave: 448 clk_disable_unprepare(scp->clk); 449 450 return ret; 451 } 452 453 static int scp_parse_fw(struct rproc *rproc, const struct firmware *fw) 454 { 455 struct mtk_scp *scp = rproc->priv; 456 struct device *dev = scp->dev; 457 int ret; 458 459 ret = clk_prepare_enable(scp->clk); 460 if (ret) { 461 dev_err(dev, "failed to enable clocks\n"); 462 return ret; 463 } 464 465 ret = scp_ipi_init(scp, fw); 466 clk_disable_unprepare(scp->clk); 467 return ret; 468 } 469 470 static int scp_start(struct rproc *rproc) 471 { 472 struct mtk_scp *scp = (struct mtk_scp *)rproc->priv; 473 struct device *dev = scp->dev; 474 struct scp_run *run = &scp->run; 475 int ret; 476 477 ret = clk_prepare_enable(scp->clk); 478 if (ret) { 479 dev_err(dev, "failed to enable clocks\n"); 480 return ret; 481 } 482 483 run->signaled = false; 484 485 scp->data->scp_reset_deassert(scp); 486 487 ret = wait_event_interruptible_timeout( 488 run->wq, 489 run->signaled, 490 msecs_to_jiffies(2000)); 491 492 if (ret == 0) { 493 dev_err(dev, "wait SCP initialization timeout!\n"); 494 ret = -ETIME; 495 goto stop; 496 } 497 if (ret == -ERESTARTSYS) { 498 dev_err(dev, "wait SCP interrupted by a signal!\n"); 499 goto stop; 500 } 501 502 clk_disable_unprepare(scp->clk); 503 dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver); 504 505 return 0; 506 507 stop: 508 scp->data->scp_reset_assert(scp); 509 clk_disable_unprepare(scp->clk); 510 return ret; 511 } 512 513 static void *mt8183_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len) 514 { 515 int offset; 516 517 if (da < scp->sram_size) { 518 offset = da; 519 if (offset >= 0 && (offset + len) <= scp->sram_size) 520 return (void __force *)scp->sram_base + offset; 521 } else if (scp->dram_size) { 522 offset = da - scp->dma_addr; 523 if (offset >= 0 && (offset + len) <= scp->dram_size) 524 return scp->cpu_addr + offset; 525 } 526 527 return NULL; 528 } 529 530 static void *mt8192_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len) 531 { 532 int offset; 533 534 if (da >= scp->sram_phys && 535 (da + len) <= scp->sram_phys + scp->sram_size) { 536 offset = da - scp->sram_phys; 537 return (void __force *)scp->sram_base + offset; 538 } 539 540 /* optional memory region */ 541 if (scp->l1tcm_size && 542 da >= scp->l1tcm_phys && 543 (da + len) <= scp->l1tcm_phys + scp->l1tcm_size) { 544 offset = da - scp->l1tcm_phys; 545 return (void __force *)scp->l1tcm_base + offset; 546 } 547 548 /* optional memory region */ 549 if (scp->dram_size && 550 da >= scp->dma_addr && 551 (da + len) <= scp->dma_addr + scp->dram_size) { 552 offset = da - scp->dma_addr; 553 return scp->cpu_addr + offset; 554 } 555 556 return NULL; 557 } 558 559 static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 560 { 561 struct mtk_scp *scp = (struct mtk_scp *)rproc->priv; 562 563 return scp->data->scp_da_to_va(scp, da, len); 564 } 565 566 static void mt8183_scp_stop(struct mtk_scp *scp) 567 { 568 /* Disable SCP watchdog */ 569 writel(0, scp->reg_base + MT8183_WDT_CFG); 570 } 571 572 static void mt8192_scp_stop(struct mtk_scp *scp) 573 { 574 /* Disable SRAM clock */ 575 mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_0); 576 mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_1); 577 mt8192_power_off_sram(scp->reg_base + MT8192_L2TCM_SRAM_PD_2); 578 mt8192_power_off_sram(scp->reg_base + MT8192_L1TCM_SRAM_PDN); 579 mt8192_power_off_sram(scp->reg_base + MT8192_CPU0_SRAM_PD); 580 581 /* Disable SCP watchdog */ 582 writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG); 583 } 584 585 static int scp_stop(struct rproc *rproc) 586 { 587 struct mtk_scp *scp = (struct mtk_scp *)rproc->priv; 588 int ret; 589 590 ret = clk_prepare_enable(scp->clk); 591 if (ret) { 592 dev_err(scp->dev, "failed to enable clocks\n"); 593 return ret; 594 } 595 596 scp->data->scp_reset_assert(scp); 597 scp->data->scp_stop(scp); 598 clk_disable_unprepare(scp->clk); 599 600 return 0; 601 } 602 603 static const struct rproc_ops scp_ops = { 604 .start = scp_start, 605 .stop = scp_stop, 606 .load = scp_load, 607 .da_to_va = scp_da_to_va, 608 .parse_fw = scp_parse_fw, 609 }; 610 611 /** 612 * scp_get_device() - get device struct of SCP 613 * 614 * @scp: mtk_scp structure 615 **/ 616 struct device *scp_get_device(struct mtk_scp *scp) 617 { 618 return scp->dev; 619 } 620 EXPORT_SYMBOL_GPL(scp_get_device); 621 622 /** 623 * scp_get_rproc() - get rproc struct of SCP 624 * 625 * @scp: mtk_scp structure 626 **/ 627 struct rproc *scp_get_rproc(struct mtk_scp *scp) 628 { 629 return scp->rproc; 630 } 631 EXPORT_SYMBOL_GPL(scp_get_rproc); 632 633 /** 634 * scp_get_vdec_hw_capa() - get video decoder hardware capability 635 * 636 * @scp: mtk_scp structure 637 * 638 * Return: video decoder hardware capability 639 **/ 640 unsigned int scp_get_vdec_hw_capa(struct mtk_scp *scp) 641 { 642 return scp->run.dec_capability; 643 } 644 EXPORT_SYMBOL_GPL(scp_get_vdec_hw_capa); 645 646 /** 647 * scp_get_venc_hw_capa() - get video encoder hardware capability 648 * 649 * @scp: mtk_scp structure 650 * 651 * Return: video encoder hardware capability 652 **/ 653 unsigned int scp_get_venc_hw_capa(struct mtk_scp *scp) 654 { 655 return scp->run.enc_capability; 656 } 657 EXPORT_SYMBOL_GPL(scp_get_venc_hw_capa); 658 659 /** 660 * scp_mapping_dm_addr() - Mapping SRAM/DRAM to kernel virtual address 661 * 662 * @scp: mtk_scp structure 663 * @mem_addr: SCP views memory address 664 * 665 * Mapping the SCP's SRAM address / 666 * DMEM (Data Extended Memory) memory address / 667 * Working buffer memory address to 668 * kernel virtual address. 669 * 670 * Return: Return ERR_PTR(-EINVAL) if mapping failed, 671 * otherwise the mapped kernel virtual address 672 **/ 673 void *scp_mapping_dm_addr(struct mtk_scp *scp, u32 mem_addr) 674 { 675 void *ptr; 676 677 ptr = scp_da_to_va(scp->rproc, mem_addr, 0, NULL); 678 if (!ptr) 679 return ERR_PTR(-EINVAL); 680 681 return ptr; 682 } 683 EXPORT_SYMBOL_GPL(scp_mapping_dm_addr); 684 685 static int scp_map_memory_region(struct mtk_scp *scp) 686 { 687 int ret; 688 689 ret = of_reserved_mem_device_init(scp->dev); 690 691 /* reserved memory is optional. */ 692 if (ret == -ENODEV) { 693 dev_info(scp->dev, "skipping reserved memory initialization."); 694 return 0; 695 } 696 697 if (ret) { 698 dev_err(scp->dev, "failed to assign memory-region: %d\n", ret); 699 return -ENOMEM; 700 } 701 702 /* Reserved SCP code size */ 703 scp->dram_size = MAX_CODE_SIZE; 704 scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size, 705 &scp->dma_addr, GFP_KERNEL); 706 if (!scp->cpu_addr) 707 return -ENOMEM; 708 709 return 0; 710 } 711 712 static void scp_unmap_memory_region(struct mtk_scp *scp) 713 { 714 if (scp->dram_size == 0) 715 return; 716 717 dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr, 718 scp->dma_addr); 719 of_reserved_mem_device_release(scp->dev); 720 } 721 722 static int scp_register_ipi(struct platform_device *pdev, u32 id, 723 ipi_handler_t handler, void *priv) 724 { 725 struct mtk_scp *scp = platform_get_drvdata(pdev); 726 727 return scp_ipi_register(scp, id, handler, priv); 728 } 729 730 static void scp_unregister_ipi(struct platform_device *pdev, u32 id) 731 { 732 struct mtk_scp *scp = platform_get_drvdata(pdev); 733 734 scp_ipi_unregister(scp, id); 735 } 736 737 static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf, 738 unsigned int len, unsigned int wait) 739 { 740 struct mtk_scp *scp = platform_get_drvdata(pdev); 741 742 return scp_ipi_send(scp, id, buf, len, wait); 743 } 744 745 static struct mtk_rpmsg_info mtk_scp_rpmsg_info = { 746 .send_ipi = scp_send_ipi, 747 .register_ipi = scp_register_ipi, 748 .unregister_ipi = scp_unregister_ipi, 749 .ns_ipi_id = SCP_IPI_NS_SERVICE, 750 }; 751 752 static void scp_add_rpmsg_subdev(struct mtk_scp *scp) 753 { 754 scp->rpmsg_subdev = 755 mtk_rpmsg_create_rproc_subdev(to_platform_device(scp->dev), 756 &mtk_scp_rpmsg_info); 757 if (scp->rpmsg_subdev) 758 rproc_add_subdev(scp->rproc, scp->rpmsg_subdev); 759 } 760 761 static void scp_remove_rpmsg_subdev(struct mtk_scp *scp) 762 { 763 if (scp->rpmsg_subdev) { 764 rproc_remove_subdev(scp->rproc, scp->rpmsg_subdev); 765 mtk_rpmsg_destroy_rproc_subdev(scp->rpmsg_subdev); 766 scp->rpmsg_subdev = NULL; 767 } 768 } 769 770 static int scp_probe(struct platform_device *pdev) 771 { 772 struct device *dev = &pdev->dev; 773 struct device_node *np = dev->of_node; 774 struct mtk_scp *scp; 775 struct rproc *rproc; 776 struct resource *res; 777 char *fw_name = "scp.img"; 778 int ret, i; 779 780 rproc = devm_rproc_alloc(dev, np->name, &scp_ops, fw_name, sizeof(*scp)); 781 if (!rproc) 782 return dev_err_probe(dev, -ENOMEM, "unable to allocate remoteproc\n"); 783 784 scp = (struct mtk_scp *)rproc->priv; 785 scp->rproc = rproc; 786 scp->dev = dev; 787 scp->data = of_device_get_match_data(dev); 788 platform_set_drvdata(pdev, scp); 789 790 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram"); 791 scp->sram_base = devm_ioremap_resource(dev, res); 792 if (IS_ERR(scp->sram_base)) 793 return dev_err_probe(dev, PTR_ERR(scp->sram_base), 794 "Failed to parse and map sram memory\n"); 795 796 scp->sram_size = resource_size(res); 797 scp->sram_phys = res->start; 798 799 /* l1tcm is an optional memory region */ 800 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm"); 801 scp->l1tcm_base = devm_ioremap_resource(dev, res); 802 if (IS_ERR(scp->l1tcm_base)) { 803 ret = PTR_ERR(scp->l1tcm_base); 804 if (ret != -EINVAL) { 805 return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n"); 806 } 807 } else { 808 scp->l1tcm_size = resource_size(res); 809 scp->l1tcm_phys = res->start; 810 } 811 812 scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg"); 813 if (IS_ERR(scp->reg_base)) 814 return dev_err_probe(dev, PTR_ERR(scp->reg_base), 815 "Failed to parse and map cfg memory\n"); 816 817 ret = scp->data->scp_clk_get(scp); 818 if (ret) 819 return ret; 820 821 ret = scp_map_memory_region(scp); 822 if (ret) 823 return ret; 824 825 mutex_init(&scp->send_lock); 826 for (i = 0; i < SCP_IPI_MAX; i++) 827 mutex_init(&scp->ipi_desc[i].lock); 828 829 /* register SCP initialization IPI */ 830 ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp); 831 if (ret) { 832 dev_err(dev, "Failed to register IPI_SCP_INIT\n"); 833 goto release_dev_mem; 834 } 835 836 init_waitqueue_head(&scp->run.wq); 837 init_waitqueue_head(&scp->ack_wq); 838 839 scp_add_rpmsg_subdev(scp); 840 841 ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), NULL, 842 scp_irq_handler, IRQF_ONESHOT, 843 pdev->name, scp); 844 845 if (ret) { 846 dev_err(dev, "failed to request irq\n"); 847 goto remove_subdev; 848 } 849 850 ret = rproc_add(rproc); 851 if (ret) 852 goto remove_subdev; 853 854 return 0; 855 856 remove_subdev: 857 scp_remove_rpmsg_subdev(scp); 858 scp_ipi_unregister(scp, SCP_IPI_INIT); 859 release_dev_mem: 860 scp_unmap_memory_region(scp); 861 for (i = 0; i < SCP_IPI_MAX; i++) 862 mutex_destroy(&scp->ipi_desc[i].lock); 863 mutex_destroy(&scp->send_lock); 864 865 return ret; 866 } 867 868 static int scp_remove(struct platform_device *pdev) 869 { 870 struct mtk_scp *scp = platform_get_drvdata(pdev); 871 int i; 872 873 rproc_del(scp->rproc); 874 scp_remove_rpmsg_subdev(scp); 875 scp_ipi_unregister(scp, SCP_IPI_INIT); 876 scp_unmap_memory_region(scp); 877 for (i = 0; i < SCP_IPI_MAX; i++) 878 mutex_destroy(&scp->ipi_desc[i].lock); 879 mutex_destroy(&scp->send_lock); 880 rproc_free(scp->rproc); 881 882 return 0; 883 } 884 885 static const struct mtk_scp_of_data mt8183_of_data = { 886 .scp_clk_get = mt8183_scp_clk_get, 887 .scp_before_load = mt8183_scp_before_load, 888 .scp_irq_handler = mt8183_scp_irq_handler, 889 .scp_reset_assert = mt8183_scp_reset_assert, 890 .scp_reset_deassert = mt8183_scp_reset_deassert, 891 .scp_stop = mt8183_scp_stop, 892 .scp_da_to_va = mt8183_scp_da_to_va, 893 .host_to_scp_reg = MT8183_HOST_TO_SCP, 894 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT, 895 .ipi_buf_offset = 0x7bdb0, 896 }; 897 898 static const struct mtk_scp_of_data mt8186_of_data = { 899 .scp_clk_get = mt8195_scp_clk_get, 900 .scp_before_load = mt8186_scp_before_load, 901 .scp_irq_handler = mt8183_scp_irq_handler, 902 .scp_reset_assert = mt8183_scp_reset_assert, 903 .scp_reset_deassert = mt8183_scp_reset_deassert, 904 .scp_stop = mt8183_scp_stop, 905 .scp_da_to_va = mt8183_scp_da_to_va, 906 .host_to_scp_reg = MT8183_HOST_TO_SCP, 907 .host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT, 908 .ipi_buf_offset = 0x7bdb0, 909 }; 910 911 static const struct mtk_scp_of_data mt8192_of_data = { 912 .scp_clk_get = mt8192_scp_clk_get, 913 .scp_before_load = mt8192_scp_before_load, 914 .scp_irq_handler = mt8192_scp_irq_handler, 915 .scp_reset_assert = mt8192_scp_reset_assert, 916 .scp_reset_deassert = mt8192_scp_reset_deassert, 917 .scp_stop = mt8192_scp_stop, 918 .scp_da_to_va = mt8192_scp_da_to_va, 919 .host_to_scp_reg = MT8192_GIPC_IN_SET, 920 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, 921 }; 922 923 static const struct mtk_scp_of_data mt8195_of_data = { 924 .scp_clk_get = mt8195_scp_clk_get, 925 .scp_before_load = mt8192_scp_before_load, 926 .scp_irq_handler = mt8192_scp_irq_handler, 927 .scp_reset_assert = mt8192_scp_reset_assert, 928 .scp_reset_deassert = mt8192_scp_reset_deassert, 929 .scp_stop = mt8192_scp_stop, 930 .scp_da_to_va = mt8192_scp_da_to_va, 931 .host_to_scp_reg = MT8192_GIPC_IN_SET, 932 .host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT, 933 }; 934 935 static const struct of_device_id mtk_scp_of_match[] = { 936 { .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data }, 937 { .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data }, 938 { .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data }, 939 { .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data }, 940 {}, 941 }; 942 MODULE_DEVICE_TABLE(of, mtk_scp_of_match); 943 944 static struct platform_driver mtk_scp_driver = { 945 .probe = scp_probe, 946 .remove = scp_remove, 947 .driver = { 948 .name = "mtk-scp", 949 .of_match_table = mtk_scp_of_match, 950 }, 951 }; 952 953 module_platform_driver(mtk_scp_driver); 954 955 MODULE_LICENSE("GPL v2"); 956 MODULE_DESCRIPTION("MediaTek SCP control driver"); 957