1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
4  */
5 
6 #include <dt-bindings/firmware/imx/rsrc.h>
7 #include <linux/arm-smccc.h>
8 #include <linux/clk.h>
9 #include <linux/err.h>
10 #include <linux/firmware/imx/sci.h>
11 #include <linux/interrupt.h>
12 #include <linux/kernel.h>
13 #include <linux/mailbox_client.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/module.h>
16 #include <linux/of_address.h>
17 #include <linux/of_reserved_mem.h>
18 #include <linux/of_device.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/regmap.h>
22 #include <linux/remoteproc.h>
23 #include <linux/workqueue.h>
24 
25 #include "imx_rproc.h"
26 #include "remoteproc_internal.h"
27 
28 #define IMX7D_SRC_SCR			0x0C
29 #define IMX7D_ENABLE_M4			BIT(3)
30 #define IMX7D_SW_M4P_RST		BIT(2)
31 #define IMX7D_SW_M4C_RST		BIT(1)
32 #define IMX7D_SW_M4C_NON_SCLR_RST	BIT(0)
33 
34 #define IMX7D_M4_RST_MASK		(IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
35 					 | IMX7D_SW_M4C_RST \
36 					 | IMX7D_SW_M4C_NON_SCLR_RST)
37 
38 #define IMX7D_M4_START			(IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \
39 					 | IMX7D_SW_M4C_RST)
40 #define IMX7D_M4_STOP			(IMX7D_ENABLE_M4 | IMX7D_SW_M4C_RST | \
41 					 IMX7D_SW_M4C_NON_SCLR_RST)
42 
43 /* Address: 0x020D8000 */
44 #define IMX6SX_SRC_SCR			0x00
45 #define IMX6SX_ENABLE_M4		BIT(22)
46 #define IMX6SX_SW_M4P_RST		BIT(12)
47 #define IMX6SX_SW_M4C_NON_SCLR_RST	BIT(4)
48 #define IMX6SX_SW_M4C_RST		BIT(3)
49 
50 #define IMX6SX_M4_START			(IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
51 					 | IMX6SX_SW_M4C_RST)
52 #define IMX6SX_M4_STOP			(IMX6SX_ENABLE_M4 | IMX6SX_SW_M4C_RST | \
53 					 IMX6SX_SW_M4C_NON_SCLR_RST)
54 #define IMX6SX_M4_RST_MASK		(IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \
55 					 | IMX6SX_SW_M4C_NON_SCLR_RST \
56 					 | IMX6SX_SW_M4C_RST)
57 
58 #define IMX_RPROC_MEM_MAX		32
59 
60 #define IMX_SIP_RPROC			0xC2000005
61 #define IMX_SIP_RPROC_START		0x00
62 #define IMX_SIP_RPROC_STARTED		0x01
63 #define IMX_SIP_RPROC_STOP		0x02
64 
65 #define IMX_SC_IRQ_GROUP_REBOOTED	5
66 
67 /**
68  * struct imx_rproc_mem - slim internal memory structure
69  * @cpu_addr: MPU virtual address of the memory region
70  * @sys_addr: Bus address used to access the memory region
71  * @size: Size of the memory region
72  */
73 struct imx_rproc_mem {
74 	void __iomem *cpu_addr;
75 	phys_addr_t sys_addr;
76 	size_t size;
77 };
78 
79 /* att flags: lower 16 bits specifying core, higher 16 bits for flags  */
80 /* M4 own area. Can be mapped at probe */
81 #define ATT_OWN         BIT(31)
82 #define ATT_IOMEM       BIT(30)
83 
84 #define ATT_CORE_MASK   0xffff
85 #define ATT_CORE(I)     BIT((I))
86 
87 static int imx_rproc_xtr_mbox_init(struct rproc *rproc);
88 static void imx_rproc_free_mbox(struct rproc *rproc);
89 static int imx_rproc_detach_pd(struct rproc *rproc);
90 
91 struct imx_rproc {
92 	struct device			*dev;
93 	struct regmap			*regmap;
94 	struct rproc			*rproc;
95 	const struct imx_rproc_dcfg	*dcfg;
96 	struct imx_rproc_mem		mem[IMX_RPROC_MEM_MAX];
97 	struct clk			*clk;
98 	struct mbox_client		cl;
99 	struct mbox_chan		*tx_ch;
100 	struct mbox_chan		*rx_ch;
101 	struct work_struct		rproc_work;
102 	struct workqueue_struct		*workqueue;
103 	void __iomem			*rsc_table;
104 	struct imx_sc_ipc		*ipc_handle;
105 	struct notifier_block		rproc_nb;
106 	u32				rproc_pt;	/* partition id */
107 	u32				rsrc_id;	/* resource id */
108 	u32				entry;		/* cpu start address */
109 	int                             num_pd;
110 	u32				core_index;
111 	struct device                   **pd_dev;
112 	struct device_link              **pd_dev_link;
113 };
114 
115 static const struct imx_rproc_att imx_rproc_att_imx93[] = {
116 	/* dev addr , sys addr  , size	    , flags */
117 	/* TCM CODE NON-SECURE */
118 	{ 0x0FFC0000, 0x201C0000, 0x00020000, ATT_OWN | ATT_IOMEM },
119 	{ 0x0FFE0000, 0x201E0000, 0x00020000, ATT_OWN | ATT_IOMEM },
120 
121 	/* TCM CODE SECURE */
122 	{ 0x1FFC0000, 0x201C0000, 0x00020000, ATT_OWN | ATT_IOMEM },
123 	{ 0x1FFE0000, 0x201E0000, 0x00020000, ATT_OWN | ATT_IOMEM },
124 
125 	/* TCM SYS NON-SECURE*/
126 	{ 0x20000000, 0x20200000, 0x00020000, ATT_OWN | ATT_IOMEM },
127 	{ 0x20020000, 0x20220000, 0x00020000, ATT_OWN | ATT_IOMEM },
128 
129 	/* TCM SYS SECURE*/
130 	{ 0x30000000, 0x20200000, 0x00020000, ATT_OWN | ATT_IOMEM },
131 	{ 0x30020000, 0x20220000, 0x00020000, ATT_OWN | ATT_IOMEM },
132 
133 	/* DDR */
134 	{ 0x80000000, 0x80000000, 0x10000000, 0 },
135 	{ 0x90000000, 0x80000000, 0x10000000, 0 },
136 
137 	{ 0xC0000000, 0xC0000000, 0x10000000, 0 },
138 	{ 0xD0000000, 0xC0000000, 0x10000000, 0 },
139 };
140 
141 static const struct imx_rproc_att imx_rproc_att_imx8qm[] = {
142 	/* dev addr , sys addr  , size      , flags */
143 	{ 0x08000000, 0x08000000, 0x10000000, 0},
144 	/* TCML */
145 	{ 0x1FFE0000, 0x34FE0000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(0)},
146 	{ 0x1FFE0000, 0x38FE0000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(1)},
147 	/* TCMU */
148 	{ 0x20000000, 0x35000000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(0)},
149 	{ 0x20000000, 0x39000000, 0x00020000, ATT_OWN | ATT_IOMEM | ATT_CORE(1)},
150 	/* DDR (Data) */
151 	{ 0x80000000, 0x80000000, 0x60000000, 0 },
152 };
153 
154 static const struct imx_rproc_att imx_rproc_att_imx8qxp[] = {
155 	{ 0x08000000, 0x08000000, 0x10000000, 0 },
156 	/* TCML/U */
157 	{ 0x1FFE0000, 0x34FE0000, 0x00040000, ATT_OWN | ATT_IOMEM },
158 	/* OCRAM(Low 96KB) */
159 	{ 0x21000000, 0x00100000, 0x00018000, 0 },
160 	/* OCRAM */
161 	{ 0x21100000, 0x00100000, 0x00040000, 0 },
162 	/* DDR (Data) */
163 	{ 0x80000000, 0x80000000, 0x60000000, 0 },
164 };
165 
166 static const struct imx_rproc_att imx_rproc_att_imx8mn[] = {
167 	/* dev addr , sys addr  , size	    , flags */
168 	/* ITCM   */
169 	{ 0x00000000, 0x007E0000, 0x00020000, ATT_OWN | ATT_IOMEM },
170 	/* OCRAM_S */
171 	{ 0x00180000, 0x00180000, 0x00009000, 0 },
172 	/* OCRAM */
173 	{ 0x00900000, 0x00900000, 0x00020000, 0 },
174 	/* OCRAM */
175 	{ 0x00920000, 0x00920000, 0x00020000, 0 },
176 	/* OCRAM */
177 	{ 0x00940000, 0x00940000, 0x00050000, 0 },
178 	/* QSPI Code - alias */
179 	{ 0x08000000, 0x08000000, 0x08000000, 0 },
180 	/* DDR (Code) - alias */
181 	{ 0x10000000, 0x40000000, 0x0FFE0000, 0 },
182 	/* DTCM */
183 	{ 0x20000000, 0x00800000, 0x00020000, ATT_OWN | ATT_IOMEM },
184 	/* OCRAM_S - alias */
185 	{ 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
186 	/* OCRAM */
187 	{ 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
188 	/* OCRAM */
189 	{ 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
190 	/* OCRAM */
191 	{ 0x20240000, 0x00940000, 0x00040000, ATT_OWN },
192 	/* DDR (Data) */
193 	{ 0x40000000, 0x40000000, 0x80000000, 0 },
194 };
195 
196 static const struct imx_rproc_att imx_rproc_att_imx8mq[] = {
197 	/* dev addr , sys addr  , size	    , flags */
198 	/* TCML - alias */
199 	{ 0x00000000, 0x007e0000, 0x00020000, ATT_IOMEM},
200 	/* OCRAM_S */
201 	{ 0x00180000, 0x00180000, 0x00008000, 0 },
202 	/* OCRAM */
203 	{ 0x00900000, 0x00900000, 0x00020000, 0 },
204 	/* OCRAM */
205 	{ 0x00920000, 0x00920000, 0x00020000, 0 },
206 	/* QSPI Code - alias */
207 	{ 0x08000000, 0x08000000, 0x08000000, 0 },
208 	/* DDR (Code) - alias */
209 	{ 0x10000000, 0x80000000, 0x0FFE0000, 0 },
210 	/* TCML */
211 	{ 0x1FFE0000, 0x007E0000, 0x00020000, ATT_OWN  | ATT_IOMEM},
212 	/* TCMU */
213 	{ 0x20000000, 0x00800000, 0x00020000, ATT_OWN  | ATT_IOMEM},
214 	/* OCRAM_S */
215 	{ 0x20180000, 0x00180000, 0x00008000, ATT_OWN },
216 	/* OCRAM */
217 	{ 0x20200000, 0x00900000, 0x00020000, ATT_OWN },
218 	/* OCRAM */
219 	{ 0x20220000, 0x00920000, 0x00020000, ATT_OWN },
220 	/* DDR (Data) */
221 	{ 0x40000000, 0x40000000, 0x80000000, 0 },
222 };
223 
224 static const struct imx_rproc_att imx_rproc_att_imx8ulp[] = {
225 	{0x1FFC0000, 0x1FFC0000, 0xC0000, ATT_OWN},
226 	{0x21000000, 0x21000000, 0x10000, ATT_OWN},
227 	{0x80000000, 0x80000000, 0x60000000, 0}
228 };
229 
230 static const struct imx_rproc_att imx_rproc_att_imx7ulp[] = {
231 	{0x1FFD0000, 0x1FFD0000, 0x30000, ATT_OWN},
232 	{0x20000000, 0x20000000, 0x10000, ATT_OWN},
233 	{0x2F000000, 0x2F000000, 0x20000, ATT_OWN},
234 	{0x2F020000, 0x2F020000, 0x20000, ATT_OWN},
235 	{0x60000000, 0x60000000, 0x40000000, 0}
236 };
237 
238 static const struct imx_rproc_att imx_rproc_att_imx7d[] = {
239 	/* dev addr , sys addr  , size	    , flags */
240 	/* OCRAM_S (M4 Boot code) - alias */
241 	{ 0x00000000, 0x00180000, 0x00008000, 0 },
242 	/* OCRAM_S (Code) */
243 	{ 0x00180000, 0x00180000, 0x00008000, ATT_OWN },
244 	/* OCRAM (Code) - alias */
245 	{ 0x00900000, 0x00900000, 0x00020000, 0 },
246 	/* OCRAM_EPDC (Code) - alias */
247 	{ 0x00920000, 0x00920000, 0x00020000, 0 },
248 	/* OCRAM_PXP (Code) - alias */
249 	{ 0x00940000, 0x00940000, 0x00008000, 0 },
250 	/* TCML (Code) */
251 	{ 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM },
252 	/* DDR (Code) - alias, first part of DDR (Data) */
253 	{ 0x10000000, 0x80000000, 0x0FFF0000, 0 },
254 
255 	/* TCMU (Data) */
256 	{ 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM },
257 	/* OCRAM (Data) */
258 	{ 0x20200000, 0x00900000, 0x00020000, 0 },
259 	/* OCRAM_EPDC (Data) */
260 	{ 0x20220000, 0x00920000, 0x00020000, 0 },
261 	/* OCRAM_PXP (Data) */
262 	{ 0x20240000, 0x00940000, 0x00008000, 0 },
263 	/* DDR (Data) */
264 	{ 0x80000000, 0x80000000, 0x60000000, 0 },
265 };
266 
267 static const struct imx_rproc_att imx_rproc_att_imx6sx[] = {
268 	/* dev addr , sys addr  , size	    , flags */
269 	/* TCML (M4 Boot Code) - alias */
270 	{ 0x00000000, 0x007F8000, 0x00008000, ATT_IOMEM },
271 	/* OCRAM_S (Code) */
272 	{ 0x00180000, 0x008F8000, 0x00004000, 0 },
273 	/* OCRAM_S (Code) - alias */
274 	{ 0x00180000, 0x008FC000, 0x00004000, 0 },
275 	/* TCML (Code) */
276 	{ 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN | ATT_IOMEM },
277 	/* DDR (Code) - alias, first part of DDR (Data) */
278 	{ 0x10000000, 0x80000000, 0x0FFF8000, 0 },
279 
280 	/* TCMU (Data) */
281 	{ 0x20000000, 0x00800000, 0x00008000, ATT_OWN | ATT_IOMEM },
282 	/* OCRAM_S (Data) - alias? */
283 	{ 0x208F8000, 0x008F8000, 0x00004000, 0 },
284 	/* DDR (Data) */
285 	{ 0x80000000, 0x80000000, 0x60000000, 0 },
286 };
287 
288 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mn = {
289 	.att		= imx_rproc_att_imx8mn,
290 	.att_size	= ARRAY_SIZE(imx_rproc_att_imx8mn),
291 	.method		= IMX_RPROC_SMC,
292 };
293 
294 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = {
295 	.src_reg	= IMX7D_SRC_SCR,
296 	.src_mask	= IMX7D_M4_RST_MASK,
297 	.src_start	= IMX7D_M4_START,
298 	.src_stop	= IMX7D_M4_STOP,
299 	.att		= imx_rproc_att_imx8mq,
300 	.att_size	= ARRAY_SIZE(imx_rproc_att_imx8mq),
301 	.method		= IMX_RPROC_MMIO,
302 };
303 
304 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qm = {
305 	.att            = imx_rproc_att_imx8qm,
306 	.att_size       = ARRAY_SIZE(imx_rproc_att_imx8qm),
307 	.method         = IMX_RPROC_SCU_API,
308 };
309 
310 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8qxp = {
311 	.att		= imx_rproc_att_imx8qxp,
312 	.att_size	= ARRAY_SIZE(imx_rproc_att_imx8qxp),
313 	.method		= IMX_RPROC_SCU_API,
314 };
315 
316 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8ulp = {
317 	.att		= imx_rproc_att_imx8ulp,
318 	.att_size	= ARRAY_SIZE(imx_rproc_att_imx8ulp),
319 	.method		= IMX_RPROC_NONE,
320 };
321 
322 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = {
323 	.att		= imx_rproc_att_imx7ulp,
324 	.att_size	= ARRAY_SIZE(imx_rproc_att_imx7ulp),
325 	.method		= IMX_RPROC_NONE,
326 };
327 
328 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = {
329 	.src_reg	= IMX7D_SRC_SCR,
330 	.src_mask	= IMX7D_M4_RST_MASK,
331 	.src_start	= IMX7D_M4_START,
332 	.src_stop	= IMX7D_M4_STOP,
333 	.att		= imx_rproc_att_imx7d,
334 	.att_size	= ARRAY_SIZE(imx_rproc_att_imx7d),
335 	.method		= IMX_RPROC_MMIO,
336 };
337 
338 static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = {
339 	.src_reg	= IMX6SX_SRC_SCR,
340 	.src_mask	= IMX6SX_M4_RST_MASK,
341 	.src_start	= IMX6SX_M4_START,
342 	.src_stop	= IMX6SX_M4_STOP,
343 	.att		= imx_rproc_att_imx6sx,
344 	.att_size	= ARRAY_SIZE(imx_rproc_att_imx6sx),
345 	.method		= IMX_RPROC_MMIO,
346 };
347 
348 static const struct imx_rproc_dcfg imx_rproc_cfg_imx93 = {
349 	.att		= imx_rproc_att_imx93,
350 	.att_size	= ARRAY_SIZE(imx_rproc_att_imx93),
351 	.method		= IMX_RPROC_SMC,
352 };
353 
354 static int imx_rproc_start(struct rproc *rproc)
355 {
356 	struct imx_rproc *priv = rproc->priv;
357 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
358 	struct device *dev = priv->dev;
359 	struct arm_smccc_res res;
360 	int ret;
361 
362 	ret = imx_rproc_xtr_mbox_init(rproc);
363 	if (ret)
364 		return ret;
365 
366 	switch (dcfg->method) {
367 	case IMX_RPROC_MMIO:
368 		ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask,
369 					 dcfg->src_start);
370 		break;
371 	case IMX_RPROC_SMC:
372 		arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_START, 0, 0, 0, 0, 0, 0, &res);
373 		ret = res.a0;
374 		break;
375 	case IMX_RPROC_SCU_API:
376 		ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, true, priv->entry);
377 		break;
378 	default:
379 		return -EOPNOTSUPP;
380 	}
381 
382 	if (ret)
383 		dev_err(dev, "Failed to enable remote core!\n");
384 
385 	return ret;
386 }
387 
388 static int imx_rproc_stop(struct rproc *rproc)
389 {
390 	struct imx_rproc *priv = rproc->priv;
391 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
392 	struct device *dev = priv->dev;
393 	struct arm_smccc_res res;
394 	int ret;
395 
396 	switch (dcfg->method) {
397 	case IMX_RPROC_MMIO:
398 		ret = regmap_update_bits(priv->regmap, dcfg->src_reg, dcfg->src_mask,
399 					 dcfg->src_stop);
400 		break;
401 	case IMX_RPROC_SMC:
402 		arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STOP, 0, 0, 0, 0, 0, 0, &res);
403 		ret = res.a0;
404 		if (res.a1)
405 			dev_info(dev, "Not in wfi, force stopped\n");
406 		break;
407 	case IMX_RPROC_SCU_API:
408 		ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, false, priv->entry);
409 		break;
410 	default:
411 		return -EOPNOTSUPP;
412 	}
413 
414 	if (ret)
415 		dev_err(dev, "Failed to stop remote core\n");
416 	else
417 		imx_rproc_free_mbox(rproc);
418 
419 	return ret;
420 }
421 
422 static int imx_rproc_da_to_sys(struct imx_rproc *priv, u64 da,
423 			       size_t len, u64 *sys, bool *is_iomem)
424 {
425 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
426 	int i;
427 
428 	/* parse address translation table */
429 	for (i = 0; i < dcfg->att_size; i++) {
430 		const struct imx_rproc_att *att = &dcfg->att[i];
431 
432 		/*
433 		 * Ignore entries not belong to current core:
434 		 * i.MX8QM has dual general M4_[0,1] cores, M4_0's own entries
435 		 * has "ATT_CORE(0) & BIT(0)" true, M4_1's own entries has
436 		 * "ATT_CORE(1) & BIT(1)" true.
437 		 */
438 		if (att->flags & ATT_CORE_MASK) {
439 			if (!((BIT(priv->core_index)) & (att->flags & ATT_CORE_MASK)))
440 				continue;
441 		}
442 
443 		if (da >= att->da && da + len < att->da + att->size) {
444 			unsigned int offset = da - att->da;
445 
446 			*sys = att->sa + offset;
447 			if (is_iomem)
448 				*is_iomem = att->flags & ATT_IOMEM;
449 			return 0;
450 		}
451 	}
452 
453 	dev_warn(priv->dev, "Translation failed: da = 0x%llx len = 0x%zx\n",
454 		 da, len);
455 	return -ENOENT;
456 }
457 
458 static void *imx_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
459 {
460 	struct imx_rproc *priv = rproc->priv;
461 	void *va = NULL;
462 	u64 sys;
463 	int i;
464 
465 	if (len == 0)
466 		return NULL;
467 
468 	/*
469 	 * On device side we have many aliases, so we need to convert device
470 	 * address (M4) to system bus address first.
471 	 */
472 	if (imx_rproc_da_to_sys(priv, da, len, &sys, is_iomem))
473 		return NULL;
474 
475 	for (i = 0; i < IMX_RPROC_MEM_MAX; i++) {
476 		if (sys >= priv->mem[i].sys_addr && sys + len <
477 		    priv->mem[i].sys_addr +  priv->mem[i].size) {
478 			unsigned int offset = sys - priv->mem[i].sys_addr;
479 			/* __force to make sparse happy with type conversion */
480 			va = (__force void *)(priv->mem[i].cpu_addr + offset);
481 			break;
482 		}
483 	}
484 
485 	dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%zx va = 0x%p\n",
486 		da, len, va);
487 
488 	return va;
489 }
490 
491 static int imx_rproc_mem_alloc(struct rproc *rproc,
492 			       struct rproc_mem_entry *mem)
493 {
494 	struct device *dev = rproc->dev.parent;
495 	void *va;
496 
497 	dev_dbg(dev, "map memory: %p+%zx\n", &mem->dma, mem->len);
498 	va = ioremap_wc(mem->dma, mem->len);
499 	if (IS_ERR_OR_NULL(va)) {
500 		dev_err(dev, "Unable to map memory region: %p+%zx\n",
501 			&mem->dma, mem->len);
502 		return -ENOMEM;
503 	}
504 
505 	/* Update memory entry va */
506 	mem->va = va;
507 
508 	return 0;
509 }
510 
511 static int imx_rproc_mem_release(struct rproc *rproc,
512 				 struct rproc_mem_entry *mem)
513 {
514 	dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma);
515 	iounmap(mem->va);
516 
517 	return 0;
518 }
519 
520 static int imx_rproc_prepare(struct rproc *rproc)
521 {
522 	struct imx_rproc *priv = rproc->priv;
523 	struct device_node *np = priv->dev->of_node;
524 	struct of_phandle_iterator it;
525 	struct rproc_mem_entry *mem;
526 	struct reserved_mem *rmem;
527 	u32 da;
528 
529 	/* Register associated reserved memory regions */
530 	of_phandle_iterator_init(&it, np, "memory-region", NULL, 0);
531 	while (of_phandle_iterator_next(&it) == 0) {
532 		/*
533 		 * Ignore the first memory region which will be used vdev buffer.
534 		 * No need to do extra handlings, rproc_add_virtio_dev will handle it.
535 		 */
536 		if (!strcmp(it.node->name, "vdev0buffer"))
537 			continue;
538 
539 		if (!strcmp(it.node->name, "rsc-table"))
540 			continue;
541 
542 		rmem = of_reserved_mem_lookup(it.node);
543 		if (!rmem) {
544 			of_node_put(it.node);
545 			dev_err(priv->dev, "unable to acquire memory-region\n");
546 			return -EINVAL;
547 		}
548 
549 		/* No need to translate pa to da, i.MX use same map */
550 		da = rmem->base;
551 
552 		/* Register memory region */
553 		mem = rproc_mem_entry_init(priv->dev, NULL, (dma_addr_t)rmem->base, rmem->size, da,
554 					   imx_rproc_mem_alloc, imx_rproc_mem_release,
555 					   it.node->name);
556 
557 		if (mem) {
558 			rproc_coredump_add_segment(rproc, da, rmem->size);
559 		} else {
560 			of_node_put(it.node);
561 			return -ENOMEM;
562 		}
563 
564 		rproc_add_carveout(rproc, mem);
565 	}
566 
567 	return  0;
568 }
569 
570 static int imx_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw)
571 {
572 	int ret;
573 
574 	ret = rproc_elf_load_rsc_table(rproc, fw);
575 	if (ret)
576 		dev_info(&rproc->dev, "No resource table in elf\n");
577 
578 	return 0;
579 }
580 
581 static void imx_rproc_kick(struct rproc *rproc, int vqid)
582 {
583 	struct imx_rproc *priv = rproc->priv;
584 	int err;
585 	__u32 mmsg;
586 
587 	if (!priv->tx_ch) {
588 		dev_err(priv->dev, "No initialized mbox tx channel\n");
589 		return;
590 	}
591 
592 	/*
593 	 * Send the index of the triggered virtqueue as the mu payload.
594 	 * Let remote processor know which virtqueue is used.
595 	 */
596 	mmsg = vqid << 16;
597 
598 	err = mbox_send_message(priv->tx_ch, (void *)&mmsg);
599 	if (err < 0)
600 		dev_err(priv->dev, "%s: failed (%d, err:%d)\n",
601 			__func__, vqid, err);
602 }
603 
604 static int imx_rproc_attach(struct rproc *rproc)
605 {
606 	return imx_rproc_xtr_mbox_init(rproc);
607 }
608 
609 static int imx_rproc_detach(struct rproc *rproc)
610 {
611 	struct imx_rproc *priv = rproc->priv;
612 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
613 
614 	if (dcfg->method != IMX_RPROC_SCU_API)
615 		return -EOPNOTSUPP;
616 
617 	if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id))
618 		return -EOPNOTSUPP;
619 
620 	imx_rproc_free_mbox(rproc);
621 
622 	return 0;
623 }
624 
625 static struct resource_table *imx_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz)
626 {
627 	struct imx_rproc *priv = rproc->priv;
628 
629 	/* The resource table has already been mapped in imx_rproc_addr_init */
630 	if (!priv->rsc_table)
631 		return NULL;
632 
633 	*table_sz = SZ_1K;
634 	return (struct resource_table *)priv->rsc_table;
635 }
636 
637 static const struct rproc_ops imx_rproc_ops = {
638 	.prepare	= imx_rproc_prepare,
639 	.attach		= imx_rproc_attach,
640 	.detach		= imx_rproc_detach,
641 	.start		= imx_rproc_start,
642 	.stop		= imx_rproc_stop,
643 	.kick		= imx_rproc_kick,
644 	.da_to_va       = imx_rproc_da_to_va,
645 	.load		= rproc_elf_load_segments,
646 	.parse_fw	= imx_rproc_parse_fw,
647 	.find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table,
648 	.get_loaded_rsc_table = imx_rproc_get_loaded_rsc_table,
649 	.sanity_check	= rproc_elf_sanity_check,
650 	.get_boot_addr	= rproc_elf_get_boot_addr,
651 };
652 
653 static int imx_rproc_addr_init(struct imx_rproc *priv,
654 			       struct platform_device *pdev)
655 {
656 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
657 	struct device *dev = &pdev->dev;
658 	struct device_node *np = dev->of_node;
659 	int a, b = 0, err, nph;
660 
661 	/* remap required addresses */
662 	for (a = 0; a < dcfg->att_size; a++) {
663 		const struct imx_rproc_att *att = &dcfg->att[a];
664 
665 		if (!(att->flags & ATT_OWN))
666 			continue;
667 
668 		if (b >= IMX_RPROC_MEM_MAX)
669 			break;
670 
671 		if (att->flags & ATT_IOMEM)
672 			priv->mem[b].cpu_addr = devm_ioremap(&pdev->dev,
673 							     att->sa, att->size);
674 		else
675 			priv->mem[b].cpu_addr = devm_ioremap_wc(&pdev->dev,
676 								att->sa, att->size);
677 		if (!priv->mem[b].cpu_addr) {
678 			dev_err(dev, "failed to remap %#x bytes from %#x\n", att->size, att->sa);
679 			return -ENOMEM;
680 		}
681 		priv->mem[b].sys_addr = att->sa;
682 		priv->mem[b].size = att->size;
683 		b++;
684 	}
685 
686 	/* memory-region is optional property */
687 	nph = of_count_phandle_with_args(np, "memory-region", NULL);
688 	if (nph <= 0)
689 		return 0;
690 
691 	/* remap optional addresses */
692 	for (a = 0; a < nph; a++) {
693 		struct device_node *node;
694 		struct resource res;
695 
696 		node = of_parse_phandle(np, "memory-region", a);
697 		/* Not map vdevbuffer, vdevring region */
698 		if (!strncmp(node->name, "vdev", strlen("vdev"))) {
699 			of_node_put(node);
700 			continue;
701 		}
702 		err = of_address_to_resource(node, 0, &res);
703 		of_node_put(node);
704 		if (err) {
705 			dev_err(dev, "unable to resolve memory region\n");
706 			return err;
707 		}
708 
709 		if (b >= IMX_RPROC_MEM_MAX)
710 			break;
711 
712 		/* Not use resource version, because we might share region */
713 		priv->mem[b].cpu_addr = devm_ioremap_wc(&pdev->dev, res.start, resource_size(&res));
714 		if (!priv->mem[b].cpu_addr) {
715 			dev_err(dev, "failed to remap %pr\n", &res);
716 			return -ENOMEM;
717 		}
718 		priv->mem[b].sys_addr = res.start;
719 		priv->mem[b].size = resource_size(&res);
720 		if (!strcmp(node->name, "rsc-table"))
721 			priv->rsc_table = priv->mem[b].cpu_addr;
722 		b++;
723 	}
724 
725 	return 0;
726 }
727 
728 static void imx_rproc_vq_work(struct work_struct *work)
729 {
730 	struct imx_rproc *priv = container_of(work, struct imx_rproc,
731 					      rproc_work);
732 
733 	rproc_vq_interrupt(priv->rproc, 0);
734 	rproc_vq_interrupt(priv->rproc, 1);
735 }
736 
737 static void imx_rproc_rx_callback(struct mbox_client *cl, void *msg)
738 {
739 	struct rproc *rproc = dev_get_drvdata(cl->dev);
740 	struct imx_rproc *priv = rproc->priv;
741 
742 	queue_work(priv->workqueue, &priv->rproc_work);
743 }
744 
745 static int imx_rproc_xtr_mbox_init(struct rproc *rproc)
746 {
747 	struct imx_rproc *priv = rproc->priv;
748 	struct device *dev = priv->dev;
749 	struct mbox_client *cl;
750 
751 	/*
752 	 * stop() and detach() will free the mbox channels, so need
753 	 * to request mbox channels in start() and attach().
754 	 *
755 	 * Because start() and attach() not able to handle mbox defer
756 	 * probe, imx_rproc_xtr_mbox_init is also called in probe().
757 	 * The check is to avoid request mbox again when start() or
758 	 * attach() after probe() returns success.
759 	 */
760 	if (priv->tx_ch && priv->rx_ch)
761 		return 0;
762 
763 	if (!of_get_property(dev->of_node, "mbox-names", NULL))
764 		return 0;
765 
766 	cl = &priv->cl;
767 	cl->dev = dev;
768 	cl->tx_block = true;
769 	cl->tx_tout = 100;
770 	cl->knows_txdone = false;
771 	cl->rx_callback = imx_rproc_rx_callback;
772 
773 	priv->tx_ch = mbox_request_channel_byname(cl, "tx");
774 	if (IS_ERR(priv->tx_ch))
775 		return dev_err_probe(cl->dev, PTR_ERR(priv->tx_ch),
776 				     "failed to request tx mailbox channel\n");
777 
778 	priv->rx_ch = mbox_request_channel_byname(cl, "rx");
779 	if (IS_ERR(priv->rx_ch)) {
780 		mbox_free_channel(priv->tx_ch);
781 		return dev_err_probe(cl->dev, PTR_ERR(priv->rx_ch),
782 				     "failed to request rx mailbox channel\n");
783 	}
784 
785 	return 0;
786 }
787 
788 static void imx_rproc_free_mbox(struct rproc *rproc)
789 {
790 	struct imx_rproc *priv = rproc->priv;
791 
792 	if (priv->tx_ch) {
793 		mbox_free_channel(priv->tx_ch);
794 		priv->tx_ch = NULL;
795 	}
796 
797 	if (priv->rx_ch) {
798 		mbox_free_channel(priv->rx_ch);
799 		priv->rx_ch = NULL;
800 	}
801 }
802 
803 static void imx_rproc_put_scu(struct rproc *rproc)
804 {
805 	struct imx_rproc *priv = rproc->priv;
806 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
807 
808 	if (dcfg->method != IMX_RPROC_SCU_API)
809 		return;
810 
811 	if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) {
812 		imx_rproc_detach_pd(rproc);
813 		return;
814 	}
815 
816 	imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_REBOOTED, BIT(priv->rproc_pt), false);
817 	imx_scu_irq_unregister_notifier(&priv->rproc_nb);
818 }
819 
820 static int imx_rproc_partition_notify(struct notifier_block *nb,
821 				      unsigned long event, void *group)
822 {
823 	struct imx_rproc *priv = container_of(nb, struct imx_rproc, rproc_nb);
824 
825 	/* Ignore other irqs */
826 	if (!((event & BIT(priv->rproc_pt)) && (*(u8 *)group == IMX_SC_IRQ_GROUP_REBOOTED)))
827 		return 0;
828 
829 	rproc_report_crash(priv->rproc, RPROC_WATCHDOG);
830 
831 	pr_info("Partition%d reset!\n", priv->rproc_pt);
832 
833 	return 0;
834 }
835 
836 static int imx_rproc_attach_pd(struct imx_rproc *priv)
837 {
838 	struct device *dev = priv->dev;
839 	int ret, i;
840 
841 	/*
842 	 * If there is only one power-domain entry, the platform driver framework
843 	 * will handle it, no need handle it in this driver.
844 	 */
845 	priv->num_pd = of_count_phandle_with_args(dev->of_node, "power-domains",
846 						  "#power-domain-cells");
847 	if (priv->num_pd <= 1)
848 		return 0;
849 
850 	priv->pd_dev = devm_kmalloc_array(dev, priv->num_pd, sizeof(*priv->pd_dev), GFP_KERNEL);
851 	if (!priv->pd_dev)
852 		return -ENOMEM;
853 
854 	priv->pd_dev_link = devm_kmalloc_array(dev, priv->num_pd, sizeof(*priv->pd_dev_link),
855 					       GFP_KERNEL);
856 
857 	if (!priv->pd_dev_link)
858 		return -ENOMEM;
859 
860 	for (i = 0; i < priv->num_pd; i++) {
861 		priv->pd_dev[i] = dev_pm_domain_attach_by_id(dev, i);
862 		if (IS_ERR(priv->pd_dev[i])) {
863 			ret = PTR_ERR(priv->pd_dev[i]);
864 			goto detach_pd;
865 		}
866 
867 		priv->pd_dev_link[i] = device_link_add(dev, priv->pd_dev[i], DL_FLAG_STATELESS |
868 						       DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
869 		if (!priv->pd_dev_link[i]) {
870 			dev_pm_domain_detach(priv->pd_dev[i], false);
871 			ret = -EINVAL;
872 			goto detach_pd;
873 		}
874 	}
875 
876 	return 0;
877 
878 detach_pd:
879 	while (--i >= 0) {
880 		device_link_del(priv->pd_dev_link[i]);
881 		dev_pm_domain_detach(priv->pd_dev[i], false);
882 	}
883 
884 	return ret;
885 }
886 
887 static int imx_rproc_detach_pd(struct rproc *rproc)
888 {
889 	struct imx_rproc *priv = rproc->priv;
890 	int i;
891 
892 	/*
893 	 * If there is only one power-domain entry, the platform driver framework
894 	 * will handle it, no need handle it in this driver.
895 	 */
896 	if (priv->num_pd <= 1)
897 		return 0;
898 
899 	for (i = 0; i < priv->num_pd; i++) {
900 		device_link_del(priv->pd_dev_link[i]);
901 		dev_pm_domain_detach(priv->pd_dev[i], false);
902 	}
903 
904 	return 0;
905 }
906 
907 static int imx_rproc_detect_mode(struct imx_rproc *priv)
908 {
909 	struct regmap_config config = { .name = "imx-rproc" };
910 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
911 	struct device *dev = priv->dev;
912 	struct regmap *regmap;
913 	struct arm_smccc_res res;
914 	int ret;
915 	u32 val;
916 	u8 pt;
917 
918 	switch (dcfg->method) {
919 	case IMX_RPROC_NONE:
920 		priv->rproc->state = RPROC_DETACHED;
921 		return 0;
922 	case IMX_RPROC_SMC:
923 		arm_smccc_smc(IMX_SIP_RPROC, IMX_SIP_RPROC_STARTED, 0, 0, 0, 0, 0, 0, &res);
924 		if (res.a0)
925 			priv->rproc->state = RPROC_DETACHED;
926 		return 0;
927 	case IMX_RPROC_SCU_API:
928 		ret = imx_scu_get_handle(&priv->ipc_handle);
929 		if (ret)
930 			return ret;
931 		ret = of_property_read_u32(dev->of_node, "fsl,resource-id", &priv->rsrc_id);
932 		if (ret) {
933 			dev_err(dev, "No fsl,resource-id property\n");
934 			return ret;
935 		}
936 
937 		if (priv->rsrc_id == IMX_SC_R_M4_1_PID0)
938 			priv->core_index = 1;
939 		else
940 			priv->core_index = 0;
941 
942 		/*
943 		 * If Mcore resource is not owned by Acore partition, It is kicked by ROM,
944 		 * and Linux could only do IPC with Mcore and nothing else.
945 		 */
946 		if (imx_sc_rm_is_resource_owned(priv->ipc_handle, priv->rsrc_id)) {
947 			if (of_property_read_u32(dev->of_node, "fsl,entry-address", &priv->entry))
948 				return -EINVAL;
949 
950 			return imx_rproc_attach_pd(priv);
951 		}
952 
953 		priv->rproc->state = RPROC_DETACHED;
954 		priv->rproc->recovery_disabled = false;
955 		rproc_set_feature(priv->rproc, RPROC_FEAT_ATTACH_ON_RECOVERY);
956 
957 		/* Get partition id and enable irq in SCFW */
958 		ret = imx_sc_rm_get_resource_owner(priv->ipc_handle, priv->rsrc_id, &pt);
959 		if (ret) {
960 			dev_err(dev, "not able to get resource owner\n");
961 			return ret;
962 		}
963 
964 		priv->rproc_pt = pt;
965 		priv->rproc_nb.notifier_call = imx_rproc_partition_notify;
966 
967 		ret = imx_scu_irq_register_notifier(&priv->rproc_nb);
968 		if (ret) {
969 			dev_err(dev, "register scu notifier failed, %d\n", ret);
970 			return ret;
971 		}
972 
973 		ret = imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_REBOOTED, BIT(priv->rproc_pt),
974 					       true);
975 		if (ret) {
976 			imx_scu_irq_unregister_notifier(&priv->rproc_nb);
977 			dev_err(dev, "Enable irq failed, %d\n", ret);
978 			return ret;
979 		}
980 
981 		return 0;
982 	default:
983 		break;
984 	}
985 
986 	regmap = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon");
987 	if (IS_ERR(regmap)) {
988 		dev_err(dev, "failed to find syscon\n");
989 		return PTR_ERR(regmap);
990 	}
991 
992 	priv->regmap = regmap;
993 	regmap_attach_dev(dev, regmap, &config);
994 
995 	ret = regmap_read(regmap, dcfg->src_reg, &val);
996 	if (ret) {
997 		dev_err(dev, "Failed to read src\n");
998 		return ret;
999 	}
1000 
1001 	if ((val & dcfg->src_mask) != dcfg->src_stop)
1002 		priv->rproc->state = RPROC_DETACHED;
1003 
1004 	return 0;
1005 }
1006 
1007 static int imx_rproc_clk_enable(struct imx_rproc *priv)
1008 {
1009 	const struct imx_rproc_dcfg *dcfg = priv->dcfg;
1010 	struct device *dev = priv->dev;
1011 	int ret;
1012 
1013 	/* Remote core is not under control of Linux */
1014 	if (dcfg->method == IMX_RPROC_NONE)
1015 		return 0;
1016 
1017 	priv->clk = devm_clk_get(dev, NULL);
1018 	if (IS_ERR(priv->clk)) {
1019 		dev_err(dev, "Failed to get clock\n");
1020 		return PTR_ERR(priv->clk);
1021 	}
1022 
1023 	/*
1024 	 * clk for M4 block including memory. Should be
1025 	 * enabled before .start for FW transfer.
1026 	 */
1027 	ret = clk_prepare_enable(priv->clk);
1028 	if (ret) {
1029 		dev_err(dev, "Failed to enable clock\n");
1030 		return ret;
1031 	}
1032 
1033 	return 0;
1034 }
1035 
1036 static int imx_rproc_probe(struct platform_device *pdev)
1037 {
1038 	struct device *dev = &pdev->dev;
1039 	struct device_node *np = dev->of_node;
1040 	struct imx_rproc *priv;
1041 	struct rproc *rproc;
1042 	const struct imx_rproc_dcfg *dcfg;
1043 	int ret;
1044 
1045 	/* set some other name then imx */
1046 	rproc = rproc_alloc(dev, "imx-rproc", &imx_rproc_ops,
1047 			    NULL, sizeof(*priv));
1048 	if (!rproc)
1049 		return -ENOMEM;
1050 
1051 	dcfg = of_device_get_match_data(dev);
1052 	if (!dcfg) {
1053 		ret = -EINVAL;
1054 		goto err_put_rproc;
1055 	}
1056 
1057 	priv = rproc->priv;
1058 	priv->rproc = rproc;
1059 	priv->dcfg = dcfg;
1060 	priv->dev = dev;
1061 
1062 	dev_set_drvdata(dev, rproc);
1063 	priv->workqueue = create_workqueue(dev_name(dev));
1064 	if (!priv->workqueue) {
1065 		dev_err(dev, "cannot create workqueue\n");
1066 		ret = -ENOMEM;
1067 		goto err_put_rproc;
1068 	}
1069 
1070 	ret = imx_rproc_xtr_mbox_init(rproc);
1071 	if (ret)
1072 		goto err_put_wkq;
1073 
1074 	ret = imx_rproc_addr_init(priv, pdev);
1075 	if (ret) {
1076 		dev_err(dev, "failed on imx_rproc_addr_init\n");
1077 		goto err_put_mbox;
1078 	}
1079 
1080 	ret = imx_rproc_detect_mode(priv);
1081 	if (ret)
1082 		goto err_put_mbox;
1083 
1084 	ret = imx_rproc_clk_enable(priv);
1085 	if (ret)
1086 		goto err_put_scu;
1087 
1088 	INIT_WORK(&priv->rproc_work, imx_rproc_vq_work);
1089 
1090 	if (rproc->state != RPROC_DETACHED)
1091 		rproc->auto_boot = of_property_read_bool(np, "fsl,auto-boot");
1092 
1093 	ret = rproc_add(rproc);
1094 	if (ret) {
1095 		dev_err(dev, "rproc_add failed\n");
1096 		goto err_put_clk;
1097 	}
1098 
1099 	return 0;
1100 
1101 err_put_clk:
1102 	clk_disable_unprepare(priv->clk);
1103 err_put_scu:
1104 	imx_rproc_put_scu(rproc);
1105 err_put_mbox:
1106 	imx_rproc_free_mbox(rproc);
1107 err_put_wkq:
1108 	destroy_workqueue(priv->workqueue);
1109 err_put_rproc:
1110 	rproc_free(rproc);
1111 
1112 	return ret;
1113 }
1114 
1115 static void imx_rproc_remove(struct platform_device *pdev)
1116 {
1117 	struct rproc *rproc = platform_get_drvdata(pdev);
1118 	struct imx_rproc *priv = rproc->priv;
1119 
1120 	clk_disable_unprepare(priv->clk);
1121 	rproc_del(rproc);
1122 	imx_rproc_put_scu(rproc);
1123 	imx_rproc_free_mbox(rproc);
1124 	destroy_workqueue(priv->workqueue);
1125 	rproc_free(rproc);
1126 }
1127 
1128 static const struct of_device_id imx_rproc_of_match[] = {
1129 	{ .compatible = "fsl,imx7ulp-cm4", .data = &imx_rproc_cfg_imx7ulp },
1130 	{ .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d },
1131 	{ .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx },
1132 	{ .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq },
1133 	{ .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq },
1134 	{ .compatible = "fsl,imx8mn-cm7", .data = &imx_rproc_cfg_imx8mn },
1135 	{ .compatible = "fsl,imx8mp-cm7", .data = &imx_rproc_cfg_imx8mn },
1136 	{ .compatible = "fsl,imx8qxp-cm4", .data = &imx_rproc_cfg_imx8qxp },
1137 	{ .compatible = "fsl,imx8qm-cm4", .data = &imx_rproc_cfg_imx8qm },
1138 	{ .compatible = "fsl,imx8ulp-cm33", .data = &imx_rproc_cfg_imx8ulp },
1139 	{ .compatible = "fsl,imx93-cm33", .data = &imx_rproc_cfg_imx93 },
1140 	{},
1141 };
1142 MODULE_DEVICE_TABLE(of, imx_rproc_of_match);
1143 
1144 static struct platform_driver imx_rproc_driver = {
1145 	.probe = imx_rproc_probe,
1146 	.remove_new = imx_rproc_remove,
1147 	.driver = {
1148 		.name = "imx-rproc",
1149 		.of_match_table = imx_rproc_of_match,
1150 	},
1151 };
1152 
1153 module_platform_driver(imx_rproc_driver);
1154 
1155 MODULE_LICENSE("GPL v2");
1156 MODULE_DESCRIPTION("i.MX remote processor control driver");
1157 MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>");
1158