1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2017 Pengutronix, Oleksij Rempel <kernel@pengutronix.de> 4 */ 5 6 #include <linux/clk.h> 7 #include <linux/err.h> 8 #include <linux/interrupt.h> 9 #include <linux/kernel.h> 10 #include <linux/mailbox_client.h> 11 #include <linux/mfd/syscon.h> 12 #include <linux/module.h> 13 #include <linux/of_address.h> 14 #include <linux/of_reserved_mem.h> 15 #include <linux/of_device.h> 16 #include <linux/platform_device.h> 17 #include <linux/regmap.h> 18 #include <linux/remoteproc.h> 19 #include <linux/workqueue.h> 20 21 #include "remoteproc_internal.h" 22 23 #define IMX7D_SRC_SCR 0x0C 24 #define IMX7D_ENABLE_M4 BIT(3) 25 #define IMX7D_SW_M4P_RST BIT(2) 26 #define IMX7D_SW_M4C_RST BIT(1) 27 #define IMX7D_SW_M4C_NON_SCLR_RST BIT(0) 28 29 #define IMX7D_M4_RST_MASK (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \ 30 | IMX7D_SW_M4C_RST \ 31 | IMX7D_SW_M4C_NON_SCLR_RST) 32 33 #define IMX7D_M4_START (IMX7D_ENABLE_M4 | IMX7D_SW_M4P_RST \ 34 | IMX7D_SW_M4C_RST) 35 #define IMX7D_M4_STOP IMX7D_SW_M4C_NON_SCLR_RST 36 37 /* Address: 0x020D8000 */ 38 #define IMX6SX_SRC_SCR 0x00 39 #define IMX6SX_ENABLE_M4 BIT(22) 40 #define IMX6SX_SW_M4P_RST BIT(12) 41 #define IMX6SX_SW_M4C_NON_SCLR_RST BIT(4) 42 #define IMX6SX_SW_M4C_RST BIT(3) 43 44 #define IMX6SX_M4_START (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \ 45 | IMX6SX_SW_M4C_RST) 46 #define IMX6SX_M4_STOP IMX6SX_SW_M4C_NON_SCLR_RST 47 #define IMX6SX_M4_RST_MASK (IMX6SX_ENABLE_M4 | IMX6SX_SW_M4P_RST \ 48 | IMX6SX_SW_M4C_NON_SCLR_RST \ 49 | IMX6SX_SW_M4C_RST) 50 51 #define IMX_RPROC_MEM_MAX 32 52 53 /** 54 * struct imx_rproc_mem - slim internal memory structure 55 * @cpu_addr: MPU virtual address of the memory region 56 * @sys_addr: Bus address used to access the memory region 57 * @size: Size of the memory region 58 */ 59 struct imx_rproc_mem { 60 void __iomem *cpu_addr; 61 phys_addr_t sys_addr; 62 size_t size; 63 }; 64 65 /* att flags */ 66 /* M4 own area. Can be mapped at probe */ 67 #define ATT_OWN BIT(1) 68 69 /* address translation table */ 70 struct imx_rproc_att { 71 u32 da; /* device address (From Cortex M4 view)*/ 72 u32 sa; /* system bus address */ 73 u32 size; /* size of reg range */ 74 int flags; 75 }; 76 77 struct imx_rproc_dcfg { 78 u32 src_reg; 79 u32 src_mask; 80 u32 src_start; 81 u32 src_stop; 82 const struct imx_rproc_att *att; 83 size_t att_size; 84 }; 85 86 struct imx_rproc { 87 struct device *dev; 88 struct regmap *regmap; 89 struct rproc *rproc; 90 const struct imx_rproc_dcfg *dcfg; 91 struct imx_rproc_mem mem[IMX_RPROC_MEM_MAX]; 92 struct clk *clk; 93 struct mbox_client cl; 94 struct mbox_chan *tx_ch; 95 struct mbox_chan *rx_ch; 96 struct work_struct rproc_work; 97 struct workqueue_struct *workqueue; 98 void __iomem *rsc_table; 99 }; 100 101 static const struct imx_rproc_att imx_rproc_att_imx8mq[] = { 102 /* dev addr , sys addr , size , flags */ 103 /* TCML - alias */ 104 { 0x00000000, 0x007e0000, 0x00020000, 0 }, 105 /* OCRAM_S */ 106 { 0x00180000, 0x00180000, 0x00008000, 0 }, 107 /* OCRAM */ 108 { 0x00900000, 0x00900000, 0x00020000, 0 }, 109 /* OCRAM */ 110 { 0x00920000, 0x00920000, 0x00020000, 0 }, 111 /* QSPI Code - alias */ 112 { 0x08000000, 0x08000000, 0x08000000, 0 }, 113 /* DDR (Code) - alias */ 114 { 0x10000000, 0x80000000, 0x0FFE0000, 0 }, 115 /* TCML */ 116 { 0x1FFE0000, 0x007E0000, 0x00020000, ATT_OWN }, 117 /* TCMU */ 118 { 0x20000000, 0x00800000, 0x00020000, ATT_OWN }, 119 /* OCRAM_S */ 120 { 0x20180000, 0x00180000, 0x00008000, ATT_OWN }, 121 /* OCRAM */ 122 { 0x20200000, 0x00900000, 0x00020000, ATT_OWN }, 123 /* OCRAM */ 124 { 0x20220000, 0x00920000, 0x00020000, ATT_OWN }, 125 /* DDR (Data) */ 126 { 0x40000000, 0x40000000, 0x80000000, 0 }, 127 }; 128 129 static const struct imx_rproc_att imx_rproc_att_imx7d[] = { 130 /* dev addr , sys addr , size , flags */ 131 /* OCRAM_S (M4 Boot code) - alias */ 132 { 0x00000000, 0x00180000, 0x00008000, 0 }, 133 /* OCRAM_S (Code) */ 134 { 0x00180000, 0x00180000, 0x00008000, ATT_OWN }, 135 /* OCRAM (Code) - alias */ 136 { 0x00900000, 0x00900000, 0x00020000, 0 }, 137 /* OCRAM_EPDC (Code) - alias */ 138 { 0x00920000, 0x00920000, 0x00020000, 0 }, 139 /* OCRAM_PXP (Code) - alias */ 140 { 0x00940000, 0x00940000, 0x00008000, 0 }, 141 /* TCML (Code) */ 142 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN }, 143 /* DDR (Code) - alias, first part of DDR (Data) */ 144 { 0x10000000, 0x80000000, 0x0FFF0000, 0 }, 145 146 /* TCMU (Data) */ 147 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN }, 148 /* OCRAM (Data) */ 149 { 0x20200000, 0x00900000, 0x00020000, 0 }, 150 /* OCRAM_EPDC (Data) */ 151 { 0x20220000, 0x00920000, 0x00020000, 0 }, 152 /* OCRAM_PXP (Data) */ 153 { 0x20240000, 0x00940000, 0x00008000, 0 }, 154 /* DDR (Data) */ 155 { 0x80000000, 0x80000000, 0x60000000, 0 }, 156 }; 157 158 static const struct imx_rproc_att imx_rproc_att_imx6sx[] = { 159 /* dev addr , sys addr , size , flags */ 160 /* TCML (M4 Boot Code) - alias */ 161 { 0x00000000, 0x007F8000, 0x00008000, 0 }, 162 /* OCRAM_S (Code) */ 163 { 0x00180000, 0x008F8000, 0x00004000, 0 }, 164 /* OCRAM_S (Code) - alias */ 165 { 0x00180000, 0x008FC000, 0x00004000, 0 }, 166 /* TCML (Code) */ 167 { 0x1FFF8000, 0x007F8000, 0x00008000, ATT_OWN }, 168 /* DDR (Code) - alias, first part of DDR (Data) */ 169 { 0x10000000, 0x80000000, 0x0FFF8000, 0 }, 170 171 /* TCMU (Data) */ 172 { 0x20000000, 0x00800000, 0x00008000, ATT_OWN }, 173 /* OCRAM_S (Data) - alias? */ 174 { 0x208F8000, 0x008F8000, 0x00004000, 0 }, 175 /* DDR (Data) */ 176 { 0x80000000, 0x80000000, 0x60000000, 0 }, 177 }; 178 179 static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = { 180 .src_reg = IMX7D_SRC_SCR, 181 .src_mask = IMX7D_M4_RST_MASK, 182 .src_start = IMX7D_M4_START, 183 .src_stop = IMX7D_M4_STOP, 184 .att = imx_rproc_att_imx8mq, 185 .att_size = ARRAY_SIZE(imx_rproc_att_imx8mq), 186 }; 187 188 static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = { 189 .src_reg = IMX7D_SRC_SCR, 190 .src_mask = IMX7D_M4_RST_MASK, 191 .src_start = IMX7D_M4_START, 192 .src_stop = IMX7D_M4_STOP, 193 .att = imx_rproc_att_imx7d, 194 .att_size = ARRAY_SIZE(imx_rproc_att_imx7d), 195 }; 196 197 static const struct imx_rproc_dcfg imx_rproc_cfg_imx6sx = { 198 .src_reg = IMX6SX_SRC_SCR, 199 .src_mask = IMX6SX_M4_RST_MASK, 200 .src_start = IMX6SX_M4_START, 201 .src_stop = IMX6SX_M4_STOP, 202 .att = imx_rproc_att_imx6sx, 203 .att_size = ARRAY_SIZE(imx_rproc_att_imx6sx), 204 }; 205 206 static int imx_rproc_start(struct rproc *rproc) 207 { 208 struct imx_rproc *priv = rproc->priv; 209 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 210 struct device *dev = priv->dev; 211 int ret; 212 213 ret = regmap_update_bits(priv->regmap, dcfg->src_reg, 214 dcfg->src_mask, dcfg->src_start); 215 if (ret) 216 dev_err(dev, "Failed to enable M4!\n"); 217 218 return ret; 219 } 220 221 static int imx_rproc_stop(struct rproc *rproc) 222 { 223 struct imx_rproc *priv = rproc->priv; 224 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 225 struct device *dev = priv->dev; 226 int ret; 227 228 ret = regmap_update_bits(priv->regmap, dcfg->src_reg, 229 dcfg->src_mask, dcfg->src_stop); 230 if (ret) 231 dev_err(dev, "Failed to stop M4!\n"); 232 233 return ret; 234 } 235 236 static int imx_rproc_da_to_sys(struct imx_rproc *priv, u64 da, 237 size_t len, u64 *sys) 238 { 239 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 240 int i; 241 242 /* parse address translation table */ 243 for (i = 0; i < dcfg->att_size; i++) { 244 const struct imx_rproc_att *att = &dcfg->att[i]; 245 246 if (da >= att->da && da + len < att->da + att->size) { 247 unsigned int offset = da - att->da; 248 249 *sys = att->sa + offset; 250 return 0; 251 } 252 } 253 254 dev_warn(priv->dev, "Translation failed: da = 0x%llx len = 0x%zx\n", 255 da, len); 256 return -ENOENT; 257 } 258 259 static void *imx_rproc_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 260 { 261 struct imx_rproc *priv = rproc->priv; 262 void *va = NULL; 263 u64 sys; 264 int i; 265 266 if (len == 0) 267 return NULL; 268 269 /* 270 * On device side we have many aliases, so we need to convert device 271 * address (M4) to system bus address first. 272 */ 273 if (imx_rproc_da_to_sys(priv, da, len, &sys)) 274 return NULL; 275 276 for (i = 0; i < IMX_RPROC_MEM_MAX; i++) { 277 if (sys >= priv->mem[i].sys_addr && sys + len < 278 priv->mem[i].sys_addr + priv->mem[i].size) { 279 unsigned int offset = sys - priv->mem[i].sys_addr; 280 /* __force to make sparse happy with type conversion */ 281 va = (__force void *)(priv->mem[i].cpu_addr + offset); 282 break; 283 } 284 } 285 286 dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%zx va = 0x%p\n", 287 da, len, va); 288 289 return va; 290 } 291 292 static int imx_rproc_mem_alloc(struct rproc *rproc, 293 struct rproc_mem_entry *mem) 294 { 295 struct device *dev = rproc->dev.parent; 296 void *va; 297 298 dev_dbg(dev, "map memory: %p+%zx\n", &mem->dma, mem->len); 299 va = ioremap_wc(mem->dma, mem->len); 300 if (IS_ERR_OR_NULL(va)) { 301 dev_err(dev, "Unable to map memory region: %p+%zx\n", 302 &mem->dma, mem->len); 303 return -ENOMEM; 304 } 305 306 /* Update memory entry va */ 307 mem->va = va; 308 309 return 0; 310 } 311 312 static int imx_rproc_mem_release(struct rproc *rproc, 313 struct rproc_mem_entry *mem) 314 { 315 dev_dbg(rproc->dev.parent, "unmap memory: %pa\n", &mem->dma); 316 iounmap(mem->va); 317 318 return 0; 319 } 320 321 static int imx_rproc_prepare(struct rproc *rproc) 322 { 323 struct imx_rproc *priv = rproc->priv; 324 struct device_node *np = priv->dev->of_node; 325 struct of_phandle_iterator it; 326 struct rproc_mem_entry *mem; 327 struct reserved_mem *rmem; 328 u32 da; 329 330 /* Register associated reserved memory regions */ 331 of_phandle_iterator_init(&it, np, "memory-region", NULL, 0); 332 while (of_phandle_iterator_next(&it) == 0) { 333 /* 334 * Ignore the first memory region which will be used vdev buffer. 335 * No need to do extra handlings, rproc_add_virtio_dev will handle it. 336 */ 337 if (!strcmp(it.node->name, "vdev0buffer")) 338 continue; 339 340 rmem = of_reserved_mem_lookup(it.node); 341 if (!rmem) { 342 dev_err(priv->dev, "unable to acquire memory-region\n"); 343 return -EINVAL; 344 } 345 346 /* No need to translate pa to da, i.MX use same map */ 347 da = rmem->base; 348 349 /* Register memory region */ 350 mem = rproc_mem_entry_init(priv->dev, NULL, (dma_addr_t)rmem->base, rmem->size, da, 351 imx_rproc_mem_alloc, imx_rproc_mem_release, 352 it.node->name); 353 354 if (mem) 355 rproc_coredump_add_segment(rproc, da, rmem->size); 356 else 357 return -ENOMEM; 358 359 rproc_add_carveout(rproc, mem); 360 } 361 362 return 0; 363 } 364 365 static int imx_rproc_parse_fw(struct rproc *rproc, const struct firmware *fw) 366 { 367 int ret; 368 369 ret = rproc_elf_load_rsc_table(rproc, fw); 370 if (ret) 371 dev_info(&rproc->dev, "No resource table in elf\n"); 372 373 return 0; 374 } 375 376 static void imx_rproc_kick(struct rproc *rproc, int vqid) 377 { 378 struct imx_rproc *priv = rproc->priv; 379 int err; 380 __u32 mmsg; 381 382 if (!priv->tx_ch) { 383 dev_err(priv->dev, "No initialized mbox tx channel\n"); 384 return; 385 } 386 387 /* 388 * Send the index of the triggered virtqueue as the mu payload. 389 * Let remote processor know which virtqueue is used. 390 */ 391 mmsg = vqid << 16; 392 393 err = mbox_send_message(priv->tx_ch, (void *)&mmsg); 394 if (err < 0) 395 dev_err(priv->dev, "%s: failed (%d, err:%d)\n", 396 __func__, vqid, err); 397 } 398 399 static int imx_rproc_attach(struct rproc *rproc) 400 { 401 return 0; 402 } 403 404 static struct resource_table *imx_rproc_get_loaded_rsc_table(struct rproc *rproc, size_t *table_sz) 405 { 406 struct imx_rproc *priv = rproc->priv; 407 408 /* The resource table has already been mapped in imx_rproc_addr_init */ 409 if (!priv->rsc_table) 410 return NULL; 411 412 *table_sz = SZ_1K; 413 return (struct resource_table *)priv->rsc_table; 414 } 415 416 static const struct rproc_ops imx_rproc_ops = { 417 .prepare = imx_rproc_prepare, 418 .attach = imx_rproc_attach, 419 .start = imx_rproc_start, 420 .stop = imx_rproc_stop, 421 .kick = imx_rproc_kick, 422 .da_to_va = imx_rproc_da_to_va, 423 .load = rproc_elf_load_segments, 424 .parse_fw = imx_rproc_parse_fw, 425 .find_loaded_rsc_table = rproc_elf_find_loaded_rsc_table, 426 .get_loaded_rsc_table = imx_rproc_get_loaded_rsc_table, 427 .sanity_check = rproc_elf_sanity_check, 428 .get_boot_addr = rproc_elf_get_boot_addr, 429 }; 430 431 static int imx_rproc_addr_init(struct imx_rproc *priv, 432 struct platform_device *pdev) 433 { 434 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 435 struct device *dev = &pdev->dev; 436 struct device_node *np = dev->of_node; 437 int a, b = 0, err, nph; 438 439 /* remap required addresses */ 440 for (a = 0; a < dcfg->att_size; a++) { 441 const struct imx_rproc_att *att = &dcfg->att[a]; 442 443 if (!(att->flags & ATT_OWN)) 444 continue; 445 446 if (b >= IMX_RPROC_MEM_MAX) 447 break; 448 449 priv->mem[b].cpu_addr = devm_ioremap(&pdev->dev, 450 att->sa, att->size); 451 if (!priv->mem[b].cpu_addr) { 452 dev_err(dev, "failed to remap %#x bytes from %#x\n", att->size, att->sa); 453 return -ENOMEM; 454 } 455 priv->mem[b].sys_addr = att->sa; 456 priv->mem[b].size = att->size; 457 b++; 458 } 459 460 /* memory-region is optional property */ 461 nph = of_count_phandle_with_args(np, "memory-region", NULL); 462 if (nph <= 0) 463 return 0; 464 465 /* remap optional addresses */ 466 for (a = 0; a < nph; a++) { 467 struct device_node *node; 468 struct resource res; 469 470 node = of_parse_phandle(np, "memory-region", a); 471 /* Not map vdev region */ 472 if (!strcmp(node->name, "vdev")) 473 continue; 474 err = of_address_to_resource(node, 0, &res); 475 if (err) { 476 dev_err(dev, "unable to resolve memory region\n"); 477 return err; 478 } 479 480 of_node_put(node); 481 482 if (b >= IMX_RPROC_MEM_MAX) 483 break; 484 485 /* Not use resource version, because we might share region */ 486 priv->mem[b].cpu_addr = devm_ioremap(&pdev->dev, res.start, resource_size(&res)); 487 if (!priv->mem[b].cpu_addr) { 488 dev_err(dev, "failed to remap %pr\n", &res); 489 return -ENOMEM; 490 } 491 priv->mem[b].sys_addr = res.start; 492 priv->mem[b].size = resource_size(&res); 493 if (!strcmp(node->name, "rsc_table")) 494 priv->rsc_table = priv->mem[b].cpu_addr; 495 b++; 496 } 497 498 return 0; 499 } 500 501 static void imx_rproc_vq_work(struct work_struct *work) 502 { 503 struct imx_rproc *priv = container_of(work, struct imx_rproc, 504 rproc_work); 505 506 rproc_vq_interrupt(priv->rproc, 0); 507 rproc_vq_interrupt(priv->rproc, 1); 508 } 509 510 static void imx_rproc_rx_callback(struct mbox_client *cl, void *msg) 511 { 512 struct rproc *rproc = dev_get_drvdata(cl->dev); 513 struct imx_rproc *priv = rproc->priv; 514 515 queue_work(priv->workqueue, &priv->rproc_work); 516 } 517 518 static int imx_rproc_xtr_mbox_init(struct rproc *rproc) 519 { 520 struct imx_rproc *priv = rproc->priv; 521 struct device *dev = priv->dev; 522 struct mbox_client *cl; 523 int ret; 524 525 if (!of_get_property(dev->of_node, "mbox-names", NULL)) 526 return 0; 527 528 cl = &priv->cl; 529 cl->dev = dev; 530 cl->tx_block = true; 531 cl->tx_tout = 100; 532 cl->knows_txdone = false; 533 cl->rx_callback = imx_rproc_rx_callback; 534 535 priv->tx_ch = mbox_request_channel_byname(cl, "tx"); 536 if (IS_ERR(priv->tx_ch)) { 537 ret = PTR_ERR(priv->tx_ch); 538 return dev_err_probe(cl->dev, ret, 539 "failed to request tx mailbox channel: %d\n", ret); 540 } 541 542 priv->rx_ch = mbox_request_channel_byname(cl, "rx"); 543 if (IS_ERR(priv->rx_ch)) { 544 mbox_free_channel(priv->tx_ch); 545 ret = PTR_ERR(priv->rx_ch); 546 return dev_err_probe(cl->dev, ret, 547 "failed to request rx mailbox channel: %d\n", ret); 548 } 549 550 return 0; 551 } 552 553 static void imx_rproc_free_mbox(struct rproc *rproc) 554 { 555 struct imx_rproc *priv = rproc->priv; 556 557 mbox_free_channel(priv->tx_ch); 558 mbox_free_channel(priv->rx_ch); 559 } 560 561 static int imx_rproc_detect_mode(struct imx_rproc *priv) 562 { 563 const struct imx_rproc_dcfg *dcfg = priv->dcfg; 564 struct device *dev = priv->dev; 565 int ret; 566 u32 val; 567 568 ret = regmap_read(priv->regmap, dcfg->src_reg, &val); 569 if (ret) { 570 dev_err(dev, "Failed to read src\n"); 571 return ret; 572 } 573 574 if (!(val & dcfg->src_stop)) 575 priv->rproc->state = RPROC_DETACHED; 576 577 return 0; 578 } 579 580 static int imx_rproc_probe(struct platform_device *pdev) 581 { 582 struct device *dev = &pdev->dev; 583 struct device_node *np = dev->of_node; 584 struct imx_rproc *priv; 585 struct rproc *rproc; 586 struct regmap_config config = { .name = "imx-rproc" }; 587 const struct imx_rproc_dcfg *dcfg; 588 struct regmap *regmap; 589 int ret; 590 591 regmap = syscon_regmap_lookup_by_phandle(np, "syscon"); 592 if (IS_ERR(regmap)) { 593 dev_err(dev, "failed to find syscon\n"); 594 return PTR_ERR(regmap); 595 } 596 regmap_attach_dev(dev, regmap, &config); 597 598 /* set some other name then imx */ 599 rproc = rproc_alloc(dev, "imx-rproc", &imx_rproc_ops, 600 NULL, sizeof(*priv)); 601 if (!rproc) 602 return -ENOMEM; 603 604 dcfg = of_device_get_match_data(dev); 605 if (!dcfg) { 606 ret = -EINVAL; 607 goto err_put_rproc; 608 } 609 610 priv = rproc->priv; 611 priv->rproc = rproc; 612 priv->regmap = regmap; 613 priv->dcfg = dcfg; 614 priv->dev = dev; 615 616 dev_set_drvdata(dev, rproc); 617 priv->workqueue = create_workqueue(dev_name(dev)); 618 if (!priv->workqueue) { 619 dev_err(dev, "cannot create workqueue\n"); 620 ret = -ENOMEM; 621 goto err_put_rproc; 622 } 623 624 ret = imx_rproc_xtr_mbox_init(rproc); 625 if (ret) 626 goto err_put_wkq; 627 628 ret = imx_rproc_addr_init(priv, pdev); 629 if (ret) { 630 dev_err(dev, "failed on imx_rproc_addr_init\n"); 631 goto err_put_mbox; 632 } 633 634 ret = imx_rproc_detect_mode(priv); 635 if (ret) 636 goto err_put_mbox; 637 638 priv->clk = devm_clk_get(dev, NULL); 639 if (IS_ERR(priv->clk)) { 640 dev_err(dev, "Failed to get clock\n"); 641 ret = PTR_ERR(priv->clk); 642 goto err_put_mbox; 643 } 644 645 /* 646 * clk for M4 block including memory. Should be 647 * enabled before .start for FW transfer. 648 */ 649 ret = clk_prepare_enable(priv->clk); 650 if (ret) { 651 dev_err(&rproc->dev, "Failed to enable clock\n"); 652 goto err_put_mbox; 653 } 654 655 INIT_WORK(&priv->rproc_work, imx_rproc_vq_work); 656 657 ret = rproc_add(rproc); 658 if (ret) { 659 dev_err(dev, "rproc_add failed\n"); 660 goto err_put_clk; 661 } 662 663 return 0; 664 665 err_put_clk: 666 clk_disable_unprepare(priv->clk); 667 err_put_mbox: 668 imx_rproc_free_mbox(rproc); 669 err_put_wkq: 670 destroy_workqueue(priv->workqueue); 671 err_put_rproc: 672 rproc_free(rproc); 673 674 return ret; 675 } 676 677 static int imx_rproc_remove(struct platform_device *pdev) 678 { 679 struct rproc *rproc = platform_get_drvdata(pdev); 680 struct imx_rproc *priv = rproc->priv; 681 682 clk_disable_unprepare(priv->clk); 683 rproc_del(rproc); 684 imx_rproc_free_mbox(rproc); 685 rproc_free(rproc); 686 687 return 0; 688 } 689 690 static const struct of_device_id imx_rproc_of_match[] = { 691 { .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d }, 692 { .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx }, 693 { .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq }, 694 { .compatible = "fsl,imx8mm-cm4", .data = &imx_rproc_cfg_imx8mq }, 695 {}, 696 }; 697 MODULE_DEVICE_TABLE(of, imx_rproc_of_match); 698 699 static struct platform_driver imx_rproc_driver = { 700 .probe = imx_rproc_probe, 701 .remove = imx_rproc_remove, 702 .driver = { 703 .name = "imx-rproc", 704 .of_match_table = imx_rproc_of_match, 705 }, 706 }; 707 708 module_platform_driver(imx_rproc_driver); 709 710 MODULE_LICENSE("GPL v2"); 711 MODULE_DESCRIPTION("i.MX remote processor control driver"); 712 MODULE_AUTHOR("Oleksij Rempel <o.rempel@pengutronix.de>"); 713