1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Remote processor machine-specific module for DA8XX 4 * 5 * Copyright (C) 2013 Texas Instruments, Inc. 6 */ 7 8 #include <linux/bitops.h> 9 #include <linux/clk.h> 10 #include <linux/reset.h> 11 #include <linux/err.h> 12 #include <linux/interrupt.h> 13 #include <linux/io.h> 14 #include <linux/irq.h> 15 #include <linux/kernel.h> 16 #include <linux/module.h> 17 #include <linux/of_reserved_mem.h> 18 #include <linux/platform_device.h> 19 #include <linux/remoteproc.h> 20 21 #include "remoteproc_internal.h" 22 23 static char *da8xx_fw_name; 24 module_param(da8xx_fw_name, charp, 0444); 25 MODULE_PARM_DESC(da8xx_fw_name, 26 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')"); 27 28 /* 29 * OMAP-L138 Technical References: 30 * http://www.ti.com/product/omap-l138 31 */ 32 #define SYSCFG_CHIPSIG0 BIT(0) 33 #define SYSCFG_CHIPSIG1 BIT(1) 34 #define SYSCFG_CHIPSIG2 BIT(2) 35 #define SYSCFG_CHIPSIG3 BIT(3) 36 #define SYSCFG_CHIPSIG4 BIT(4) 37 38 #define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1) 39 40 /** 41 * struct da8xx_rproc_mem - internal memory structure 42 * @cpu_addr: MPU virtual address of the memory region 43 * @bus_addr: Bus address used to access the memory region 44 * @dev_addr: Device address of the memory region from DSP view 45 * @size: Size of the memory region 46 */ 47 struct da8xx_rproc_mem { 48 void __iomem *cpu_addr; 49 phys_addr_t bus_addr; 50 u32 dev_addr; 51 size_t size; 52 }; 53 54 /** 55 * struct da8xx_rproc - da8xx remote processor instance state 56 * @rproc: rproc handle 57 * @mem: internal memory regions data 58 * @num_mems: number of internal memory regions 59 * @dsp_clk: placeholder for platform's DSP clk 60 * @ack_fxn: chip-specific ack function for ack'ing irq 61 * @irq_data: ack_fxn function parameter 62 * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR) 63 * @bootreg: virt ptr to DSP boot address register (HOST1CFG) 64 * @irq: irq # used by this instance 65 */ 66 struct da8xx_rproc { 67 struct rproc *rproc; 68 struct da8xx_rproc_mem *mem; 69 int num_mems; 70 struct clk *dsp_clk; 71 struct reset_control *dsp_reset; 72 void (*ack_fxn)(struct irq_data *data); 73 struct irq_data *irq_data; 74 void __iomem *chipsig; 75 void __iomem *bootreg; 76 int irq; 77 }; 78 79 /** 80 * handle_event() - inbound virtqueue message workqueue function 81 * 82 * This function is registered as a kernel thread and is scheduled by the 83 * kernel handler. 84 */ 85 static irqreturn_t handle_event(int irq, void *p) 86 { 87 struct rproc *rproc = (struct rproc *)p; 88 89 /* Process incoming buffers on all our vrings */ 90 rproc_vq_interrupt(rproc, 0); 91 rproc_vq_interrupt(rproc, 1); 92 93 return IRQ_HANDLED; 94 } 95 96 /** 97 * da8xx_rproc_callback() - inbound virtqueue message handler 98 * 99 * This handler is invoked directly by the kernel whenever the remote 100 * core (DSP) has modified the state of a virtqueue. There is no 101 * "payload" message indicating the virtqueue index as is the case with 102 * mailbox-based implementations on OMAP4. As such, this handler "polls" 103 * each known virtqueue index for every invocation. 104 */ 105 static irqreturn_t da8xx_rproc_callback(int irq, void *p) 106 { 107 struct rproc *rproc = (struct rproc *)p; 108 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 109 u32 chipsig; 110 111 chipsig = readl(drproc->chipsig); 112 if (chipsig & SYSCFG_CHIPSIG0) { 113 /* Clear interrupt level source */ 114 writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4); 115 116 /* 117 * ACK intr to AINTC. 118 * 119 * It has already been ack'ed by the kernel before calling 120 * this function, but since the ARM<->DSP interrupts in the 121 * CHIPSIG register are "level" instead of "pulse" variety, 122 * we need to ack it after taking down the level else we'll 123 * be called again immediately after returning. 124 */ 125 drproc->ack_fxn(drproc->irq_data); 126 127 return IRQ_WAKE_THREAD; 128 } 129 130 return IRQ_HANDLED; 131 } 132 133 static int da8xx_rproc_start(struct rproc *rproc) 134 { 135 struct device *dev = rproc->dev.parent; 136 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 137 struct clk *dsp_clk = drproc->dsp_clk; 138 struct reset_control *dsp_reset = drproc->dsp_reset; 139 int ret; 140 141 /* hw requires the start (boot) address be on 1KB boundary */ 142 if (rproc->bootaddr & 0x3ff) { 143 dev_err(dev, "invalid boot address: must be aligned to 1KB\n"); 144 145 return -EINVAL; 146 } 147 148 writel(rproc->bootaddr, drproc->bootreg); 149 150 ret = clk_prepare_enable(dsp_clk); 151 if (ret) { 152 dev_err(dev, "clk_prepare_enable() failed: %d\n", ret); 153 return ret; 154 } 155 156 ret = reset_control_deassert(dsp_reset); 157 if (ret) { 158 dev_err(dev, "reset_control_deassert() failed: %d\n", ret); 159 clk_disable_unprepare(dsp_clk); 160 return ret; 161 } 162 163 return 0; 164 } 165 166 static int da8xx_rproc_stop(struct rproc *rproc) 167 { 168 struct da8xx_rproc *drproc = rproc->priv; 169 struct device *dev = rproc->dev.parent; 170 int ret; 171 172 ret = reset_control_assert(drproc->dsp_reset); 173 if (ret) { 174 dev_err(dev, "reset_control_assert() failed: %d\n", ret); 175 return ret; 176 } 177 178 clk_disable_unprepare(drproc->dsp_clk); 179 180 return 0; 181 } 182 183 /* kick a virtqueue */ 184 static void da8xx_rproc_kick(struct rproc *rproc, int vqid) 185 { 186 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 187 188 /* Interrupt remote proc */ 189 writel(SYSCFG_CHIPSIG2, drproc->chipsig); 190 } 191 192 static const struct rproc_ops da8xx_rproc_ops = { 193 .start = da8xx_rproc_start, 194 .stop = da8xx_rproc_stop, 195 .kick = da8xx_rproc_kick, 196 }; 197 198 static int da8xx_rproc_get_internal_memories(struct platform_device *pdev, 199 struct da8xx_rproc *drproc) 200 { 201 static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"}; 202 int num_mems = ARRAY_SIZE(mem_names); 203 struct device *dev = &pdev->dev; 204 struct resource *res; 205 int i; 206 207 drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem), 208 GFP_KERNEL); 209 if (!drproc->mem) 210 return -ENOMEM; 211 212 for (i = 0; i < num_mems; i++) { 213 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 214 mem_names[i]); 215 drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res); 216 if (IS_ERR(drproc->mem[i].cpu_addr)) { 217 dev_err(dev, "failed to parse and map %s memory\n", 218 mem_names[i]); 219 return PTR_ERR(drproc->mem[i].cpu_addr); 220 } 221 drproc->mem[i].bus_addr = res->start; 222 drproc->mem[i].dev_addr = 223 res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK; 224 drproc->mem[i].size = resource_size(res); 225 226 dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %p da 0x%x\n", 227 mem_names[i], &drproc->mem[i].bus_addr, 228 drproc->mem[i].size, drproc->mem[i].cpu_addr, 229 drproc->mem[i].dev_addr); 230 } 231 drproc->num_mems = num_mems; 232 233 return 0; 234 } 235 236 static int da8xx_rproc_probe(struct platform_device *pdev) 237 { 238 struct device *dev = &pdev->dev; 239 struct da8xx_rproc *drproc; 240 struct rproc *rproc; 241 struct irq_data *irq_data; 242 struct resource *bootreg_res; 243 struct resource *chipsig_res; 244 struct clk *dsp_clk; 245 struct reset_control *dsp_reset; 246 void __iomem *chipsig; 247 void __iomem *bootreg; 248 int irq; 249 int ret; 250 251 irq = platform_get_irq(pdev, 0); 252 if (irq < 0) 253 return irq; 254 255 irq_data = irq_get_irq_data(irq); 256 if (!irq_data) { 257 dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq); 258 return -EINVAL; 259 } 260 261 bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 262 "host1cfg"); 263 bootreg = devm_ioremap_resource(dev, bootreg_res); 264 if (IS_ERR(bootreg)) 265 return PTR_ERR(bootreg); 266 267 chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 268 "chipsig"); 269 chipsig = devm_ioremap_resource(dev, chipsig_res); 270 if (IS_ERR(chipsig)) 271 return PTR_ERR(chipsig); 272 273 dsp_clk = devm_clk_get(dev, NULL); 274 if (IS_ERR(dsp_clk)) { 275 dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk)); 276 277 return PTR_ERR(dsp_clk); 278 } 279 280 dsp_reset = devm_reset_control_get_exclusive(dev, NULL); 281 if (IS_ERR(dsp_reset)) { 282 if (PTR_ERR(dsp_reset) != -EPROBE_DEFER) 283 dev_err(dev, "unable to get reset control: %ld\n", 284 PTR_ERR(dsp_reset)); 285 286 return PTR_ERR(dsp_reset); 287 } 288 289 if (dev->of_node) { 290 ret = of_reserved_mem_device_init(dev); 291 if (ret) { 292 dev_err(dev, "device does not have specific CMA pool: %d\n", 293 ret); 294 return ret; 295 } 296 } 297 298 rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name, 299 sizeof(*drproc)); 300 if (!rproc) { 301 ret = -ENOMEM; 302 goto free_mem; 303 } 304 305 /* error recovery is not supported at present */ 306 rproc->recovery_disabled = true; 307 308 drproc = rproc->priv; 309 drproc->rproc = rproc; 310 drproc->dsp_clk = dsp_clk; 311 drproc->dsp_reset = dsp_reset; 312 rproc->has_iommu = false; 313 314 ret = da8xx_rproc_get_internal_memories(pdev, drproc); 315 if (ret) 316 goto free_rproc; 317 318 platform_set_drvdata(pdev, rproc); 319 320 /* everything the ISR needs is now setup, so hook it up */ 321 ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback, 322 handle_event, 0, "da8xx-remoteproc", 323 rproc); 324 if (ret) { 325 dev_err(dev, "devm_request_threaded_irq error: %d\n", ret); 326 goto free_rproc; 327 } 328 329 /* 330 * rproc_add() can end up enabling the DSP's clk with the DSP 331 * *not* in reset, but da8xx_rproc_start() needs the DSP to be 332 * held in reset at the time it is called. 333 */ 334 ret = reset_control_assert(dsp_reset); 335 if (ret) 336 goto free_rproc; 337 338 drproc->chipsig = chipsig; 339 drproc->bootreg = bootreg; 340 drproc->ack_fxn = irq_data->chip->irq_ack; 341 drproc->irq_data = irq_data; 342 drproc->irq = irq; 343 344 ret = rproc_add(rproc); 345 if (ret) { 346 dev_err(dev, "rproc_add failed: %d\n", ret); 347 goto free_rproc; 348 } 349 350 return 0; 351 352 free_rproc: 353 rproc_free(rproc); 354 free_mem: 355 if (dev->of_node) 356 of_reserved_mem_device_release(dev); 357 return ret; 358 } 359 360 static int da8xx_rproc_remove(struct platform_device *pdev) 361 { 362 struct rproc *rproc = platform_get_drvdata(pdev); 363 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 364 struct device *dev = &pdev->dev; 365 366 /* 367 * The devm subsystem might end up releasing things before 368 * freeing the irq, thus allowing an interrupt to sneak in while 369 * the device is being removed. This should prevent that. 370 */ 371 disable_irq(drproc->irq); 372 373 rproc_del(rproc); 374 rproc_free(rproc); 375 if (dev->of_node) 376 of_reserved_mem_device_release(dev); 377 378 return 0; 379 } 380 381 static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = { 382 { .compatible = "ti,da850-dsp", }, 383 { /* sentinel */ }, 384 }; 385 MODULE_DEVICE_TABLE(of, davinci_rproc_of_match); 386 387 static struct platform_driver da8xx_rproc_driver = { 388 .probe = da8xx_rproc_probe, 389 .remove = da8xx_rproc_remove, 390 .driver = { 391 .name = "davinci-rproc", 392 .of_match_table = of_match_ptr(davinci_rproc_of_match), 393 }, 394 }; 395 396 module_platform_driver(da8xx_rproc_driver); 397 398 MODULE_LICENSE("GPL v2"); 399 MODULE_DESCRIPTION("DA8XX Remote Processor control driver"); 400