1 /* 2 * Remote processor machine-specific module for DA8XX 3 * 4 * Copyright (C) 2013 Texas Instruments, Inc. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 */ 10 11 #include <linux/bitops.h> 12 #include <linux/clk.h> 13 #include <linux/err.h> 14 #include <linux/interrupt.h> 15 #include <linux/io.h> 16 #include <linux/irq.h> 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/remoteproc.h> 21 22 #include <mach/clock.h> /* for davinci_clk_reset_assert/deassert() */ 23 24 #include "remoteproc_internal.h" 25 26 static char *da8xx_fw_name; 27 module_param(da8xx_fw_name, charp, S_IRUGO); 28 MODULE_PARM_DESC(da8xx_fw_name, 29 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')"); 30 31 /* 32 * OMAP-L138 Technical References: 33 * http://www.ti.com/product/omap-l138 34 */ 35 #define SYSCFG_CHIPSIG0 BIT(0) 36 #define SYSCFG_CHIPSIG1 BIT(1) 37 #define SYSCFG_CHIPSIG2 BIT(2) 38 #define SYSCFG_CHIPSIG3 BIT(3) 39 #define SYSCFG_CHIPSIG4 BIT(4) 40 41 /** 42 * struct da8xx_rproc - da8xx remote processor instance state 43 * @rproc: rproc handle 44 * @dsp_clk: placeholder for platform's DSP clk 45 * @ack_fxn: chip-specific ack function for ack'ing irq 46 * @irq_data: ack_fxn function parameter 47 * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR) 48 * @bootreg: virt ptr to DSP boot address register (HOST1CFG) 49 * @irq: irq # used by this instance 50 */ 51 struct da8xx_rproc { 52 struct rproc *rproc; 53 struct clk *dsp_clk; 54 void (*ack_fxn)(struct irq_data *data); 55 struct irq_data *irq_data; 56 void __iomem *chipsig; 57 void __iomem *bootreg; 58 int irq; 59 }; 60 61 /** 62 * handle_event() - inbound virtqueue message workqueue function 63 * 64 * This function is registered as a kernel thread and is scheduled by the 65 * kernel handler. 66 */ 67 static irqreturn_t handle_event(int irq, void *p) 68 { 69 struct rproc *rproc = (struct rproc *)p; 70 71 /* Process incoming buffers on all our vrings */ 72 rproc_vq_interrupt(rproc, 0); 73 rproc_vq_interrupt(rproc, 1); 74 75 return IRQ_HANDLED; 76 } 77 78 /** 79 * da8xx_rproc_callback() - inbound virtqueue message handler 80 * 81 * This handler is invoked directly by the kernel whenever the remote 82 * core (DSP) has modified the state of a virtqueue. There is no 83 * "payload" message indicating the virtqueue index as is the case with 84 * mailbox-based implementations on OMAP4. As such, this handler "polls" 85 * each known virtqueue index for every invocation. 86 */ 87 static irqreturn_t da8xx_rproc_callback(int irq, void *p) 88 { 89 struct rproc *rproc = (struct rproc *)p; 90 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 91 u32 chipsig; 92 93 chipsig = readl(drproc->chipsig); 94 if (chipsig & SYSCFG_CHIPSIG0) { 95 /* Clear interrupt level source */ 96 writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4); 97 98 /* 99 * ACK intr to AINTC. 100 * 101 * It has already been ack'ed by the kernel before calling 102 * this function, but since the ARM<->DSP interrupts in the 103 * CHIPSIG register are "level" instead of "pulse" variety, 104 * we need to ack it after taking down the level else we'll 105 * be called again immediately after returning. 106 */ 107 drproc->ack_fxn(drproc->irq_data); 108 109 return IRQ_WAKE_THREAD; 110 } 111 112 return IRQ_HANDLED; 113 } 114 115 static int da8xx_rproc_start(struct rproc *rproc) 116 { 117 struct device *dev = rproc->dev.parent; 118 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 119 struct clk *dsp_clk = drproc->dsp_clk; 120 121 /* hw requires the start (boot) address be on 1KB boundary */ 122 if (rproc->bootaddr & 0x3ff) { 123 dev_err(dev, "invalid boot address: must be aligned to 1KB\n"); 124 125 return -EINVAL; 126 } 127 128 writel(rproc->bootaddr, drproc->bootreg); 129 130 clk_enable(dsp_clk); 131 davinci_clk_reset_deassert(dsp_clk); 132 133 return 0; 134 } 135 136 static int da8xx_rproc_stop(struct rproc *rproc) 137 { 138 struct da8xx_rproc *drproc = rproc->priv; 139 140 davinci_clk_reset_assert(drproc->dsp_clk); 141 clk_disable(drproc->dsp_clk); 142 143 return 0; 144 } 145 146 /* kick a virtqueue */ 147 static void da8xx_rproc_kick(struct rproc *rproc, int vqid) 148 { 149 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 150 151 /* Interrupt remote proc */ 152 writel(SYSCFG_CHIPSIG2, drproc->chipsig); 153 } 154 155 static const struct rproc_ops da8xx_rproc_ops = { 156 .start = da8xx_rproc_start, 157 .stop = da8xx_rproc_stop, 158 .kick = da8xx_rproc_kick, 159 }; 160 161 static int da8xx_rproc_probe(struct platform_device *pdev) 162 { 163 struct device *dev = &pdev->dev; 164 struct da8xx_rproc *drproc; 165 struct rproc *rproc; 166 struct irq_data *irq_data; 167 struct resource *bootreg_res; 168 struct resource *chipsig_res; 169 struct clk *dsp_clk; 170 void __iomem *chipsig; 171 void __iomem *bootreg; 172 int irq; 173 int ret; 174 175 irq = platform_get_irq(pdev, 0); 176 if (irq < 0) { 177 dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq); 178 return irq; 179 } 180 181 irq_data = irq_get_irq_data(irq); 182 if (!irq_data) { 183 dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq); 184 return -EINVAL; 185 } 186 187 bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 188 "host1cfg"); 189 bootreg = devm_ioremap_resource(dev, bootreg_res); 190 if (IS_ERR(bootreg)) 191 return PTR_ERR(bootreg); 192 193 chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 194 "chipsig"); 195 chipsig = devm_ioremap_resource(dev, chipsig_res); 196 if (IS_ERR(chipsig)) 197 return PTR_ERR(chipsig); 198 199 dsp_clk = devm_clk_get(dev, NULL); 200 if (IS_ERR(dsp_clk)) { 201 dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk)); 202 203 return PTR_ERR(dsp_clk); 204 } 205 206 rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name, 207 sizeof(*drproc)); 208 if (!rproc) 209 return -ENOMEM; 210 211 drproc = rproc->priv; 212 drproc->rproc = rproc; 213 drproc->dsp_clk = dsp_clk; 214 rproc->has_iommu = false; 215 216 platform_set_drvdata(pdev, rproc); 217 218 /* everything the ISR needs is now setup, so hook it up */ 219 ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback, 220 handle_event, 0, "da8xx-remoteproc", 221 rproc); 222 if (ret) { 223 dev_err(dev, "devm_request_threaded_irq error: %d\n", ret); 224 goto free_rproc; 225 } 226 227 /* 228 * rproc_add() can end up enabling the DSP's clk with the DSP 229 * *not* in reset, but da8xx_rproc_start() needs the DSP to be 230 * held in reset at the time it is called. 231 */ 232 ret = davinci_clk_reset_assert(drproc->dsp_clk); 233 if (ret) 234 goto free_rproc; 235 236 drproc->chipsig = chipsig; 237 drproc->bootreg = bootreg; 238 drproc->ack_fxn = irq_data->chip->irq_ack; 239 drproc->irq_data = irq_data; 240 drproc->irq = irq; 241 242 ret = rproc_add(rproc); 243 if (ret) { 244 dev_err(dev, "rproc_add failed: %d\n", ret); 245 goto free_rproc; 246 } 247 248 return 0; 249 250 free_rproc: 251 rproc_free(rproc); 252 253 return ret; 254 } 255 256 static int da8xx_rproc_remove(struct platform_device *pdev) 257 { 258 struct rproc *rproc = platform_get_drvdata(pdev); 259 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 260 261 /* 262 * The devm subsystem might end up releasing things before 263 * freeing the irq, thus allowing an interrupt to sneak in while 264 * the device is being removed. This should prevent that. 265 */ 266 disable_irq(drproc->irq); 267 268 rproc_del(rproc); 269 rproc_free(rproc); 270 271 return 0; 272 } 273 274 static struct platform_driver da8xx_rproc_driver = { 275 .probe = da8xx_rproc_probe, 276 .remove = da8xx_rproc_remove, 277 .driver = { 278 .name = "davinci-rproc", 279 }, 280 }; 281 282 module_platform_driver(da8xx_rproc_driver); 283 284 MODULE_LICENSE("GPL v2"); 285 MODULE_DESCRIPTION("DA8XX Remote Processor control driver"); 286