1 /* 2 * Remote processor machine-specific module for DA8XX 3 * 4 * Copyright (C) 2013 Texas Instruments, Inc. 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * version 2 as published by the Free Software Foundation. 9 */ 10 11 #include <linux/bitops.h> 12 #include <linux/clk.h> 13 #include <linux/err.h> 14 #include <linux/interrupt.h> 15 #include <linux/io.h> 16 #include <linux/irq.h> 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/remoteproc.h> 21 22 #include <mach/clock.h> /* for davinci_clk_reset_assert/deassert() */ 23 24 #include "remoteproc_internal.h" 25 26 static char *da8xx_fw_name; 27 module_param(da8xx_fw_name, charp, S_IRUGO); 28 MODULE_PARM_DESC(da8xx_fw_name, 29 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')"); 30 31 /* 32 * OMAP-L138 Technical References: 33 * http://www.ti.com/product/omap-l138 34 */ 35 #define SYSCFG_CHIPSIG0 BIT(0) 36 #define SYSCFG_CHIPSIG1 BIT(1) 37 #define SYSCFG_CHIPSIG2 BIT(2) 38 #define SYSCFG_CHIPSIG3 BIT(3) 39 #define SYSCFG_CHIPSIG4 BIT(4) 40 41 #define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1) 42 43 /** 44 * struct da8xx_rproc_mem - internal memory structure 45 * @cpu_addr: MPU virtual address of the memory region 46 * @bus_addr: Bus address used to access the memory region 47 * @dev_addr: Device address of the memory region from DSP view 48 * @size: Size of the memory region 49 */ 50 struct da8xx_rproc_mem { 51 void __iomem *cpu_addr; 52 phys_addr_t bus_addr; 53 u32 dev_addr; 54 size_t size; 55 }; 56 57 /** 58 * struct da8xx_rproc - da8xx remote processor instance state 59 * @rproc: rproc handle 60 * @mem: internal memory regions data 61 * @num_mems: number of internal memory regions 62 * @dsp_clk: placeholder for platform's DSP clk 63 * @ack_fxn: chip-specific ack function for ack'ing irq 64 * @irq_data: ack_fxn function parameter 65 * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR) 66 * @bootreg: virt ptr to DSP boot address register (HOST1CFG) 67 * @irq: irq # used by this instance 68 */ 69 struct da8xx_rproc { 70 struct rproc *rproc; 71 struct da8xx_rproc_mem *mem; 72 int num_mems; 73 struct clk *dsp_clk; 74 void (*ack_fxn)(struct irq_data *data); 75 struct irq_data *irq_data; 76 void __iomem *chipsig; 77 void __iomem *bootreg; 78 int irq; 79 }; 80 81 /** 82 * handle_event() - inbound virtqueue message workqueue function 83 * 84 * This function is registered as a kernel thread and is scheduled by the 85 * kernel handler. 86 */ 87 static irqreturn_t handle_event(int irq, void *p) 88 { 89 struct rproc *rproc = (struct rproc *)p; 90 91 /* Process incoming buffers on all our vrings */ 92 rproc_vq_interrupt(rproc, 0); 93 rproc_vq_interrupt(rproc, 1); 94 95 return IRQ_HANDLED; 96 } 97 98 /** 99 * da8xx_rproc_callback() - inbound virtqueue message handler 100 * 101 * This handler is invoked directly by the kernel whenever the remote 102 * core (DSP) has modified the state of a virtqueue. There is no 103 * "payload" message indicating the virtqueue index as is the case with 104 * mailbox-based implementations on OMAP4. As such, this handler "polls" 105 * each known virtqueue index for every invocation. 106 */ 107 static irqreturn_t da8xx_rproc_callback(int irq, void *p) 108 { 109 struct rproc *rproc = (struct rproc *)p; 110 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 111 u32 chipsig; 112 113 chipsig = readl(drproc->chipsig); 114 if (chipsig & SYSCFG_CHIPSIG0) { 115 /* Clear interrupt level source */ 116 writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4); 117 118 /* 119 * ACK intr to AINTC. 120 * 121 * It has already been ack'ed by the kernel before calling 122 * this function, but since the ARM<->DSP interrupts in the 123 * CHIPSIG register are "level" instead of "pulse" variety, 124 * we need to ack it after taking down the level else we'll 125 * be called again immediately after returning. 126 */ 127 drproc->ack_fxn(drproc->irq_data); 128 129 return IRQ_WAKE_THREAD; 130 } 131 132 return IRQ_HANDLED; 133 } 134 135 static int da8xx_rproc_start(struct rproc *rproc) 136 { 137 struct device *dev = rproc->dev.parent; 138 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 139 struct clk *dsp_clk = drproc->dsp_clk; 140 141 /* hw requires the start (boot) address be on 1KB boundary */ 142 if (rproc->bootaddr & 0x3ff) { 143 dev_err(dev, "invalid boot address: must be aligned to 1KB\n"); 144 145 return -EINVAL; 146 } 147 148 writel(rproc->bootaddr, drproc->bootreg); 149 150 clk_enable(dsp_clk); 151 davinci_clk_reset_deassert(dsp_clk); 152 153 return 0; 154 } 155 156 static int da8xx_rproc_stop(struct rproc *rproc) 157 { 158 struct da8xx_rproc *drproc = rproc->priv; 159 160 davinci_clk_reset_assert(drproc->dsp_clk); 161 clk_disable(drproc->dsp_clk); 162 163 return 0; 164 } 165 166 /* kick a virtqueue */ 167 static void da8xx_rproc_kick(struct rproc *rproc, int vqid) 168 { 169 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 170 171 /* Interrupt remote proc */ 172 writel(SYSCFG_CHIPSIG2, drproc->chipsig); 173 } 174 175 static const struct rproc_ops da8xx_rproc_ops = { 176 .start = da8xx_rproc_start, 177 .stop = da8xx_rproc_stop, 178 .kick = da8xx_rproc_kick, 179 }; 180 181 static int da8xx_rproc_get_internal_memories(struct platform_device *pdev, 182 struct da8xx_rproc *drproc) 183 { 184 static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"}; 185 int num_mems = ARRAY_SIZE(mem_names); 186 struct device *dev = &pdev->dev; 187 struct resource *res; 188 int i; 189 190 drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem), 191 GFP_KERNEL); 192 if (!drproc->mem) 193 return -ENOMEM; 194 195 for (i = 0; i < num_mems; i++) { 196 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 197 mem_names[i]); 198 drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res); 199 if (IS_ERR(drproc->mem[i].cpu_addr)) { 200 dev_err(dev, "failed to parse and map %s memory\n", 201 mem_names[i]); 202 return PTR_ERR(drproc->mem[i].cpu_addr); 203 } 204 drproc->mem[i].bus_addr = res->start; 205 drproc->mem[i].dev_addr = 206 res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK; 207 drproc->mem[i].size = resource_size(res); 208 209 dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n", 210 mem_names[i], &drproc->mem[i].bus_addr, 211 drproc->mem[i].size, drproc->mem[i].cpu_addr, 212 drproc->mem[i].dev_addr); 213 } 214 drproc->num_mems = num_mems; 215 216 return 0; 217 } 218 219 static int da8xx_rproc_probe(struct platform_device *pdev) 220 { 221 struct device *dev = &pdev->dev; 222 struct da8xx_rproc *drproc; 223 struct rproc *rproc; 224 struct irq_data *irq_data; 225 struct resource *bootreg_res; 226 struct resource *chipsig_res; 227 struct clk *dsp_clk; 228 void __iomem *chipsig; 229 void __iomem *bootreg; 230 int irq; 231 int ret; 232 233 irq = platform_get_irq(pdev, 0); 234 if (irq < 0) { 235 dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq); 236 return irq; 237 } 238 239 irq_data = irq_get_irq_data(irq); 240 if (!irq_data) { 241 dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq); 242 return -EINVAL; 243 } 244 245 bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 246 "host1cfg"); 247 bootreg = devm_ioremap_resource(dev, bootreg_res); 248 if (IS_ERR(bootreg)) 249 return PTR_ERR(bootreg); 250 251 chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, 252 "chipsig"); 253 chipsig = devm_ioremap_resource(dev, chipsig_res); 254 if (IS_ERR(chipsig)) 255 return PTR_ERR(chipsig); 256 257 dsp_clk = devm_clk_get(dev, NULL); 258 if (IS_ERR(dsp_clk)) { 259 dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk)); 260 261 return PTR_ERR(dsp_clk); 262 } 263 264 rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name, 265 sizeof(*drproc)); 266 if (!rproc) 267 return -ENOMEM; 268 269 drproc = rproc->priv; 270 drproc->rproc = rproc; 271 drproc->dsp_clk = dsp_clk; 272 rproc->has_iommu = false; 273 274 ret = da8xx_rproc_get_internal_memories(pdev, drproc); 275 if (ret) 276 goto free_rproc; 277 278 platform_set_drvdata(pdev, rproc); 279 280 /* everything the ISR needs is now setup, so hook it up */ 281 ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback, 282 handle_event, 0, "da8xx-remoteproc", 283 rproc); 284 if (ret) { 285 dev_err(dev, "devm_request_threaded_irq error: %d\n", ret); 286 goto free_rproc; 287 } 288 289 /* 290 * rproc_add() can end up enabling the DSP's clk with the DSP 291 * *not* in reset, but da8xx_rproc_start() needs the DSP to be 292 * held in reset at the time it is called. 293 */ 294 ret = davinci_clk_reset_assert(drproc->dsp_clk); 295 if (ret) 296 goto free_rproc; 297 298 drproc->chipsig = chipsig; 299 drproc->bootreg = bootreg; 300 drproc->ack_fxn = irq_data->chip->irq_ack; 301 drproc->irq_data = irq_data; 302 drproc->irq = irq; 303 304 ret = rproc_add(rproc); 305 if (ret) { 306 dev_err(dev, "rproc_add failed: %d\n", ret); 307 goto free_rproc; 308 } 309 310 return 0; 311 312 free_rproc: 313 rproc_free(rproc); 314 315 return ret; 316 } 317 318 static int da8xx_rproc_remove(struct platform_device *pdev) 319 { 320 struct rproc *rproc = platform_get_drvdata(pdev); 321 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv; 322 323 /* 324 * The devm subsystem might end up releasing things before 325 * freeing the irq, thus allowing an interrupt to sneak in while 326 * the device is being removed. This should prevent that. 327 */ 328 disable_irq(drproc->irq); 329 330 rproc_del(rproc); 331 rproc_free(rproc); 332 333 return 0; 334 } 335 336 static struct platform_driver da8xx_rproc_driver = { 337 .probe = da8xx_rproc_probe, 338 .remove = da8xx_rproc_remove, 339 .driver = { 340 .name = "davinci-rproc", 341 }, 342 }; 343 344 module_platform_driver(da8xx_rproc_driver); 345 346 MODULE_LICENSE("GPL v2"); 347 MODULE_DESCRIPTION("DA8XX Remote Processor control driver"); 348