113be5432SRobert Tivy /*
213be5432SRobert Tivy  * Remote processor machine-specific module for DA8XX
313be5432SRobert Tivy  *
413be5432SRobert Tivy  * Copyright (C) 2013 Texas Instruments, Inc.
513be5432SRobert Tivy  *
613be5432SRobert Tivy  * This program is free software; you can redistribute it and/or
713be5432SRobert Tivy  * modify it under the terms of the GNU General Public License
813be5432SRobert Tivy  * version 2 as published by the Free Software Foundation.
913be5432SRobert Tivy  */
1013be5432SRobert Tivy 
1113be5432SRobert Tivy #include <linux/bitops.h>
1213be5432SRobert Tivy #include <linux/clk.h>
1313be5432SRobert Tivy #include <linux/err.h>
1413be5432SRobert Tivy #include <linux/interrupt.h>
1513be5432SRobert Tivy #include <linux/io.h>
1613be5432SRobert Tivy #include <linux/irq.h>
1713be5432SRobert Tivy #include <linux/kernel.h>
1813be5432SRobert Tivy #include <linux/module.h>
1961696580SSuman Anna #include <linux/of_reserved_mem.h>
2013be5432SRobert Tivy #include <linux/platform_device.h>
2113be5432SRobert Tivy #include <linux/remoteproc.h>
2213be5432SRobert Tivy 
2313be5432SRobert Tivy #include <mach/clock.h>   /* for davinci_clk_reset_assert/deassert() */
2413be5432SRobert Tivy 
2513be5432SRobert Tivy #include "remoteproc_internal.h"
2613be5432SRobert Tivy 
2713be5432SRobert Tivy static char *da8xx_fw_name;
2813be5432SRobert Tivy module_param(da8xx_fw_name, charp, S_IRUGO);
2913be5432SRobert Tivy MODULE_PARM_DESC(da8xx_fw_name,
30e17aee37SSuman Anna 		 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
3113be5432SRobert Tivy 
3213be5432SRobert Tivy /*
3313be5432SRobert Tivy  * OMAP-L138 Technical References:
3413be5432SRobert Tivy  * http://www.ti.com/product/omap-l138
3513be5432SRobert Tivy  */
3613be5432SRobert Tivy #define SYSCFG_CHIPSIG0 BIT(0)
3713be5432SRobert Tivy #define SYSCFG_CHIPSIG1 BIT(1)
3813be5432SRobert Tivy #define SYSCFG_CHIPSIG2 BIT(2)
3913be5432SRobert Tivy #define SYSCFG_CHIPSIG3 BIT(3)
4013be5432SRobert Tivy #define SYSCFG_CHIPSIG4 BIT(4)
4113be5432SRobert Tivy 
4259b2355fSSuman Anna #define DA8XX_RPROC_LOCAL_ADDRESS_MASK	(SZ_16M - 1)
4359b2355fSSuman Anna 
4459b2355fSSuman Anna /**
4559b2355fSSuman Anna  * struct da8xx_rproc_mem - internal memory structure
4659b2355fSSuman Anna  * @cpu_addr: MPU virtual address of the memory region
4759b2355fSSuman Anna  * @bus_addr: Bus address used to access the memory region
4859b2355fSSuman Anna  * @dev_addr: Device address of the memory region from DSP view
4959b2355fSSuman Anna  * @size: Size of the memory region
5059b2355fSSuman Anna  */
5159b2355fSSuman Anna struct da8xx_rproc_mem {
5259b2355fSSuman Anna 	void __iomem *cpu_addr;
5359b2355fSSuman Anna 	phys_addr_t bus_addr;
5459b2355fSSuman Anna 	u32 dev_addr;
5559b2355fSSuman Anna 	size_t size;
5659b2355fSSuman Anna };
5759b2355fSSuman Anna 
5813be5432SRobert Tivy /**
5913be5432SRobert Tivy  * struct da8xx_rproc - da8xx remote processor instance state
6013be5432SRobert Tivy  * @rproc: rproc handle
6159b2355fSSuman Anna  * @mem: internal memory regions data
6259b2355fSSuman Anna  * @num_mems: number of internal memory regions
6313be5432SRobert Tivy  * @dsp_clk: placeholder for platform's DSP clk
6413be5432SRobert Tivy  * @ack_fxn: chip-specific ack function for ack'ing irq
6513be5432SRobert Tivy  * @irq_data: ack_fxn function parameter
6613be5432SRobert Tivy  * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
6713be5432SRobert Tivy  * @bootreg: virt ptr to DSP boot address register (HOST1CFG)
6813be5432SRobert Tivy  * @irq: irq # used by this instance
6913be5432SRobert Tivy  */
7013be5432SRobert Tivy struct da8xx_rproc {
7113be5432SRobert Tivy 	struct rproc *rproc;
7259b2355fSSuman Anna 	struct da8xx_rproc_mem *mem;
7359b2355fSSuman Anna 	int num_mems;
7413be5432SRobert Tivy 	struct clk *dsp_clk;
7513be5432SRobert Tivy 	void (*ack_fxn)(struct irq_data *data);
7613be5432SRobert Tivy 	struct irq_data *irq_data;
7713be5432SRobert Tivy 	void __iomem *chipsig;
7813be5432SRobert Tivy 	void __iomem *bootreg;
7913be5432SRobert Tivy 	int irq;
8013be5432SRobert Tivy };
8113be5432SRobert Tivy 
8213be5432SRobert Tivy /**
8313be5432SRobert Tivy  * handle_event() - inbound virtqueue message workqueue function
8413be5432SRobert Tivy  *
8513be5432SRobert Tivy  * This function is registered as a kernel thread and is scheduled by the
8613be5432SRobert Tivy  * kernel handler.
8713be5432SRobert Tivy  */
8813be5432SRobert Tivy static irqreturn_t handle_event(int irq, void *p)
8913be5432SRobert Tivy {
9013be5432SRobert Tivy 	struct rproc *rproc = (struct rproc *)p;
9113be5432SRobert Tivy 
9213be5432SRobert Tivy 	/* Process incoming buffers on all our vrings */
9313be5432SRobert Tivy 	rproc_vq_interrupt(rproc, 0);
9413be5432SRobert Tivy 	rproc_vq_interrupt(rproc, 1);
9513be5432SRobert Tivy 
9613be5432SRobert Tivy 	return IRQ_HANDLED;
9713be5432SRobert Tivy }
9813be5432SRobert Tivy 
9913be5432SRobert Tivy /**
10013be5432SRobert Tivy  * da8xx_rproc_callback() - inbound virtqueue message handler
10113be5432SRobert Tivy  *
10213be5432SRobert Tivy  * This handler is invoked directly by the kernel whenever the remote
10313be5432SRobert Tivy  * core (DSP) has modified the state of a virtqueue.  There is no
10413be5432SRobert Tivy  * "payload" message indicating the virtqueue index as is the case with
10513be5432SRobert Tivy  * mailbox-based implementations on OMAP4.  As such, this handler "polls"
10613be5432SRobert Tivy  * each known virtqueue index for every invocation.
10713be5432SRobert Tivy  */
10813be5432SRobert Tivy static irqreturn_t da8xx_rproc_callback(int irq, void *p)
10913be5432SRobert Tivy {
11013be5432SRobert Tivy 	struct rproc *rproc = (struct rproc *)p;
11113be5432SRobert Tivy 	struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
11213be5432SRobert Tivy 	u32 chipsig;
11313be5432SRobert Tivy 
11413be5432SRobert Tivy 	chipsig = readl(drproc->chipsig);
11513be5432SRobert Tivy 	if (chipsig & SYSCFG_CHIPSIG0) {
11613be5432SRobert Tivy 		/* Clear interrupt level source */
11713be5432SRobert Tivy 		writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
11813be5432SRobert Tivy 
11913be5432SRobert Tivy 		/*
12013be5432SRobert Tivy 		 * ACK intr to AINTC.
12113be5432SRobert Tivy 		 *
12213be5432SRobert Tivy 		 * It has already been ack'ed by the kernel before calling
12313be5432SRobert Tivy 		 * this function, but since the ARM<->DSP interrupts in the
12413be5432SRobert Tivy 		 * CHIPSIG register are "level" instead of "pulse" variety,
12513be5432SRobert Tivy 		 * we need to ack it after taking down the level else we'll
12613be5432SRobert Tivy 		 * be called again immediately after returning.
12713be5432SRobert Tivy 		 */
12813be5432SRobert Tivy 		drproc->ack_fxn(drproc->irq_data);
12913be5432SRobert Tivy 
13013be5432SRobert Tivy 		return IRQ_WAKE_THREAD;
13113be5432SRobert Tivy 	}
13213be5432SRobert Tivy 
13313be5432SRobert Tivy 	return IRQ_HANDLED;
13413be5432SRobert Tivy }
13513be5432SRobert Tivy 
13613be5432SRobert Tivy static int da8xx_rproc_start(struct rproc *rproc)
13713be5432SRobert Tivy {
13813be5432SRobert Tivy 	struct device *dev = rproc->dev.parent;
13913be5432SRobert Tivy 	struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
14013be5432SRobert Tivy 	struct clk *dsp_clk = drproc->dsp_clk;
14113be5432SRobert Tivy 
14213be5432SRobert Tivy 	/* hw requires the start (boot) address be on 1KB boundary */
14313be5432SRobert Tivy 	if (rproc->bootaddr & 0x3ff) {
14413be5432SRobert Tivy 		dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
14513be5432SRobert Tivy 
14613be5432SRobert Tivy 		return -EINVAL;
14713be5432SRobert Tivy 	}
14813be5432SRobert Tivy 
14913be5432SRobert Tivy 	writel(rproc->bootaddr, drproc->bootreg);
15013be5432SRobert Tivy 
15113be5432SRobert Tivy 	clk_enable(dsp_clk);
15213be5432SRobert Tivy 	davinci_clk_reset_deassert(dsp_clk);
15313be5432SRobert Tivy 
15413be5432SRobert Tivy 	return 0;
15513be5432SRobert Tivy }
15613be5432SRobert Tivy 
15713be5432SRobert Tivy static int da8xx_rproc_stop(struct rproc *rproc)
15813be5432SRobert Tivy {
15913be5432SRobert Tivy 	struct da8xx_rproc *drproc = rproc->priv;
16013be5432SRobert Tivy 
161a63c70d4SSuman Anna 	davinci_clk_reset_assert(drproc->dsp_clk);
16213be5432SRobert Tivy 	clk_disable(drproc->dsp_clk);
16313be5432SRobert Tivy 
16413be5432SRobert Tivy 	return 0;
16513be5432SRobert Tivy }
16613be5432SRobert Tivy 
16713be5432SRobert Tivy /* kick a virtqueue */
16813be5432SRobert Tivy static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
16913be5432SRobert Tivy {
17013be5432SRobert Tivy 	struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
17113be5432SRobert Tivy 
17256324d7aSAnna, Suman 	/* Interrupt remote proc */
17313be5432SRobert Tivy 	writel(SYSCFG_CHIPSIG2, drproc->chipsig);
17413be5432SRobert Tivy }
17513be5432SRobert Tivy 
176c008fad2SBhumika Goyal static const struct rproc_ops da8xx_rproc_ops = {
17713be5432SRobert Tivy 	.start = da8xx_rproc_start,
17813be5432SRobert Tivy 	.stop = da8xx_rproc_stop,
17913be5432SRobert Tivy 	.kick = da8xx_rproc_kick,
18013be5432SRobert Tivy };
18113be5432SRobert Tivy 
18259b2355fSSuman Anna static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
18359b2355fSSuman Anna 					     struct da8xx_rproc *drproc)
18459b2355fSSuman Anna {
18559b2355fSSuman Anna 	static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
18659b2355fSSuman Anna 	int num_mems = ARRAY_SIZE(mem_names);
18759b2355fSSuman Anna 	struct device *dev = &pdev->dev;
18859b2355fSSuman Anna 	struct resource *res;
18959b2355fSSuman Anna 	int i;
19059b2355fSSuman Anna 
19159b2355fSSuman Anna 	drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
19259b2355fSSuman Anna 				   GFP_KERNEL);
19359b2355fSSuman Anna 	if (!drproc->mem)
19459b2355fSSuman Anna 		return -ENOMEM;
19559b2355fSSuman Anna 
19659b2355fSSuman Anna 	for (i = 0; i < num_mems; i++) {
19759b2355fSSuman Anna 		res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
19859b2355fSSuman Anna 						   mem_names[i]);
19959b2355fSSuman Anna 		drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
20059b2355fSSuman Anna 		if (IS_ERR(drproc->mem[i].cpu_addr)) {
20159b2355fSSuman Anna 			dev_err(dev, "failed to parse and map %s memory\n",
20259b2355fSSuman Anna 				mem_names[i]);
20359b2355fSSuman Anna 			return PTR_ERR(drproc->mem[i].cpu_addr);
20459b2355fSSuman Anna 		}
20559b2355fSSuman Anna 		drproc->mem[i].bus_addr = res->start;
20659b2355fSSuman Anna 		drproc->mem[i].dev_addr =
20759b2355fSSuman Anna 				res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
20859b2355fSSuman Anna 		drproc->mem[i].size = resource_size(res);
20959b2355fSSuman Anna 
21059b2355fSSuman Anna 		dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n",
21159b2355fSSuman Anna 			mem_names[i], &drproc->mem[i].bus_addr,
21259b2355fSSuman Anna 			drproc->mem[i].size, drproc->mem[i].cpu_addr,
21359b2355fSSuman Anna 			drproc->mem[i].dev_addr);
21459b2355fSSuman Anna 	}
21559b2355fSSuman Anna 	drproc->num_mems = num_mems;
21659b2355fSSuman Anna 
21759b2355fSSuman Anna 	return 0;
21859b2355fSSuman Anna }
21959b2355fSSuman Anna 
22013be5432SRobert Tivy static int da8xx_rproc_probe(struct platform_device *pdev)
22113be5432SRobert Tivy {
22213be5432SRobert Tivy 	struct device *dev = &pdev->dev;
22313be5432SRobert Tivy 	struct da8xx_rproc *drproc;
22413be5432SRobert Tivy 	struct rproc *rproc;
22513be5432SRobert Tivy 	struct irq_data *irq_data;
22613be5432SRobert Tivy 	struct resource *bootreg_res;
22713be5432SRobert Tivy 	struct resource *chipsig_res;
22813be5432SRobert Tivy 	struct clk *dsp_clk;
22913be5432SRobert Tivy 	void __iomem *chipsig;
23013be5432SRobert Tivy 	void __iomem *bootreg;
23113be5432SRobert Tivy 	int irq;
23213be5432SRobert Tivy 	int ret;
23313be5432SRobert Tivy 
23413be5432SRobert Tivy 	irq = platform_get_irq(pdev, 0);
23513be5432SRobert Tivy 	if (irq < 0) {
23613be5432SRobert Tivy 		dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq);
23713be5432SRobert Tivy 		return irq;
23813be5432SRobert Tivy 	}
23913be5432SRobert Tivy 
24013be5432SRobert Tivy 	irq_data = irq_get_irq_data(irq);
24113be5432SRobert Tivy 	if (!irq_data) {
24213be5432SRobert Tivy 		dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
24313be5432SRobert Tivy 		return -EINVAL;
24413be5432SRobert Tivy 	}
24513be5432SRobert Tivy 
2466fb9a8f5SSuman Anna 	bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2476fb9a8f5SSuman Anna 						   "host1cfg");
24813be5432SRobert Tivy 	bootreg = devm_ioremap_resource(dev, bootreg_res);
24913be5432SRobert Tivy 	if (IS_ERR(bootreg))
25013be5432SRobert Tivy 		return PTR_ERR(bootreg);
25113be5432SRobert Tivy 
2526fb9a8f5SSuman Anna 	chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2536fb9a8f5SSuman Anna 						   "chipsig");
25413be5432SRobert Tivy 	chipsig = devm_ioremap_resource(dev, chipsig_res);
25513be5432SRobert Tivy 	if (IS_ERR(chipsig))
25613be5432SRobert Tivy 		return PTR_ERR(chipsig);
25713be5432SRobert Tivy 
25813be5432SRobert Tivy 	dsp_clk = devm_clk_get(dev, NULL);
25913be5432SRobert Tivy 	if (IS_ERR(dsp_clk)) {
26013be5432SRobert Tivy 		dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
26113be5432SRobert Tivy 
26213be5432SRobert Tivy 		return PTR_ERR(dsp_clk);
26313be5432SRobert Tivy 	}
26413be5432SRobert Tivy 
26561696580SSuman Anna 	if (dev->of_node) {
26661696580SSuman Anna 		ret = of_reserved_mem_device_init(dev);
26761696580SSuman Anna 		if (ret) {
26861696580SSuman Anna 			dev_err(dev, "device does not have specific CMA pool: %d\n",
26961696580SSuman Anna 				ret);
27061696580SSuman Anna 			return ret;
27161696580SSuman Anna 		}
27261696580SSuman Anna 	}
27361696580SSuman Anna 
27413be5432SRobert Tivy 	rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
27513be5432SRobert Tivy 		sizeof(*drproc));
27661696580SSuman Anna 	if (!rproc) {
27761696580SSuman Anna 		ret = -ENOMEM;
27861696580SSuman Anna 		goto free_mem;
27961696580SSuman Anna 	}
28013be5432SRobert Tivy 
28113be5432SRobert Tivy 	drproc = rproc->priv;
28213be5432SRobert Tivy 	drproc->rproc = rproc;
283470ac62fSSuman Anna 	drproc->dsp_clk = dsp_clk;
284315491e5SSuman Anna 	rproc->has_iommu = false;
28513be5432SRobert Tivy 
28659b2355fSSuman Anna 	ret = da8xx_rproc_get_internal_memories(pdev, drproc);
28759b2355fSSuman Anna 	if (ret)
28859b2355fSSuman Anna 		goto free_rproc;
28959b2355fSSuman Anna 
29013be5432SRobert Tivy 	platform_set_drvdata(pdev, rproc);
29113be5432SRobert Tivy 
29213be5432SRobert Tivy 	/* everything the ISR needs is now setup, so hook it up */
29313be5432SRobert Tivy 	ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback,
29413be5432SRobert Tivy 					handle_event, 0, "da8xx-remoteproc",
29513be5432SRobert Tivy 					rproc);
29613be5432SRobert Tivy 	if (ret) {
29713be5432SRobert Tivy 		dev_err(dev, "devm_request_threaded_irq error: %d\n", ret);
29813be5432SRobert Tivy 		goto free_rproc;
29913be5432SRobert Tivy 	}
30013be5432SRobert Tivy 
30113be5432SRobert Tivy 	/*
30213be5432SRobert Tivy 	 * rproc_add() can end up enabling the DSP's clk with the DSP
30313be5432SRobert Tivy 	 * *not* in reset, but da8xx_rproc_start() needs the DSP to be
30413be5432SRobert Tivy 	 * held in reset at the time it is called.
30513be5432SRobert Tivy 	 */
306470ac62fSSuman Anna 	ret = davinci_clk_reset_assert(drproc->dsp_clk);
30713be5432SRobert Tivy 	if (ret)
30813be5432SRobert Tivy 		goto free_rproc;
30913be5432SRobert Tivy 
31013be5432SRobert Tivy 	drproc->chipsig = chipsig;
31113be5432SRobert Tivy 	drproc->bootreg = bootreg;
31213be5432SRobert Tivy 	drproc->ack_fxn = irq_data->chip->irq_ack;
31313be5432SRobert Tivy 	drproc->irq_data = irq_data;
31413be5432SRobert Tivy 	drproc->irq = irq;
31513be5432SRobert Tivy 
31613be5432SRobert Tivy 	ret = rproc_add(rproc);
31713be5432SRobert Tivy 	if (ret) {
31813be5432SRobert Tivy 		dev_err(dev, "rproc_add failed: %d\n", ret);
31913be5432SRobert Tivy 		goto free_rproc;
32013be5432SRobert Tivy 	}
32113be5432SRobert Tivy 
32213be5432SRobert Tivy 	return 0;
32313be5432SRobert Tivy 
32413be5432SRobert Tivy free_rproc:
325433c0e04SBjorn Andersson 	rproc_free(rproc);
32661696580SSuman Anna free_mem:
32761696580SSuman Anna 	if (dev->of_node)
32861696580SSuman Anna 		of_reserved_mem_device_release(dev);
32913be5432SRobert Tivy 	return ret;
33013be5432SRobert Tivy }
33113be5432SRobert Tivy 
33213be5432SRobert Tivy static int da8xx_rproc_remove(struct platform_device *pdev)
33313be5432SRobert Tivy {
33413be5432SRobert Tivy 	struct rproc *rproc = platform_get_drvdata(pdev);
33513be5432SRobert Tivy 	struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
33661696580SSuman Anna 	struct device *dev = &pdev->dev;
33713be5432SRobert Tivy 
33813be5432SRobert Tivy 	/*
33913be5432SRobert Tivy 	 * The devm subsystem might end up releasing things before
34013be5432SRobert Tivy 	 * freeing the irq, thus allowing an interrupt to sneak in while
34113be5432SRobert Tivy 	 * the device is being removed.  This should prevent that.
34213be5432SRobert Tivy 	 */
34313be5432SRobert Tivy 	disable_irq(drproc->irq);
34413be5432SRobert Tivy 
34513be5432SRobert Tivy 	rproc_del(rproc);
346433c0e04SBjorn Andersson 	rproc_free(rproc);
34761696580SSuman Anna 	if (dev->of_node)
34861696580SSuman Anna 		of_reserved_mem_device_release(dev);
34913be5432SRobert Tivy 
35013be5432SRobert Tivy 	return 0;
35113be5432SRobert Tivy }
35213be5432SRobert Tivy 
35361696580SSuman Anna static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = {
35461696580SSuman Anna 	{ .compatible = "ti,da850-dsp", },
35561696580SSuman Anna 	{ /* sentinel */ },
35661696580SSuman Anna };
35761696580SSuman Anna MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);
35861696580SSuman Anna 
35913be5432SRobert Tivy static struct platform_driver da8xx_rproc_driver = {
36013be5432SRobert Tivy 	.probe = da8xx_rproc_probe,
36113be5432SRobert Tivy 	.remove = da8xx_rproc_remove,
36213be5432SRobert Tivy 	.driver = {
36313be5432SRobert Tivy 		.name = "davinci-rproc",
36461696580SSuman Anna 		.of_match_table = of_match_ptr(davinci_rproc_of_match),
36513be5432SRobert Tivy 	},
36613be5432SRobert Tivy };
36713be5432SRobert Tivy 
36813be5432SRobert Tivy module_platform_driver(da8xx_rproc_driver);
36913be5432SRobert Tivy 
37013be5432SRobert Tivy MODULE_LICENSE("GPL v2");
37113be5432SRobert Tivy MODULE_DESCRIPTION("DA8XX Remote Processor control driver");
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