1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Regulator controller driver for UniPhier SoC 4 // Copyright 2018 Socionext Inc. 5 // Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> 6 7 #include <linux/clk.h> 8 #include <linux/io.h> 9 #include <linux/module.h> 10 #include <linux/of_device.h> 11 #include <linux/platform_device.h> 12 #include <linux/regmap.h> 13 #include <linux/regulator/driver.h> 14 #include <linux/regulator/of_regulator.h> 15 #include <linux/reset.h> 16 17 #define MAX_CLKS 2 18 #define MAX_RSTS 2 19 20 struct uniphier_regulator_soc_data { 21 int nclks; 22 const char * const *clock_names; 23 int nrsts; 24 const char * const *reset_names; 25 const struct regulator_desc *desc; 26 const struct regmap_config *regconf; 27 }; 28 29 struct uniphier_regulator_priv { 30 struct clk_bulk_data clk[MAX_CLKS]; 31 struct reset_control *rst[MAX_RSTS]; 32 const struct uniphier_regulator_soc_data *data; 33 }; 34 35 static const struct regulator_ops uniphier_regulator_ops = { 36 .enable = regulator_enable_regmap, 37 .disable = regulator_disable_regmap, 38 .is_enabled = regulator_is_enabled_regmap, 39 }; 40 41 static int uniphier_regulator_probe(struct platform_device *pdev) 42 { 43 struct device *dev = &pdev->dev; 44 struct uniphier_regulator_priv *priv; 45 struct regulator_config config = { }; 46 struct regulator_dev *rdev; 47 struct regmap *regmap; 48 struct resource *res; 49 void __iomem *base; 50 const char *name; 51 int i, ret, nr; 52 53 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 54 if (!priv) 55 return -ENOMEM; 56 57 priv->data = of_device_get_match_data(dev); 58 if (WARN_ON(!priv->data)) 59 return -EINVAL; 60 61 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 62 base = devm_ioremap_resource(dev, res); 63 if (IS_ERR(base)) 64 return PTR_ERR(base); 65 66 for (i = 0; i < priv->data->nclks; i++) 67 priv->clk[i].id = priv->data->clock_names[i]; 68 ret = devm_clk_bulk_get(dev, priv->data->nclks, priv->clk); 69 if (ret) 70 return ret; 71 72 for (i = 0; i < priv->data->nrsts; i++) { 73 name = priv->data->reset_names[i]; 74 priv->rst[i] = devm_reset_control_get_shared(dev, name); 75 if (IS_ERR(priv->rst[i])) 76 return PTR_ERR(priv->rst[i]); 77 } 78 79 ret = clk_bulk_prepare_enable(priv->data->nclks, priv->clk); 80 if (ret) 81 return ret; 82 83 for (nr = 0; nr < priv->data->nrsts; nr++) { 84 ret = reset_control_deassert(priv->rst[nr]); 85 if (ret) 86 goto out_rst_assert; 87 } 88 89 regmap = devm_regmap_init_mmio(dev, base, priv->data->regconf); 90 if (IS_ERR(regmap)) { 91 ret = PTR_ERR(regmap); 92 goto out_rst_assert; 93 } 94 95 config.dev = dev; 96 config.driver_data = priv; 97 config.of_node = dev->of_node; 98 config.regmap = regmap; 99 config.init_data = of_get_regulator_init_data(dev, dev->of_node, 100 priv->data->desc); 101 rdev = devm_regulator_register(dev, priv->data->desc, &config); 102 if (IS_ERR(rdev)) { 103 ret = PTR_ERR(rdev); 104 goto out_rst_assert; 105 } 106 107 platform_set_drvdata(pdev, priv); 108 109 return 0; 110 111 out_rst_assert: 112 while (nr--) 113 reset_control_assert(priv->rst[nr]); 114 115 clk_bulk_disable_unprepare(priv->data->nclks, priv->clk); 116 117 return ret; 118 } 119 120 static int uniphier_regulator_remove(struct platform_device *pdev) 121 { 122 struct uniphier_regulator_priv *priv = platform_get_drvdata(pdev); 123 int i; 124 125 for (i = 0; i < priv->data->nrsts; i++) 126 reset_control_assert(priv->rst[i]); 127 128 clk_bulk_disable_unprepare(priv->data->nclks, priv->clk); 129 130 return 0; 131 } 132 133 /* USB3 controller data */ 134 #define USB3VBUS_OFFSET 0x0 135 #define USB3VBUS_REG BIT(4) 136 #define USB3VBUS_REG_EN BIT(3) 137 static const struct regulator_desc uniphier_usb3_regulator_desc = { 138 .name = "vbus", 139 .of_match = of_match_ptr("vbus"), 140 .ops = &uniphier_regulator_ops, 141 .type = REGULATOR_VOLTAGE, 142 .owner = THIS_MODULE, 143 .enable_reg = USB3VBUS_OFFSET, 144 .enable_mask = USB3VBUS_REG_EN | USB3VBUS_REG, 145 .enable_val = USB3VBUS_REG_EN | USB3VBUS_REG, 146 .disable_val = USB3VBUS_REG_EN, 147 }; 148 149 static const struct regmap_config uniphier_usb3_regulator_regconf = { 150 .reg_bits = 32, 151 .val_bits = 32, 152 .reg_stride = 4, 153 .max_register = 1, 154 }; 155 156 static const char * const uniphier_pro4_clock_reset_names[] = { 157 "gio", "link", 158 }; 159 160 static const struct uniphier_regulator_soc_data uniphier_pro4_usb3_data = { 161 .nclks = ARRAY_SIZE(uniphier_pro4_clock_reset_names), 162 .clock_names = uniphier_pro4_clock_reset_names, 163 .nrsts = ARRAY_SIZE(uniphier_pro4_clock_reset_names), 164 .reset_names = uniphier_pro4_clock_reset_names, 165 .desc = &uniphier_usb3_regulator_desc, 166 .regconf = &uniphier_usb3_regulator_regconf, 167 }; 168 169 static const char * const uniphier_pxs2_clock_reset_names[] = { 170 "link", 171 }; 172 173 static const struct uniphier_regulator_soc_data uniphier_pxs2_usb3_data = { 174 .nclks = ARRAY_SIZE(uniphier_pxs2_clock_reset_names), 175 .clock_names = uniphier_pxs2_clock_reset_names, 176 .nrsts = ARRAY_SIZE(uniphier_pxs2_clock_reset_names), 177 .reset_names = uniphier_pxs2_clock_reset_names, 178 .desc = &uniphier_usb3_regulator_desc, 179 .regconf = &uniphier_usb3_regulator_regconf, 180 }; 181 182 static const struct of_device_id uniphier_regulator_match[] = { 183 /* USB VBUS */ 184 { 185 .compatible = "socionext,uniphier-pro4-usb3-regulator", 186 .data = &uniphier_pro4_usb3_data, 187 }, 188 { 189 .compatible = "socionext,uniphier-pro5-usb3-regulator", 190 .data = &uniphier_pro4_usb3_data, 191 }, 192 { 193 .compatible = "socionext,uniphier-pxs2-usb3-regulator", 194 .data = &uniphier_pxs2_usb3_data, 195 }, 196 { 197 .compatible = "socionext,uniphier-ld20-usb3-regulator", 198 .data = &uniphier_pxs2_usb3_data, 199 }, 200 { 201 .compatible = "socionext,uniphier-pxs3-usb3-regulator", 202 .data = &uniphier_pxs2_usb3_data, 203 }, 204 { /* Sentinel */ }, 205 }; 206 207 static struct platform_driver uniphier_regulator_driver = { 208 .probe = uniphier_regulator_probe, 209 .remove = uniphier_regulator_remove, 210 .driver = { 211 .name = "uniphier-regulator", 212 .of_match_table = uniphier_regulator_match, 213 }, 214 }; 215 module_platform_driver(uniphier_regulator_driver); 216 217 MODULE_AUTHOR("Kunihiko Hayashi <hayashi.kunihiko@socionext.com>"); 218 MODULE_DESCRIPTION("UniPhier Regulator Controller Driver"); 219 MODULE_LICENSE("GPL"); 220