1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips 4 * 5 * Copyright (C) 2008 David Brownell 6 */ 7 8 #include <linux/module.h> 9 #include <linux/string.h> 10 #include <linux/slab.h> 11 #include <linux/init.h> 12 #include <linux/err.h> 13 #include <linux/platform_device.h> 14 #include <linux/of.h> 15 #include <linux/of_device.h> 16 #include <linux/regulator/driver.h> 17 #include <linux/regulator/machine.h> 18 #include <linux/regulator/of_regulator.h> 19 #include <linux/mfd/twl.h> 20 #include <linux/delay.h> 21 22 /* 23 * The TWL4030/TW5030/TPS659x0 family chips include power management, a 24 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions 25 * include an audio codec, battery charger, and more voltage regulators. 26 * These chips are often used in OMAP-based systems. 27 * 28 * This driver implements software-based resource control for various 29 * voltage regulators. This is usually augmented with state machine 30 * based control. 31 */ 32 33 struct twlreg_info { 34 /* start of regulator's PM_RECEIVER control register bank */ 35 u8 base; 36 37 /* twl resource ID, for resource control state machine */ 38 u8 id; 39 40 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */ 41 u8 table_len; 42 const u16 *table; 43 44 /* State REMAP default configuration */ 45 u8 remap; 46 47 /* used by regulator core */ 48 struct regulator_desc desc; 49 50 /* chip specific features */ 51 unsigned long features; 52 53 /* data passed from board for external get/set voltage */ 54 void *data; 55 }; 56 57 58 /* LDO control registers ... offset is from the base of its register bank. 59 * The first three registers of all power resource banks help hardware to 60 * manage the various resource groups. 61 */ 62 /* Common offset in TWL4030/6030 */ 63 #define VREG_GRP 0 64 /* TWL4030 register offsets */ 65 #define VREG_TYPE 1 66 #define VREG_REMAP 2 67 #define VREG_DEDICATED 3 /* LDO control */ 68 #define VREG_VOLTAGE_SMPS_4030 9 69 /* TWL6030 register offsets */ 70 #define VREG_TRANS 1 71 #define VREG_STATE 2 72 #define VREG_VOLTAGE 3 73 #define VREG_VOLTAGE_SMPS 4 74 75 static inline int 76 twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset) 77 { 78 u8 value; 79 int status; 80 81 status = twl_i2c_read_u8(slave_subgp, 82 &value, info->base + offset); 83 return (status < 0) ? status : value; 84 } 85 86 static inline int 87 twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset, 88 u8 value) 89 { 90 return twl_i2c_write_u8(slave_subgp, 91 value, info->base + offset); 92 } 93 94 /*----------------------------------------------------------------------*/ 95 96 /* generic power resource operations, which work on all regulators */ 97 98 static int twlreg_grp(struct regulator_dev *rdev) 99 { 100 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, 101 VREG_GRP); 102 } 103 104 /* 105 * Enable/disable regulators by joining/leaving the P1 (processor) group. 106 * We assume nobody else is updating the DEV_GRP registers. 107 */ 108 /* definition for 4030 family */ 109 #define P3_GRP_4030 BIT(7) /* "peripherals" */ 110 #define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */ 111 #define P1_GRP_4030 BIT(5) /* CPU/Linux */ 112 /* definition for 6030 family */ 113 #define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */ 114 #define P2_GRP_6030 BIT(1) /* "peripherals" */ 115 #define P1_GRP_6030 BIT(0) /* CPU/Linux */ 116 117 static int twl4030reg_is_enabled(struct regulator_dev *rdev) 118 { 119 int state = twlreg_grp(rdev); 120 121 if (state < 0) 122 return state; 123 124 return state & P1_GRP_4030; 125 } 126 127 #define PB_I2C_BUSY BIT(0) 128 #define PB_I2C_BWEN BIT(1) 129 130 /* Wait until buffer empty/ready to send a word on power bus. */ 131 static int twl4030_wait_pb_ready(void) 132 { 133 134 int ret; 135 int timeout = 10; 136 u8 val; 137 138 do { 139 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, 140 TWL4030_PM_MASTER_PB_CFG); 141 if (ret < 0) 142 return ret; 143 144 if (!(val & PB_I2C_BUSY)) 145 return 0; 146 147 mdelay(1); 148 timeout--; 149 } while (timeout); 150 151 return -ETIMEDOUT; 152 } 153 154 /* Send a word over the powerbus */ 155 static int twl4030_send_pb_msg(unsigned msg) 156 { 157 u8 val; 158 int ret; 159 160 /* save powerbus configuration */ 161 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, 162 TWL4030_PM_MASTER_PB_CFG); 163 if (ret < 0) 164 return ret; 165 166 /* Enable i2c access to powerbus */ 167 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN, 168 TWL4030_PM_MASTER_PB_CFG); 169 if (ret < 0) 170 return ret; 171 172 ret = twl4030_wait_pb_ready(); 173 if (ret < 0) 174 return ret; 175 176 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8, 177 TWL4030_PM_MASTER_PB_WORD_MSB); 178 if (ret < 0) 179 return ret; 180 181 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff, 182 TWL4030_PM_MASTER_PB_WORD_LSB); 183 if (ret < 0) 184 return ret; 185 186 ret = twl4030_wait_pb_ready(); 187 if (ret < 0) 188 return ret; 189 190 /* Restore powerbus configuration */ 191 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val, 192 TWL4030_PM_MASTER_PB_CFG); 193 } 194 195 static int twl4030reg_enable(struct regulator_dev *rdev) 196 { 197 struct twlreg_info *info = rdev_get_drvdata(rdev); 198 int grp; 199 200 grp = twlreg_grp(rdev); 201 if (grp < 0) 202 return grp; 203 204 grp |= P1_GRP_4030; 205 206 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); 207 } 208 209 static int twl4030reg_disable(struct regulator_dev *rdev) 210 { 211 struct twlreg_info *info = rdev_get_drvdata(rdev); 212 int grp; 213 214 grp = twlreg_grp(rdev); 215 if (grp < 0) 216 return grp; 217 218 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030); 219 220 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); 221 } 222 223 static int twl4030reg_get_status(struct regulator_dev *rdev) 224 { 225 int state = twlreg_grp(rdev); 226 227 if (state < 0) 228 return state; 229 state &= 0x0f; 230 231 /* assume state != WARM_RESET; we'd not be running... */ 232 if (!state) 233 return REGULATOR_STATUS_OFF; 234 return (state & BIT(3)) 235 ? REGULATOR_STATUS_NORMAL 236 : REGULATOR_STATUS_STANDBY; 237 } 238 239 static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode) 240 { 241 struct twlreg_info *info = rdev_get_drvdata(rdev); 242 unsigned message; 243 244 /* We can only set the mode through state machine commands... */ 245 switch (mode) { 246 case REGULATOR_MODE_NORMAL: 247 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE); 248 break; 249 case REGULATOR_MODE_STANDBY: 250 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP); 251 break; 252 default: 253 return -EINVAL; 254 } 255 256 return twl4030_send_pb_msg(message); 257 } 258 259 static inline unsigned int twl4030reg_map_mode(unsigned int mode) 260 { 261 switch (mode) { 262 case RES_STATE_ACTIVE: 263 return REGULATOR_MODE_NORMAL; 264 case RES_STATE_SLEEP: 265 return REGULATOR_MODE_STANDBY; 266 default: 267 return REGULATOR_MODE_INVALID; 268 } 269 } 270 271 /*----------------------------------------------------------------------*/ 272 273 /* 274 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage 275 * select field in its control register. We use tables indexed by VSEL 276 * to record voltages in milliVolts. (Accuracy is about three percent.) 277 * 278 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon; 279 * currently handled by listing two slightly different VAUX2 regulators, 280 * only one of which will be configured. 281 * 282 * VSEL values documented as "TI cannot support these values" are flagged 283 * in these tables as UNSUP() values; we normally won't assign them. 284 * 285 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported. 286 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting. 287 */ 288 #define UNSUP_MASK 0x8000 289 290 #define UNSUP(x) (UNSUP_MASK | (x)) 291 #define IS_UNSUP(info, x) \ 292 ((UNSUP_MASK & (x)) && \ 293 !((info)->features & TWL4030_ALLOW_UNSUPPORTED)) 294 #define LDO_MV(x) (~UNSUP_MASK & (x)) 295 296 297 static const u16 VAUX1_VSEL_table[] = { 298 UNSUP(1500), UNSUP(1800), 2500, 2800, 299 3000, 3000, 3000, 3000, 300 }; 301 static const u16 VAUX2_4030_VSEL_table[] = { 302 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300, 303 1500, 1800, UNSUP(1850), 2500, 304 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), 305 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 306 }; 307 static const u16 VAUX2_VSEL_table[] = { 308 1700, 1700, 1900, 1300, 309 1500, 1800, 2000, 2500, 310 2100, 2800, 2200, 2300, 311 2400, 2400, 2400, 2400, 312 }; 313 static const u16 VAUX3_VSEL_table[] = { 314 1500, 1800, 2500, 2800, 315 3000, 3000, 3000, 3000, 316 }; 317 static const u16 VAUX4_VSEL_table[] = { 318 700, 1000, 1200, UNSUP(1300), 319 1500, 1800, UNSUP(1850), 2500, 320 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), 321 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 322 }; 323 static const u16 VMMC1_VSEL_table[] = { 324 1850, 2850, 3000, 3150, 325 }; 326 static const u16 VMMC2_VSEL_table[] = { 327 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300), 328 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500), 329 2600, 2800, 2850, 3000, 330 3150, 3150, 3150, 3150, 331 }; 332 static const u16 VPLL1_VSEL_table[] = { 333 1000, 1200, 1300, 1800, 334 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000), 335 }; 336 static const u16 VPLL2_VSEL_table[] = { 337 700, 1000, 1200, 1300, 338 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500), 339 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000), 340 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 341 }; 342 static const u16 VSIM_VSEL_table[] = { 343 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800, 344 2800, 3000, 3000, 3000, 345 }; 346 static const u16 VDAC_VSEL_table[] = { 347 1200, 1300, 1800, 1800, 348 }; 349 static const u16 VIO_VSEL_table[] = { 350 1800, 1850, 351 }; 352 static const u16 VINTANA2_VSEL_table[] = { 353 2500, 2750, 354 }; 355 356 /* 600mV to 1450mV in 12.5 mV steps */ 357 static const struct linear_range VDD1_ranges[] = { 358 REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500) 359 }; 360 361 /* 600mV to 1450mV in 12.5 mV steps, everything above = 1500mV */ 362 static const struct linear_range VDD2_ranges[] = { 363 REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500), 364 REGULATOR_LINEAR_RANGE(1500000, 69, 69, 12500) 365 }; 366 367 static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index) 368 { 369 struct twlreg_info *info = rdev_get_drvdata(rdev); 370 int mV = info->table[index]; 371 372 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000); 373 } 374 375 static int 376 twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) 377 { 378 struct twlreg_info *info = rdev_get_drvdata(rdev); 379 380 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, 381 selector); 382 } 383 384 static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev) 385 { 386 struct twlreg_info *info = rdev_get_drvdata(rdev); 387 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE); 388 389 if (vsel < 0) 390 return vsel; 391 392 vsel &= info->table_len - 1; 393 return vsel; 394 } 395 396 static const struct regulator_ops twl4030ldo_ops = { 397 .list_voltage = twl4030ldo_list_voltage, 398 399 .set_voltage_sel = twl4030ldo_set_voltage_sel, 400 .get_voltage_sel = twl4030ldo_get_voltage_sel, 401 402 .enable = twl4030reg_enable, 403 .disable = twl4030reg_disable, 404 .is_enabled = twl4030reg_is_enabled, 405 406 .set_mode = twl4030reg_set_mode, 407 408 .get_status = twl4030reg_get_status, 409 }; 410 411 static int 412 twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, 413 unsigned *selector) 414 { 415 struct twlreg_info *info = rdev_get_drvdata(rdev); 416 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500); 417 418 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030, vsel); 419 420 return 0; 421 } 422 423 static int twl4030smps_get_voltage(struct regulator_dev *rdev) 424 { 425 struct twlreg_info *info = rdev_get_drvdata(rdev); 426 int vsel; 427 428 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, 429 VREG_VOLTAGE_SMPS_4030); 430 431 return vsel * 12500 + 600000; 432 } 433 434 static const struct regulator_ops twl4030smps_ops = { 435 .list_voltage = regulator_list_voltage_linear_range, 436 437 .set_voltage = twl4030smps_set_voltage, 438 .get_voltage = twl4030smps_get_voltage, 439 }; 440 441 /*----------------------------------------------------------------------*/ 442 443 static const struct regulator_ops twl4030fixed_ops = { 444 .list_voltage = regulator_list_voltage_linear, 445 446 .enable = twl4030reg_enable, 447 .disable = twl4030reg_disable, 448 .is_enabled = twl4030reg_is_enabled, 449 450 .set_mode = twl4030reg_set_mode, 451 452 .get_status = twl4030reg_get_status, 453 }; 454 455 /*----------------------------------------------------------------------*/ 456 457 #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \ 458 static const struct twlreg_info TWL4030_INFO_##label = { \ 459 .base = offset, \ 460 .id = num, \ 461 .table_len = ARRAY_SIZE(label##_VSEL_table), \ 462 .table = label##_VSEL_table, \ 463 .remap = remap_conf, \ 464 .desc = { \ 465 .name = #label, \ 466 .id = TWL4030_REG_##label, \ 467 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \ 468 .ops = &twl4030ldo_ops, \ 469 .type = REGULATOR_VOLTAGE, \ 470 .owner = THIS_MODULE, \ 471 .enable_time = turnon_delay, \ 472 .of_map_mode = twl4030reg_map_mode, \ 473 }, \ 474 } 475 476 #define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf, \ 477 n_volt) \ 478 static const struct twlreg_info TWL4030_INFO_##label = { \ 479 .base = offset, \ 480 .id = num, \ 481 .remap = remap_conf, \ 482 .desc = { \ 483 .name = #label, \ 484 .id = TWL4030_REG_##label, \ 485 .ops = &twl4030smps_ops, \ 486 .type = REGULATOR_VOLTAGE, \ 487 .owner = THIS_MODULE, \ 488 .enable_time = turnon_delay, \ 489 .of_map_mode = twl4030reg_map_mode, \ 490 .n_voltages = n_volt, \ 491 .n_linear_ranges = ARRAY_SIZE(label ## _ranges), \ 492 .linear_ranges = label ## _ranges, \ 493 }, \ 494 } 495 496 #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ 497 remap_conf) \ 498 static const struct twlreg_info TWLFIXED_INFO_##label = { \ 499 .base = offset, \ 500 .id = num, \ 501 .remap = remap_conf, \ 502 .desc = { \ 503 .name = #label, \ 504 .id = TWL4030##_REG_##label, \ 505 .n_voltages = 1, \ 506 .ops = &twl4030fixed_ops, \ 507 .type = REGULATOR_VOLTAGE, \ 508 .owner = THIS_MODULE, \ 509 .min_uV = mVolts * 1000, \ 510 .enable_time = turnon_delay, \ 511 .of_map_mode = twl4030reg_map_mode, \ 512 }, \ 513 } 514 515 /* 516 * We list regulators here if systems need some level of 517 * software control over them after boot. 518 */ 519 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08); 520 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08); 521 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08); 522 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08); 523 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08); 524 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08); 525 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08); 526 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00); 527 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08); 528 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00); 529 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08); 530 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08); 531 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08); 532 TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08, 68); 533 TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08, 69); 534 /* VUSBCP is managed *only* by the USB subchip */ 535 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08); 536 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08); 537 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08); 538 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08); 539 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08); 540 541 #define TWL_OF_MATCH(comp, family, label) \ 542 { \ 543 .compatible = comp, \ 544 .data = &family##_INFO_##label, \ 545 } 546 547 #define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label) 548 #define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label) 549 #define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label) 550 #define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label) 551 #define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label) 552 553 static const struct of_device_id twl_of_match[] = { 554 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1), 555 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030), 556 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2), 557 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3), 558 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4), 559 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1), 560 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2), 561 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1), 562 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2), 563 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM), 564 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC), 565 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2), 566 TWL4030_OF_MATCH("ti,twl4030-vio", VIO), 567 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1), 568 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2), 569 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1), 570 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG), 571 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5), 572 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8), 573 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1), 574 {}, 575 }; 576 MODULE_DEVICE_TABLE(of, twl_of_match); 577 578 static int twlreg_probe(struct platform_device *pdev) 579 { 580 int id; 581 struct twlreg_info *info; 582 const struct twlreg_info *template; 583 struct regulator_init_data *initdata; 584 struct regulation_constraints *c; 585 struct regulator_dev *rdev; 586 struct regulator_config config = { }; 587 588 template = of_device_get_match_data(&pdev->dev); 589 if (!template) 590 return -ENODEV; 591 592 id = template->desc.id; 593 initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node, 594 &template->desc); 595 if (!initdata) 596 return -EINVAL; 597 598 info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL); 599 if (!info) 600 return -ENOMEM; 601 602 /* Constrain board-specific capabilities according to what 603 * this driver and the chip itself can actually do. 604 */ 605 c = &initdata->constraints; 606 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY; 607 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE 608 | REGULATOR_CHANGE_MODE 609 | REGULATOR_CHANGE_STATUS; 610 switch (id) { 611 case TWL4030_REG_VIO: 612 case TWL4030_REG_VDD1: 613 case TWL4030_REG_VDD2: 614 case TWL4030_REG_VPLL1: 615 case TWL4030_REG_VINTANA1: 616 case TWL4030_REG_VINTANA2: 617 case TWL4030_REG_VINTDIG: 618 c->always_on = true; 619 break; 620 default: 621 break; 622 } 623 624 config.dev = &pdev->dev; 625 config.init_data = initdata; 626 config.driver_data = info; 627 config.of_node = pdev->dev.of_node; 628 629 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); 630 if (IS_ERR(rdev)) { 631 dev_err(&pdev->dev, "can't register %s, %ld\n", 632 info->desc.name, PTR_ERR(rdev)); 633 return PTR_ERR(rdev); 634 } 635 platform_set_drvdata(pdev, rdev); 636 637 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, info->remap); 638 639 /* NOTE: many regulators support short-circuit IRQs (presentable 640 * as REGULATOR_OVER_CURRENT notifications?) configured via: 641 * - SC_CONFIG 642 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4) 643 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2) 644 * - IT_CONFIG 645 */ 646 647 return 0; 648 } 649 650 MODULE_ALIAS("platform:twl4030_reg"); 651 652 static struct platform_driver twlreg_driver = { 653 .probe = twlreg_probe, 654 /* NOTE: short name, to work around driver model truncation of 655 * "twl_regulator.12" (and friends) to "twl_regulator.1". 656 */ 657 .driver = { 658 .name = "twl4030_reg", 659 .of_match_table = of_match_ptr(twl_of_match), 660 }, 661 }; 662 663 static int __init twlreg_init(void) 664 { 665 return platform_driver_register(&twlreg_driver); 666 } 667 subsys_initcall(twlreg_init); 668 669 static void __exit twlreg_exit(void) 670 { 671 platform_driver_unregister(&twlreg_driver); 672 } 673 module_exit(twlreg_exit) 674 675 MODULE_DESCRIPTION("TWL4030 regulator driver"); 676 MODULE_LICENSE("GPL"); 677