1 /* 2 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips 3 * 4 * Copyright (C) 2008 David Brownell 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/string.h> 14 #include <linux/slab.h> 15 #include <linux/init.h> 16 #include <linux/err.h> 17 #include <linux/platform_device.h> 18 #include <linux/of.h> 19 #include <linux/of_device.h> 20 #include <linux/regulator/driver.h> 21 #include <linux/regulator/machine.h> 22 #include <linux/regulator/of_regulator.h> 23 #include <linux/mfd/twl.h> 24 #include <linux/delay.h> 25 26 /* 27 * The TWL4030/TW5030/TPS659x0 family chips include power management, a 28 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions 29 * include an audio codec, battery charger, and more voltage regulators. 30 * These chips are often used in OMAP-based systems. 31 * 32 * This driver implements software-based resource control for various 33 * voltage regulators. This is usually augmented with state machine 34 * based control. 35 */ 36 37 struct twlreg_info { 38 /* start of regulator's PM_RECEIVER control register bank */ 39 u8 base; 40 41 /* twl resource ID, for resource control state machine */ 42 u8 id; 43 44 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */ 45 u8 table_len; 46 const u16 *table; 47 48 /* State REMAP default configuration */ 49 u8 remap; 50 51 /* used by regulator core */ 52 struct regulator_desc desc; 53 54 /* chip specific features */ 55 unsigned long features; 56 57 /* data passed from board for external get/set voltage */ 58 void *data; 59 }; 60 61 62 /* LDO control registers ... offset is from the base of its register bank. 63 * The first three registers of all power resource banks help hardware to 64 * manage the various resource groups. 65 */ 66 /* Common offset in TWL4030/6030 */ 67 #define VREG_GRP 0 68 /* TWL4030 register offsets */ 69 #define VREG_TYPE 1 70 #define VREG_REMAP 2 71 #define VREG_DEDICATED 3 /* LDO control */ 72 #define VREG_VOLTAGE_SMPS_4030 9 73 /* TWL6030 register offsets */ 74 #define VREG_TRANS 1 75 #define VREG_STATE 2 76 #define VREG_VOLTAGE 3 77 #define VREG_VOLTAGE_SMPS 4 78 79 static inline int 80 twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset) 81 { 82 u8 value; 83 int status; 84 85 status = twl_i2c_read_u8(slave_subgp, 86 &value, info->base + offset); 87 return (status < 0) ? status : value; 88 } 89 90 static inline int 91 twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset, 92 u8 value) 93 { 94 return twl_i2c_write_u8(slave_subgp, 95 value, info->base + offset); 96 } 97 98 /*----------------------------------------------------------------------*/ 99 100 /* generic power resource operations, which work on all regulators */ 101 102 static int twlreg_grp(struct regulator_dev *rdev) 103 { 104 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, 105 VREG_GRP); 106 } 107 108 /* 109 * Enable/disable regulators by joining/leaving the P1 (processor) group. 110 * We assume nobody else is updating the DEV_GRP registers. 111 */ 112 /* definition for 4030 family */ 113 #define P3_GRP_4030 BIT(7) /* "peripherals" */ 114 #define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */ 115 #define P1_GRP_4030 BIT(5) /* CPU/Linux */ 116 /* definition for 6030 family */ 117 #define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */ 118 #define P2_GRP_6030 BIT(1) /* "peripherals" */ 119 #define P1_GRP_6030 BIT(0) /* CPU/Linux */ 120 121 static int twl4030reg_is_enabled(struct regulator_dev *rdev) 122 { 123 int state = twlreg_grp(rdev); 124 125 if (state < 0) 126 return state; 127 128 return state & P1_GRP_4030; 129 } 130 131 #define PB_I2C_BUSY BIT(0) 132 #define PB_I2C_BWEN BIT(1) 133 134 /* Wait until buffer empty/ready to send a word on power bus. */ 135 static int twl4030_wait_pb_ready(void) 136 { 137 138 int ret; 139 int timeout = 10; 140 u8 val; 141 142 do { 143 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, 144 TWL4030_PM_MASTER_PB_CFG); 145 if (ret < 0) 146 return ret; 147 148 if (!(val & PB_I2C_BUSY)) 149 return 0; 150 151 mdelay(1); 152 timeout--; 153 } while (timeout); 154 155 return -ETIMEDOUT; 156 } 157 158 /* Send a word over the powerbus */ 159 static int twl4030_send_pb_msg(unsigned msg) 160 { 161 u8 val; 162 int ret; 163 164 /* save powerbus configuration */ 165 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, 166 TWL4030_PM_MASTER_PB_CFG); 167 if (ret < 0) 168 return ret; 169 170 /* Enable i2c access to powerbus */ 171 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN, 172 TWL4030_PM_MASTER_PB_CFG); 173 if (ret < 0) 174 return ret; 175 176 ret = twl4030_wait_pb_ready(); 177 if (ret < 0) 178 return ret; 179 180 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8, 181 TWL4030_PM_MASTER_PB_WORD_MSB); 182 if (ret < 0) 183 return ret; 184 185 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff, 186 TWL4030_PM_MASTER_PB_WORD_LSB); 187 if (ret < 0) 188 return ret; 189 190 ret = twl4030_wait_pb_ready(); 191 if (ret < 0) 192 return ret; 193 194 /* Restore powerbus configuration */ 195 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val, 196 TWL4030_PM_MASTER_PB_CFG); 197 } 198 199 static int twl4030reg_enable(struct regulator_dev *rdev) 200 { 201 struct twlreg_info *info = rdev_get_drvdata(rdev); 202 int grp; 203 int ret; 204 205 grp = twlreg_grp(rdev); 206 if (grp < 0) 207 return grp; 208 209 grp |= P1_GRP_4030; 210 211 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); 212 213 return ret; 214 } 215 216 static int twl4030reg_disable(struct regulator_dev *rdev) 217 { 218 struct twlreg_info *info = rdev_get_drvdata(rdev); 219 int grp; 220 int ret; 221 222 grp = twlreg_grp(rdev); 223 if (grp < 0) 224 return grp; 225 226 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030); 227 228 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); 229 230 return ret; 231 } 232 233 static int twl4030reg_get_status(struct regulator_dev *rdev) 234 { 235 int state = twlreg_grp(rdev); 236 237 if (state < 0) 238 return state; 239 state &= 0x0f; 240 241 /* assume state != WARM_RESET; we'd not be running... */ 242 if (!state) 243 return REGULATOR_STATUS_OFF; 244 return (state & BIT(3)) 245 ? REGULATOR_STATUS_NORMAL 246 : REGULATOR_STATUS_STANDBY; 247 } 248 249 static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode) 250 { 251 struct twlreg_info *info = rdev_get_drvdata(rdev); 252 unsigned message; 253 254 /* We can only set the mode through state machine commands... */ 255 switch (mode) { 256 case REGULATOR_MODE_NORMAL: 257 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE); 258 break; 259 case REGULATOR_MODE_STANDBY: 260 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP); 261 break; 262 default: 263 return -EINVAL; 264 } 265 266 return twl4030_send_pb_msg(message); 267 } 268 269 static inline unsigned int twl4030reg_map_mode(unsigned int mode) 270 { 271 switch (mode) { 272 case RES_STATE_ACTIVE: 273 return REGULATOR_MODE_NORMAL; 274 case RES_STATE_SLEEP: 275 return REGULATOR_MODE_STANDBY; 276 default: 277 return REGULATOR_MODE_INVALID; 278 } 279 } 280 281 /*----------------------------------------------------------------------*/ 282 283 /* 284 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage 285 * select field in its control register. We use tables indexed by VSEL 286 * to record voltages in milliVolts. (Accuracy is about three percent.) 287 * 288 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon; 289 * currently handled by listing two slightly different VAUX2 regulators, 290 * only one of which will be configured. 291 * 292 * VSEL values documented as "TI cannot support these values" are flagged 293 * in these tables as UNSUP() values; we normally won't assign them. 294 * 295 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported. 296 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting. 297 */ 298 #define UNSUP_MASK 0x8000 299 300 #define UNSUP(x) (UNSUP_MASK | (x)) 301 #define IS_UNSUP(info, x) \ 302 ((UNSUP_MASK & (x)) && \ 303 !((info)->features & TWL4030_ALLOW_UNSUPPORTED)) 304 #define LDO_MV(x) (~UNSUP_MASK & (x)) 305 306 307 static const u16 VAUX1_VSEL_table[] = { 308 UNSUP(1500), UNSUP(1800), 2500, 2800, 309 3000, 3000, 3000, 3000, 310 }; 311 static const u16 VAUX2_4030_VSEL_table[] = { 312 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300, 313 1500, 1800, UNSUP(1850), 2500, 314 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), 315 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 316 }; 317 static const u16 VAUX2_VSEL_table[] = { 318 1700, 1700, 1900, 1300, 319 1500, 1800, 2000, 2500, 320 2100, 2800, 2200, 2300, 321 2400, 2400, 2400, 2400, 322 }; 323 static const u16 VAUX3_VSEL_table[] = { 324 1500, 1800, 2500, 2800, 325 3000, 3000, 3000, 3000, 326 }; 327 static const u16 VAUX4_VSEL_table[] = { 328 700, 1000, 1200, UNSUP(1300), 329 1500, 1800, UNSUP(1850), 2500, 330 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), 331 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 332 }; 333 static const u16 VMMC1_VSEL_table[] = { 334 1850, 2850, 3000, 3150, 335 }; 336 static const u16 VMMC2_VSEL_table[] = { 337 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300), 338 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500), 339 2600, 2800, 2850, 3000, 340 3150, 3150, 3150, 3150, 341 }; 342 static const u16 VPLL1_VSEL_table[] = { 343 1000, 1200, 1300, 1800, 344 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000), 345 }; 346 static const u16 VPLL2_VSEL_table[] = { 347 700, 1000, 1200, 1300, 348 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500), 349 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000), 350 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 351 }; 352 static const u16 VSIM_VSEL_table[] = { 353 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800, 354 2800, 3000, 3000, 3000, 355 }; 356 static const u16 VDAC_VSEL_table[] = { 357 1200, 1300, 1800, 1800, 358 }; 359 static const u16 VIO_VSEL_table[] = { 360 1800, 1850, 361 }; 362 static const u16 VINTANA2_VSEL_table[] = { 363 2500, 2750, 364 }; 365 366 static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index) 367 { 368 struct twlreg_info *info = rdev_get_drvdata(rdev); 369 int mV = info->table[index]; 370 371 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000); 372 } 373 374 static int 375 twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) 376 { 377 struct twlreg_info *info = rdev_get_drvdata(rdev); 378 379 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, 380 selector); 381 } 382 383 static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev) 384 { 385 struct twlreg_info *info = rdev_get_drvdata(rdev); 386 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE); 387 388 if (vsel < 0) 389 return vsel; 390 391 vsel &= info->table_len - 1; 392 return vsel; 393 } 394 395 static struct regulator_ops twl4030ldo_ops = { 396 .list_voltage = twl4030ldo_list_voltage, 397 398 .set_voltage_sel = twl4030ldo_set_voltage_sel, 399 .get_voltage_sel = twl4030ldo_get_voltage_sel, 400 401 .enable = twl4030reg_enable, 402 .disable = twl4030reg_disable, 403 .is_enabled = twl4030reg_is_enabled, 404 405 .set_mode = twl4030reg_set_mode, 406 407 .get_status = twl4030reg_get_status, 408 }; 409 410 static int 411 twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, 412 unsigned *selector) 413 { 414 struct twlreg_info *info = rdev_get_drvdata(rdev); 415 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500); 416 417 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030, vsel); 418 419 return 0; 420 } 421 422 static int twl4030smps_get_voltage(struct regulator_dev *rdev) 423 { 424 struct twlreg_info *info = rdev_get_drvdata(rdev); 425 int vsel; 426 427 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, 428 VREG_VOLTAGE_SMPS_4030); 429 430 return vsel * 12500 + 600000; 431 } 432 433 static struct regulator_ops twl4030smps_ops = { 434 .set_voltage = twl4030smps_set_voltage, 435 .get_voltage = twl4030smps_get_voltage, 436 }; 437 438 /*----------------------------------------------------------------------*/ 439 440 static struct regulator_ops twl4030fixed_ops = { 441 .list_voltage = regulator_list_voltage_linear, 442 443 .enable = twl4030reg_enable, 444 .disable = twl4030reg_disable, 445 .is_enabled = twl4030reg_is_enabled, 446 447 .set_mode = twl4030reg_set_mode, 448 449 .get_status = twl4030reg_get_status, 450 }; 451 452 /*----------------------------------------------------------------------*/ 453 454 #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \ 455 static const struct twlreg_info TWL4030_INFO_##label = { \ 456 .base = offset, \ 457 .id = num, \ 458 .table_len = ARRAY_SIZE(label##_VSEL_table), \ 459 .table = label##_VSEL_table, \ 460 .remap = remap_conf, \ 461 .desc = { \ 462 .name = #label, \ 463 .id = TWL4030_REG_##label, \ 464 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \ 465 .ops = &twl4030ldo_ops, \ 466 .type = REGULATOR_VOLTAGE, \ 467 .owner = THIS_MODULE, \ 468 .enable_time = turnon_delay, \ 469 .of_map_mode = twl4030reg_map_mode, \ 470 }, \ 471 } 472 473 #define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf) \ 474 static const struct twlreg_info TWL4030_INFO_##label = { \ 475 .base = offset, \ 476 .id = num, \ 477 .remap = remap_conf, \ 478 .desc = { \ 479 .name = #label, \ 480 .id = TWL4030_REG_##label, \ 481 .ops = &twl4030smps_ops, \ 482 .type = REGULATOR_VOLTAGE, \ 483 .owner = THIS_MODULE, \ 484 .enable_time = turnon_delay, \ 485 .of_map_mode = twl4030reg_map_mode, \ 486 }, \ 487 } 488 489 #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ 490 remap_conf) \ 491 static const struct twlreg_info TWLFIXED_INFO_##label = { \ 492 .base = offset, \ 493 .id = num, \ 494 .remap = remap_conf, \ 495 .desc = { \ 496 .name = #label, \ 497 .id = TWL4030##_REG_##label, \ 498 .n_voltages = 1, \ 499 .ops = &twl4030fixed_ops, \ 500 .type = REGULATOR_VOLTAGE, \ 501 .owner = THIS_MODULE, \ 502 .min_uV = mVolts * 1000, \ 503 .enable_time = turnon_delay, \ 504 .of_map_mode = twl4030reg_map_mode, \ 505 }, \ 506 } 507 508 /* 509 * We list regulators here if systems need some level of 510 * software control over them after boot. 511 */ 512 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08); 513 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08); 514 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08); 515 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08); 516 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08); 517 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08); 518 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08); 519 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00); 520 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08); 521 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00); 522 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08); 523 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08); 524 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08); 525 TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08); 526 TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08); 527 /* VUSBCP is managed *only* by the USB subchip */ 528 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08); 529 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08); 530 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08); 531 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08); 532 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08); 533 534 #define TWL_OF_MATCH(comp, family, label) \ 535 { \ 536 .compatible = comp, \ 537 .data = &family##_INFO_##label, \ 538 } 539 540 #define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label) 541 #define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label) 542 #define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label) 543 #define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label) 544 #define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label) 545 546 static const struct of_device_id twl_of_match[] = { 547 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1), 548 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030), 549 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2), 550 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3), 551 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4), 552 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1), 553 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2), 554 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1), 555 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2), 556 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM), 557 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC), 558 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2), 559 TWL4030_OF_MATCH("ti,twl4030-vio", VIO), 560 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1), 561 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2), 562 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1), 563 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG), 564 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5), 565 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8), 566 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1), 567 {}, 568 }; 569 MODULE_DEVICE_TABLE(of, twl_of_match); 570 571 static int twlreg_probe(struct platform_device *pdev) 572 { 573 int id; 574 struct twlreg_info *info; 575 const struct twlreg_info *template; 576 struct regulator_init_data *initdata; 577 struct regulation_constraints *c; 578 struct regulator_dev *rdev; 579 struct regulator_config config = { }; 580 581 template = of_device_get_match_data(&pdev->dev); 582 if (!template) 583 return -ENODEV; 584 585 id = template->desc.id; 586 initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node, 587 &template->desc); 588 if (!initdata) 589 return -EINVAL; 590 591 info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL); 592 if (!info) 593 return -ENOMEM; 594 595 /* Constrain board-specific capabilities according to what 596 * this driver and the chip itself can actually do. 597 */ 598 c = &initdata->constraints; 599 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY; 600 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE 601 | REGULATOR_CHANGE_MODE 602 | REGULATOR_CHANGE_STATUS; 603 switch (id) { 604 case TWL4030_REG_VIO: 605 case TWL4030_REG_VDD1: 606 case TWL4030_REG_VDD2: 607 case TWL4030_REG_VPLL1: 608 case TWL4030_REG_VINTANA1: 609 case TWL4030_REG_VINTANA2: 610 case TWL4030_REG_VINTDIG: 611 c->always_on = true; 612 break; 613 default: 614 break; 615 } 616 617 config.dev = &pdev->dev; 618 config.init_data = initdata; 619 config.driver_data = info; 620 config.of_node = pdev->dev.of_node; 621 622 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); 623 if (IS_ERR(rdev)) { 624 dev_err(&pdev->dev, "can't register %s, %ld\n", 625 info->desc.name, PTR_ERR(rdev)); 626 return PTR_ERR(rdev); 627 } 628 platform_set_drvdata(pdev, rdev); 629 630 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, info->remap); 631 632 /* NOTE: many regulators support short-circuit IRQs (presentable 633 * as REGULATOR_OVER_CURRENT notifications?) configured via: 634 * - SC_CONFIG 635 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4) 636 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2) 637 * - IT_CONFIG 638 */ 639 640 return 0; 641 } 642 643 MODULE_ALIAS("platform:twl4030_reg"); 644 645 static struct platform_driver twlreg_driver = { 646 .probe = twlreg_probe, 647 /* NOTE: short name, to work around driver model truncation of 648 * "twl_regulator.12" (and friends) to "twl_regulator.1". 649 */ 650 .driver = { 651 .name = "twl4030_reg", 652 .of_match_table = of_match_ptr(twl_of_match), 653 }, 654 }; 655 656 static int __init twlreg_init(void) 657 { 658 return platform_driver_register(&twlreg_driver); 659 } 660 subsys_initcall(twlreg_init); 661 662 static void __exit twlreg_exit(void) 663 { 664 platform_driver_unregister(&twlreg_driver); 665 } 666 module_exit(twlreg_exit) 667 668 MODULE_DESCRIPTION("TWL4030 regulator driver"); 669 MODULE_LICENSE("GPL"); 670