1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * twl-regulator.c -- support regulators in twl4030/twl6030 family chips 4 * 5 * Copyright (C) 2008 David Brownell 6 */ 7 8 #include <linux/module.h> 9 #include <linux/string.h> 10 #include <linux/slab.h> 11 #include <linux/init.h> 12 #include <linux/err.h> 13 #include <linux/platform_device.h> 14 #include <linux/of.h> 15 #include <linux/of_device.h> 16 #include <linux/regulator/driver.h> 17 #include <linux/regulator/machine.h> 18 #include <linux/regulator/of_regulator.h> 19 #include <linux/mfd/twl.h> 20 #include <linux/delay.h> 21 22 /* 23 * The TWL4030/TW5030/TPS659x0 family chips include power management, a 24 * USB OTG transceiver, an RTC, ADC, PWM, and lots more. Some versions 25 * include an audio codec, battery charger, and more voltage regulators. 26 * These chips are often used in OMAP-based systems. 27 * 28 * This driver implements software-based resource control for various 29 * voltage regulators. This is usually augmented with state machine 30 * based control. 31 */ 32 33 struct twlreg_info { 34 /* start of regulator's PM_RECEIVER control register bank */ 35 u8 base; 36 37 /* twl resource ID, for resource control state machine */ 38 u8 id; 39 40 /* voltage in mV = table[VSEL]; table_len must be a power-of-two */ 41 u8 table_len; 42 const u16 *table; 43 44 /* State REMAP default configuration */ 45 u8 remap; 46 47 /* used by regulator core */ 48 struct regulator_desc desc; 49 50 /* chip specific features */ 51 unsigned long features; 52 53 /* data passed from board for external get/set voltage */ 54 void *data; 55 }; 56 57 58 /* LDO control registers ... offset is from the base of its register bank. 59 * The first three registers of all power resource banks help hardware to 60 * manage the various resource groups. 61 */ 62 /* Common offset in TWL4030/6030 */ 63 #define VREG_GRP 0 64 /* TWL4030 register offsets */ 65 #define VREG_TYPE 1 66 #define VREG_REMAP 2 67 #define VREG_DEDICATED 3 /* LDO control */ 68 #define VREG_VOLTAGE_SMPS_4030 9 69 /* TWL6030 register offsets */ 70 #define VREG_TRANS 1 71 #define VREG_STATE 2 72 #define VREG_VOLTAGE 3 73 #define VREG_VOLTAGE_SMPS 4 74 75 static inline int 76 twlreg_read(struct twlreg_info *info, unsigned slave_subgp, unsigned offset) 77 { 78 u8 value; 79 int status; 80 81 status = twl_i2c_read_u8(slave_subgp, 82 &value, info->base + offset); 83 return (status < 0) ? status : value; 84 } 85 86 static inline int 87 twlreg_write(struct twlreg_info *info, unsigned slave_subgp, unsigned offset, 88 u8 value) 89 { 90 return twl_i2c_write_u8(slave_subgp, 91 value, info->base + offset); 92 } 93 94 /*----------------------------------------------------------------------*/ 95 96 /* generic power resource operations, which work on all regulators */ 97 98 static int twlreg_grp(struct regulator_dev *rdev) 99 { 100 return twlreg_read(rdev_get_drvdata(rdev), TWL_MODULE_PM_RECEIVER, 101 VREG_GRP); 102 } 103 104 /* 105 * Enable/disable regulators by joining/leaving the P1 (processor) group. 106 * We assume nobody else is updating the DEV_GRP registers. 107 */ 108 /* definition for 4030 family */ 109 #define P3_GRP_4030 BIT(7) /* "peripherals" */ 110 #define P2_GRP_4030 BIT(6) /* secondary processor, modem, etc */ 111 #define P1_GRP_4030 BIT(5) /* CPU/Linux */ 112 /* definition for 6030 family */ 113 #define P3_GRP_6030 BIT(2) /* secondary processor, modem, etc */ 114 #define P2_GRP_6030 BIT(1) /* "peripherals" */ 115 #define P1_GRP_6030 BIT(0) /* CPU/Linux */ 116 117 static int twl4030reg_is_enabled(struct regulator_dev *rdev) 118 { 119 int state = twlreg_grp(rdev); 120 121 if (state < 0) 122 return state; 123 124 return state & P1_GRP_4030; 125 } 126 127 #define PB_I2C_BUSY BIT(0) 128 #define PB_I2C_BWEN BIT(1) 129 130 /* Wait until buffer empty/ready to send a word on power bus. */ 131 static int twl4030_wait_pb_ready(void) 132 { 133 134 int ret; 135 int timeout = 10; 136 u8 val; 137 138 do { 139 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, 140 TWL4030_PM_MASTER_PB_CFG); 141 if (ret < 0) 142 return ret; 143 144 if (!(val & PB_I2C_BUSY)) 145 return 0; 146 147 mdelay(1); 148 timeout--; 149 } while (timeout); 150 151 return -ETIMEDOUT; 152 } 153 154 /* Send a word over the powerbus */ 155 static int twl4030_send_pb_msg(unsigned msg) 156 { 157 u8 val; 158 int ret; 159 160 /* save powerbus configuration */ 161 ret = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, 162 TWL4030_PM_MASTER_PB_CFG); 163 if (ret < 0) 164 return ret; 165 166 /* Enable i2c access to powerbus */ 167 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val | PB_I2C_BWEN, 168 TWL4030_PM_MASTER_PB_CFG); 169 if (ret < 0) 170 return ret; 171 172 ret = twl4030_wait_pb_ready(); 173 if (ret < 0) 174 return ret; 175 176 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg >> 8, 177 TWL4030_PM_MASTER_PB_WORD_MSB); 178 if (ret < 0) 179 return ret; 180 181 ret = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, msg & 0xff, 182 TWL4030_PM_MASTER_PB_WORD_LSB); 183 if (ret < 0) 184 return ret; 185 186 ret = twl4030_wait_pb_ready(); 187 if (ret < 0) 188 return ret; 189 190 /* Restore powerbus configuration */ 191 return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val, 192 TWL4030_PM_MASTER_PB_CFG); 193 } 194 195 static int twl4030reg_enable(struct regulator_dev *rdev) 196 { 197 struct twlreg_info *info = rdev_get_drvdata(rdev); 198 int grp; 199 int ret; 200 201 grp = twlreg_grp(rdev); 202 if (grp < 0) 203 return grp; 204 205 grp |= P1_GRP_4030; 206 207 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); 208 209 return ret; 210 } 211 212 static int twl4030reg_disable(struct regulator_dev *rdev) 213 { 214 struct twlreg_info *info = rdev_get_drvdata(rdev); 215 int grp; 216 int ret; 217 218 grp = twlreg_grp(rdev); 219 if (grp < 0) 220 return grp; 221 222 grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030); 223 224 ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); 225 226 return ret; 227 } 228 229 static int twl4030reg_get_status(struct regulator_dev *rdev) 230 { 231 int state = twlreg_grp(rdev); 232 233 if (state < 0) 234 return state; 235 state &= 0x0f; 236 237 /* assume state != WARM_RESET; we'd not be running... */ 238 if (!state) 239 return REGULATOR_STATUS_OFF; 240 return (state & BIT(3)) 241 ? REGULATOR_STATUS_NORMAL 242 : REGULATOR_STATUS_STANDBY; 243 } 244 245 static int twl4030reg_set_mode(struct regulator_dev *rdev, unsigned mode) 246 { 247 struct twlreg_info *info = rdev_get_drvdata(rdev); 248 unsigned message; 249 250 /* We can only set the mode through state machine commands... */ 251 switch (mode) { 252 case REGULATOR_MODE_NORMAL: 253 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_ACTIVE); 254 break; 255 case REGULATOR_MODE_STANDBY: 256 message = MSG_SINGULAR(DEV_GRP_P1, info->id, RES_STATE_SLEEP); 257 break; 258 default: 259 return -EINVAL; 260 } 261 262 return twl4030_send_pb_msg(message); 263 } 264 265 static inline unsigned int twl4030reg_map_mode(unsigned int mode) 266 { 267 switch (mode) { 268 case RES_STATE_ACTIVE: 269 return REGULATOR_MODE_NORMAL; 270 case RES_STATE_SLEEP: 271 return REGULATOR_MODE_STANDBY; 272 default: 273 return REGULATOR_MODE_INVALID; 274 } 275 } 276 277 /*----------------------------------------------------------------------*/ 278 279 /* 280 * Support for adjustable-voltage LDOs uses a four bit (or less) voltage 281 * select field in its control register. We use tables indexed by VSEL 282 * to record voltages in milliVolts. (Accuracy is about three percent.) 283 * 284 * Note that VSEL values for VAUX2 changed in twl5030 and newer silicon; 285 * currently handled by listing two slightly different VAUX2 regulators, 286 * only one of which will be configured. 287 * 288 * VSEL values documented as "TI cannot support these values" are flagged 289 * in these tables as UNSUP() values; we normally won't assign them. 290 * 291 * VAUX3 at 3V is incorrectly listed in some TI manuals as unsupported. 292 * TI are revising the twl5030/tps659x0 specs to support that 3.0V setting. 293 */ 294 #define UNSUP_MASK 0x8000 295 296 #define UNSUP(x) (UNSUP_MASK | (x)) 297 #define IS_UNSUP(info, x) \ 298 ((UNSUP_MASK & (x)) && \ 299 !((info)->features & TWL4030_ALLOW_UNSUPPORTED)) 300 #define LDO_MV(x) (~UNSUP_MASK & (x)) 301 302 303 static const u16 VAUX1_VSEL_table[] = { 304 UNSUP(1500), UNSUP(1800), 2500, 2800, 305 3000, 3000, 3000, 3000, 306 }; 307 static const u16 VAUX2_4030_VSEL_table[] = { 308 UNSUP(1000), UNSUP(1000), UNSUP(1200), 1300, 309 1500, 1800, UNSUP(1850), 2500, 310 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), 311 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 312 }; 313 static const u16 VAUX2_VSEL_table[] = { 314 1700, 1700, 1900, 1300, 315 1500, 1800, 2000, 2500, 316 2100, 2800, 2200, 2300, 317 2400, 2400, 2400, 2400, 318 }; 319 static const u16 VAUX3_VSEL_table[] = { 320 1500, 1800, 2500, 2800, 321 3000, 3000, 3000, 3000, 322 }; 323 static const u16 VAUX4_VSEL_table[] = { 324 700, 1000, 1200, UNSUP(1300), 325 1500, 1800, UNSUP(1850), 2500, 326 UNSUP(2600), 2800, UNSUP(2850), UNSUP(3000), 327 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 328 }; 329 static const u16 VMMC1_VSEL_table[] = { 330 1850, 2850, 3000, 3150, 331 }; 332 static const u16 VMMC2_VSEL_table[] = { 333 UNSUP(1000), UNSUP(1000), UNSUP(1200), UNSUP(1300), 334 UNSUP(1500), UNSUP(1800), 1850, UNSUP(2500), 335 2600, 2800, 2850, 3000, 336 3150, 3150, 3150, 3150, 337 }; 338 static const u16 VPLL1_VSEL_table[] = { 339 1000, 1200, 1300, 1800, 340 UNSUP(2800), UNSUP(3000), UNSUP(3000), UNSUP(3000), 341 }; 342 static const u16 VPLL2_VSEL_table[] = { 343 700, 1000, 1200, 1300, 344 UNSUP(1500), 1800, UNSUP(1850), UNSUP(2500), 345 UNSUP(2600), UNSUP(2800), UNSUP(2850), UNSUP(3000), 346 UNSUP(3150), UNSUP(3150), UNSUP(3150), UNSUP(3150), 347 }; 348 static const u16 VSIM_VSEL_table[] = { 349 UNSUP(1000), UNSUP(1200), UNSUP(1300), 1800, 350 2800, 3000, 3000, 3000, 351 }; 352 static const u16 VDAC_VSEL_table[] = { 353 1200, 1300, 1800, 1800, 354 }; 355 static const u16 VIO_VSEL_table[] = { 356 1800, 1850, 357 }; 358 static const u16 VINTANA2_VSEL_table[] = { 359 2500, 2750, 360 }; 361 362 /* 600mV to 1450mV in 12.5 mV steps */ 363 static const struct linear_range VDD1_ranges[] = { 364 REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500) 365 }; 366 367 /* 600mV to 1450mV in 12.5 mV steps, everything above = 1500mV */ 368 static const struct linear_range VDD2_ranges[] = { 369 REGULATOR_LINEAR_RANGE(600000, 0, 68, 12500), 370 REGULATOR_LINEAR_RANGE(1500000, 69, 69, 12500) 371 }; 372 373 static int twl4030ldo_list_voltage(struct regulator_dev *rdev, unsigned index) 374 { 375 struct twlreg_info *info = rdev_get_drvdata(rdev); 376 int mV = info->table[index]; 377 378 return IS_UNSUP(info, mV) ? 0 : (LDO_MV(mV) * 1000); 379 } 380 381 static int 382 twl4030ldo_set_voltage_sel(struct regulator_dev *rdev, unsigned selector) 383 { 384 struct twlreg_info *info = rdev_get_drvdata(rdev); 385 386 return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE, 387 selector); 388 } 389 390 static int twl4030ldo_get_voltage_sel(struct regulator_dev *rdev) 391 { 392 struct twlreg_info *info = rdev_get_drvdata(rdev); 393 int vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE); 394 395 if (vsel < 0) 396 return vsel; 397 398 vsel &= info->table_len - 1; 399 return vsel; 400 } 401 402 static const struct regulator_ops twl4030ldo_ops = { 403 .list_voltage = twl4030ldo_list_voltage, 404 405 .set_voltage_sel = twl4030ldo_set_voltage_sel, 406 .get_voltage_sel = twl4030ldo_get_voltage_sel, 407 408 .enable = twl4030reg_enable, 409 .disable = twl4030reg_disable, 410 .is_enabled = twl4030reg_is_enabled, 411 412 .set_mode = twl4030reg_set_mode, 413 414 .get_status = twl4030reg_get_status, 415 }; 416 417 static int 418 twl4030smps_set_voltage(struct regulator_dev *rdev, int min_uV, int max_uV, 419 unsigned *selector) 420 { 421 struct twlreg_info *info = rdev_get_drvdata(rdev); 422 int vsel = DIV_ROUND_UP(min_uV - 600000, 12500); 423 424 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_VOLTAGE_SMPS_4030, vsel); 425 426 return 0; 427 } 428 429 static int twl4030smps_get_voltage(struct regulator_dev *rdev) 430 { 431 struct twlreg_info *info = rdev_get_drvdata(rdev); 432 int vsel; 433 434 vsel = twlreg_read(info, TWL_MODULE_PM_RECEIVER, 435 VREG_VOLTAGE_SMPS_4030); 436 437 return vsel * 12500 + 600000; 438 } 439 440 static const struct regulator_ops twl4030smps_ops = { 441 .list_voltage = regulator_list_voltage_linear_range, 442 443 .set_voltage = twl4030smps_set_voltage, 444 .get_voltage = twl4030smps_get_voltage, 445 }; 446 447 /*----------------------------------------------------------------------*/ 448 449 static const struct regulator_ops twl4030fixed_ops = { 450 .list_voltage = regulator_list_voltage_linear, 451 452 .enable = twl4030reg_enable, 453 .disable = twl4030reg_disable, 454 .is_enabled = twl4030reg_is_enabled, 455 456 .set_mode = twl4030reg_set_mode, 457 458 .get_status = twl4030reg_get_status, 459 }; 460 461 /*----------------------------------------------------------------------*/ 462 463 #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \ 464 static const struct twlreg_info TWL4030_INFO_##label = { \ 465 .base = offset, \ 466 .id = num, \ 467 .table_len = ARRAY_SIZE(label##_VSEL_table), \ 468 .table = label##_VSEL_table, \ 469 .remap = remap_conf, \ 470 .desc = { \ 471 .name = #label, \ 472 .id = TWL4030_REG_##label, \ 473 .n_voltages = ARRAY_SIZE(label##_VSEL_table), \ 474 .ops = &twl4030ldo_ops, \ 475 .type = REGULATOR_VOLTAGE, \ 476 .owner = THIS_MODULE, \ 477 .enable_time = turnon_delay, \ 478 .of_map_mode = twl4030reg_map_mode, \ 479 }, \ 480 } 481 482 #define TWL4030_ADJUSTABLE_SMPS(label, offset, num, turnon_delay, remap_conf, \ 483 n_volt) \ 484 static const struct twlreg_info TWL4030_INFO_##label = { \ 485 .base = offset, \ 486 .id = num, \ 487 .remap = remap_conf, \ 488 .desc = { \ 489 .name = #label, \ 490 .id = TWL4030_REG_##label, \ 491 .ops = &twl4030smps_ops, \ 492 .type = REGULATOR_VOLTAGE, \ 493 .owner = THIS_MODULE, \ 494 .enable_time = turnon_delay, \ 495 .of_map_mode = twl4030reg_map_mode, \ 496 .n_voltages = n_volt, \ 497 .n_linear_ranges = ARRAY_SIZE(label ## _ranges), \ 498 .linear_ranges = label ## _ranges, \ 499 }, \ 500 } 501 502 #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ 503 remap_conf) \ 504 static const struct twlreg_info TWLFIXED_INFO_##label = { \ 505 .base = offset, \ 506 .id = num, \ 507 .remap = remap_conf, \ 508 .desc = { \ 509 .name = #label, \ 510 .id = TWL4030##_REG_##label, \ 511 .n_voltages = 1, \ 512 .ops = &twl4030fixed_ops, \ 513 .type = REGULATOR_VOLTAGE, \ 514 .owner = THIS_MODULE, \ 515 .min_uV = mVolts * 1000, \ 516 .enable_time = turnon_delay, \ 517 .of_map_mode = twl4030reg_map_mode, \ 518 }, \ 519 } 520 521 /* 522 * We list regulators here if systems need some level of 523 * software control over them after boot. 524 */ 525 TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08); 526 TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08); 527 TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08); 528 TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08); 529 TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08); 530 TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08); 531 TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08); 532 TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00); 533 TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08); 534 TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00); 535 TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08); 536 TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08); 537 TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08); 538 TWL4030_ADJUSTABLE_SMPS(VDD1, 0x55, 15, 1000, 0x08, 68); 539 TWL4030_ADJUSTABLE_SMPS(VDD2, 0x63, 16, 1000, 0x08, 69); 540 /* VUSBCP is managed *only* by the USB subchip */ 541 TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08); 542 TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08); 543 TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08); 544 TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08); 545 TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08); 546 547 #define TWL_OF_MATCH(comp, family, label) \ 548 { \ 549 .compatible = comp, \ 550 .data = &family##_INFO_##label, \ 551 } 552 553 #define TWL4030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL4030, label) 554 #define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label) 555 #define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label) 556 #define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label) 557 #define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label) 558 559 static const struct of_device_id twl_of_match[] = { 560 TWL4030_OF_MATCH("ti,twl4030-vaux1", VAUX1), 561 TWL4030_OF_MATCH("ti,twl4030-vaux2", VAUX2_4030), 562 TWL4030_OF_MATCH("ti,twl5030-vaux2", VAUX2), 563 TWL4030_OF_MATCH("ti,twl4030-vaux3", VAUX3), 564 TWL4030_OF_MATCH("ti,twl4030-vaux4", VAUX4), 565 TWL4030_OF_MATCH("ti,twl4030-vmmc1", VMMC1), 566 TWL4030_OF_MATCH("ti,twl4030-vmmc2", VMMC2), 567 TWL4030_OF_MATCH("ti,twl4030-vpll1", VPLL1), 568 TWL4030_OF_MATCH("ti,twl4030-vpll2", VPLL2), 569 TWL4030_OF_MATCH("ti,twl4030-vsim", VSIM), 570 TWL4030_OF_MATCH("ti,twl4030-vdac", VDAC), 571 TWL4030_OF_MATCH("ti,twl4030-vintana2", VINTANA2), 572 TWL4030_OF_MATCH("ti,twl4030-vio", VIO), 573 TWL4030_OF_MATCH("ti,twl4030-vdd1", VDD1), 574 TWL4030_OF_MATCH("ti,twl4030-vdd2", VDD2), 575 TWLFIXED_OF_MATCH("ti,twl4030-vintana1", VINTANA1), 576 TWLFIXED_OF_MATCH("ti,twl4030-vintdig", VINTDIG), 577 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v5", VUSB1V5), 578 TWLFIXED_OF_MATCH("ti,twl4030-vusb1v8", VUSB1V8), 579 TWLFIXED_OF_MATCH("ti,twl4030-vusb3v1", VUSB3V1), 580 {}, 581 }; 582 MODULE_DEVICE_TABLE(of, twl_of_match); 583 584 static int twlreg_probe(struct platform_device *pdev) 585 { 586 int id; 587 struct twlreg_info *info; 588 const struct twlreg_info *template; 589 struct regulator_init_data *initdata; 590 struct regulation_constraints *c; 591 struct regulator_dev *rdev; 592 struct regulator_config config = { }; 593 594 template = of_device_get_match_data(&pdev->dev); 595 if (!template) 596 return -ENODEV; 597 598 id = template->desc.id; 599 initdata = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node, 600 &template->desc); 601 if (!initdata) 602 return -EINVAL; 603 604 info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL); 605 if (!info) 606 return -ENOMEM; 607 608 /* Constrain board-specific capabilities according to what 609 * this driver and the chip itself can actually do. 610 */ 611 c = &initdata->constraints; 612 c->valid_modes_mask &= REGULATOR_MODE_NORMAL | REGULATOR_MODE_STANDBY; 613 c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE 614 | REGULATOR_CHANGE_MODE 615 | REGULATOR_CHANGE_STATUS; 616 switch (id) { 617 case TWL4030_REG_VIO: 618 case TWL4030_REG_VDD1: 619 case TWL4030_REG_VDD2: 620 case TWL4030_REG_VPLL1: 621 case TWL4030_REG_VINTANA1: 622 case TWL4030_REG_VINTANA2: 623 case TWL4030_REG_VINTDIG: 624 c->always_on = true; 625 break; 626 default: 627 break; 628 } 629 630 config.dev = &pdev->dev; 631 config.init_data = initdata; 632 config.driver_data = info; 633 config.of_node = pdev->dev.of_node; 634 635 rdev = devm_regulator_register(&pdev->dev, &info->desc, &config); 636 if (IS_ERR(rdev)) { 637 dev_err(&pdev->dev, "can't register %s, %ld\n", 638 info->desc.name, PTR_ERR(rdev)); 639 return PTR_ERR(rdev); 640 } 641 platform_set_drvdata(pdev, rdev); 642 643 twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, info->remap); 644 645 /* NOTE: many regulators support short-circuit IRQs (presentable 646 * as REGULATOR_OVER_CURRENT notifications?) configured via: 647 * - SC_CONFIG 648 * - SC_DETECT1 (vintana2, vmmc1/2, vaux1/2/3/4) 649 * - SC_DETECT2 (vusb, vdac, vio, vdd1/2, vpll2) 650 * - IT_CONFIG 651 */ 652 653 return 0; 654 } 655 656 MODULE_ALIAS("platform:twl4030_reg"); 657 658 static struct platform_driver twlreg_driver = { 659 .probe = twlreg_probe, 660 /* NOTE: short name, to work around driver model truncation of 661 * "twl_regulator.12" (and friends) to "twl_regulator.1". 662 */ 663 .driver = { 664 .name = "twl4030_reg", 665 .of_match_table = of_match_ptr(twl_of_match), 666 }, 667 }; 668 669 static int __init twlreg_init(void) 670 { 671 return platform_driver_register(&twlreg_driver); 672 } 673 subsys_initcall(twlreg_init); 674 675 static void __exit twlreg_exit(void) 676 { 677 platform_driver_unregister(&twlreg_driver); 678 } 679 module_exit(twlreg_exit) 680 681 MODULE_DESCRIPTION("TWL4030 regulator driver"); 682 MODULE_LICENSE("GPL"); 683