1f17ccc5dSJerome Neanne // SPDX-License-Identifier: GPL-2.0
2f17ccc5dSJerome Neanne //
3f17ccc5dSJerome Neanne // Regulator driver for tps6594 PMIC
4f17ccc5dSJerome Neanne //
5f17ccc5dSJerome Neanne // Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
6f17ccc5dSJerome Neanne
7f17ccc5dSJerome Neanne #include <linux/device.h>
8f17ccc5dSJerome Neanne #include <linux/err.h>
9f17ccc5dSJerome Neanne #include <linux/init.h>
10f17ccc5dSJerome Neanne #include <linux/kernel.h>
11f17ccc5dSJerome Neanne #include <linux/module.h>
12045a44d4SRob Herring #include <linux/of.h>
13f17ccc5dSJerome Neanne #include <linux/platform_device.h>
14f17ccc5dSJerome Neanne #include <linux/regmap.h>
15f17ccc5dSJerome Neanne #include <linux/regulator/driver.h>
16f17ccc5dSJerome Neanne #include <linux/regulator/machine.h>
17f17ccc5dSJerome Neanne #include <linux/regulator/of_regulator.h>
18f17ccc5dSJerome Neanne
19f17ccc5dSJerome Neanne #include <linux/mfd/tps6594.h>
20f17ccc5dSJerome Neanne
21f17ccc5dSJerome Neanne #define BUCK_NB 5
22f17ccc5dSJerome Neanne #define LDO_NB 4
23f17ccc5dSJerome Neanne #define MULTI_PHASE_NB 4
24f17ccc5dSJerome Neanne #define REGS_INT_NB 4
25f17ccc5dSJerome Neanne
26f17ccc5dSJerome Neanne enum tps6594_regulator_id {
27f17ccc5dSJerome Neanne /* DCDC's */
28f17ccc5dSJerome Neanne TPS6594_BUCK_1,
29f17ccc5dSJerome Neanne TPS6594_BUCK_2,
30f17ccc5dSJerome Neanne TPS6594_BUCK_3,
31f17ccc5dSJerome Neanne TPS6594_BUCK_4,
32f17ccc5dSJerome Neanne TPS6594_BUCK_5,
33f17ccc5dSJerome Neanne
34f17ccc5dSJerome Neanne /* LDOs */
35f17ccc5dSJerome Neanne TPS6594_LDO_1,
36f17ccc5dSJerome Neanne TPS6594_LDO_2,
37f17ccc5dSJerome Neanne TPS6594_LDO_3,
38f17ccc5dSJerome Neanne TPS6594_LDO_4,
39f17ccc5dSJerome Neanne };
40f17ccc5dSJerome Neanne
41f17ccc5dSJerome Neanne enum tps6594_multi_regulator_id {
42f17ccc5dSJerome Neanne /* Multi-phase DCDC's */
43f17ccc5dSJerome Neanne TPS6594_BUCK_12,
44f17ccc5dSJerome Neanne TPS6594_BUCK_34,
45f17ccc5dSJerome Neanne TPS6594_BUCK_123,
46f17ccc5dSJerome Neanne TPS6594_BUCK_1234,
47f17ccc5dSJerome Neanne };
48f17ccc5dSJerome Neanne
49f17ccc5dSJerome Neanne struct tps6594_regulator_irq_type {
50f17ccc5dSJerome Neanne const char *irq_name;
51f17ccc5dSJerome Neanne const char *regulator_name;
52f17ccc5dSJerome Neanne const char *event_name;
53f17ccc5dSJerome Neanne unsigned long event;
54f17ccc5dSJerome Neanne };
55f17ccc5dSJerome Neanne
56f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_ext_regulator_irq_types[] = {
57f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_VCCA_OV, "VCCA", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
58f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_VCCA_UV, "VCCA", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
59f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_VMON1_OV, "VMON1", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
60f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_VMON1_UV, "VMON1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
61f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_VMON1_RV, "VMON1", "residual voltage",
62f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_VOLTAGE_WARN },
63f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_VMON2_OV, "VMON2", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
64f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_VMON2_UV, "VMON2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
65f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_VMON2_RV, "VMON2", "residual voltage",
66f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_VOLTAGE_WARN },
67f17ccc5dSJerome Neanne };
68f17ccc5dSJerome Neanne
69f17ccc5dSJerome Neanne struct tps6594_regulator_irq_data {
70f17ccc5dSJerome Neanne struct device *dev;
71f17ccc5dSJerome Neanne struct tps6594_regulator_irq_type *type;
72f17ccc5dSJerome Neanne struct regulator_dev *rdev;
73f17ccc5dSJerome Neanne };
74f17ccc5dSJerome Neanne
75f17ccc5dSJerome Neanne struct tps6594_ext_regulator_irq_data {
76f17ccc5dSJerome Neanne struct device *dev;
77f17ccc5dSJerome Neanne struct tps6594_regulator_irq_type *type;
78f17ccc5dSJerome Neanne };
79f17ccc5dSJerome Neanne
80f17ccc5dSJerome Neanne #define TPS6594_REGULATOR(_name, _of, _id, _type, _ops, _n, _vr, _vm, _er, \
81f17ccc5dSJerome Neanne _em, _cr, _cm, _lr, _nlr, _delay, _fuv, \
82f17ccc5dSJerome Neanne _ct, _ncl, _bpm) \
83f17ccc5dSJerome Neanne { \
84f17ccc5dSJerome Neanne .name = _name, \
85f17ccc5dSJerome Neanne .of_match = _of, \
86f17ccc5dSJerome Neanne .regulators_node = of_match_ptr("regulators"), \
87f17ccc5dSJerome Neanne .supply_name = _of, \
88f17ccc5dSJerome Neanne .id = _id, \
89f17ccc5dSJerome Neanne .ops = &(_ops), \
90f17ccc5dSJerome Neanne .n_voltages = _n, \
91f17ccc5dSJerome Neanne .type = _type, \
92f17ccc5dSJerome Neanne .owner = THIS_MODULE, \
93f17ccc5dSJerome Neanne .vsel_reg = _vr, \
94f17ccc5dSJerome Neanne .vsel_mask = _vm, \
95f17ccc5dSJerome Neanne .csel_reg = _cr, \
96f17ccc5dSJerome Neanne .csel_mask = _cm, \
97f17ccc5dSJerome Neanne .curr_table = _ct, \
98f17ccc5dSJerome Neanne .n_current_limits = _ncl, \
99f17ccc5dSJerome Neanne .enable_reg = _er, \
100f17ccc5dSJerome Neanne .enable_mask = _em, \
101f17ccc5dSJerome Neanne .volt_table = NULL, \
102f17ccc5dSJerome Neanne .linear_ranges = _lr, \
103f17ccc5dSJerome Neanne .n_linear_ranges = _nlr, \
104f17ccc5dSJerome Neanne .ramp_delay = _delay, \
105f17ccc5dSJerome Neanne .fixed_uV = _fuv, \
106f17ccc5dSJerome Neanne .bypass_reg = _vr, \
107f17ccc5dSJerome Neanne .bypass_mask = _bpm, \
108f17ccc5dSJerome Neanne } \
109f17ccc5dSJerome Neanne
110f17ccc5dSJerome Neanne static const struct linear_range bucks_ranges[] = {
111f17ccc5dSJerome Neanne REGULATOR_LINEAR_RANGE(300000, 0x0, 0xe, 20000),
112f17ccc5dSJerome Neanne REGULATOR_LINEAR_RANGE(600000, 0xf, 0x72, 5000),
113f17ccc5dSJerome Neanne REGULATOR_LINEAR_RANGE(1100000, 0x73, 0xaa, 10000),
114f17ccc5dSJerome Neanne REGULATOR_LINEAR_RANGE(1660000, 0xab, 0xff, 20000),
115f17ccc5dSJerome Neanne };
116f17ccc5dSJerome Neanne
117f17ccc5dSJerome Neanne static const struct linear_range ldos_1_2_3_ranges[] = {
118f17ccc5dSJerome Neanne REGULATOR_LINEAR_RANGE(600000, 0x4, 0x3a, 50000),
119f17ccc5dSJerome Neanne };
120f17ccc5dSJerome Neanne
121f17ccc5dSJerome Neanne static const struct linear_range ldos_4_ranges[] = {
122f17ccc5dSJerome Neanne REGULATOR_LINEAR_RANGE(1200000, 0x20, 0x74, 25000),
123f17ccc5dSJerome Neanne };
124f17ccc5dSJerome Neanne
125f17ccc5dSJerome Neanne /* Operations permitted on BUCK1/2/3/4/5 */
126f17ccc5dSJerome Neanne static const struct regulator_ops tps6594_bucks_ops = {
127f17ccc5dSJerome Neanne .is_enabled = regulator_is_enabled_regmap,
128f17ccc5dSJerome Neanne .enable = regulator_enable_regmap,
129f17ccc5dSJerome Neanne .disable = regulator_disable_regmap,
130f17ccc5dSJerome Neanne .get_voltage_sel = regulator_get_voltage_sel_regmap,
131f17ccc5dSJerome Neanne .set_voltage_sel = regulator_set_voltage_sel_regmap,
132f17ccc5dSJerome Neanne .list_voltage = regulator_list_voltage_linear_range,
133f17ccc5dSJerome Neanne .map_voltage = regulator_map_voltage_linear_range,
134f17ccc5dSJerome Neanne .set_voltage_time_sel = regulator_set_voltage_time_sel,
135f17ccc5dSJerome Neanne
136f17ccc5dSJerome Neanne };
137f17ccc5dSJerome Neanne
138f17ccc5dSJerome Neanne /* Operations permitted on LDO1/2/3 */
139f17ccc5dSJerome Neanne static const struct regulator_ops tps6594_ldos_1_2_3_ops = {
140f17ccc5dSJerome Neanne .is_enabled = regulator_is_enabled_regmap,
141f17ccc5dSJerome Neanne .enable = regulator_enable_regmap,
142f17ccc5dSJerome Neanne .disable = regulator_disable_regmap,
143f17ccc5dSJerome Neanne .get_voltage_sel = regulator_get_voltage_sel_regmap,
144f17ccc5dSJerome Neanne .set_voltage_sel = regulator_set_voltage_sel_regmap,
145f17ccc5dSJerome Neanne .list_voltage = regulator_list_voltage_linear_range,
146f17ccc5dSJerome Neanne .map_voltage = regulator_map_voltage_linear_range,
147f17ccc5dSJerome Neanne .set_bypass = regulator_set_bypass_regmap,
148f17ccc5dSJerome Neanne .get_bypass = regulator_get_bypass_regmap,
149f17ccc5dSJerome Neanne };
150f17ccc5dSJerome Neanne
151f17ccc5dSJerome Neanne /* Operations permitted on LDO4 */
152f17ccc5dSJerome Neanne static const struct regulator_ops tps6594_ldos_4_ops = {
153f17ccc5dSJerome Neanne .is_enabled = regulator_is_enabled_regmap,
154f17ccc5dSJerome Neanne .enable = regulator_enable_regmap,
155f17ccc5dSJerome Neanne .disable = regulator_disable_regmap,
156f17ccc5dSJerome Neanne .get_voltage_sel = regulator_get_voltage_sel_regmap,
157f17ccc5dSJerome Neanne .set_voltage_sel = regulator_set_voltage_sel_regmap,
158f17ccc5dSJerome Neanne .list_voltage = regulator_list_voltage_linear_range,
159f17ccc5dSJerome Neanne .map_voltage = regulator_map_voltage_linear_range,
160f17ccc5dSJerome Neanne };
161f17ccc5dSJerome Neanne
162f17ccc5dSJerome Neanne static const struct regulator_desc buck_regs[] = {
163f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK1", "buck1", TPS6594_BUCK_1,
164f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
165f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_VOUT_1(0),
166f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
167f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_CTRL(0),
168f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
169f17ccc5dSJerome Neanne 4, 0, 0, NULL, 0, 0),
170f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK2", "buck2", TPS6594_BUCK_2,
171f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
172f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_VOUT_1(1),
173f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
174f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_CTRL(1),
175f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
176f17ccc5dSJerome Neanne 4, 0, 0, NULL, 0, 0),
177f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK3", "buck3", TPS6594_BUCK_3,
178f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
179f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_VOUT_1(2),
180f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
181f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_CTRL(2),
182f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
183f17ccc5dSJerome Neanne 4, 0, 0, NULL, 0, 0),
184f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK4", "buck4", TPS6594_BUCK_4,
185f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
186f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_VOUT_1(3),
187f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
188f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_CTRL(3),
189f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
190f17ccc5dSJerome Neanne 4, 0, 0, NULL, 0, 0),
191f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK5", "buck5", TPS6594_BUCK_5,
192f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
193f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_VOUT_1(4),
194f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
195f17ccc5dSJerome Neanne TPS6594_REG_BUCKX_CTRL(4),
196f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
197f17ccc5dSJerome Neanne 4, 0, 0, NULL, 0, 0),
198f17ccc5dSJerome Neanne };
199f17ccc5dSJerome Neanne
200f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_buck1_irq_types[] = {
201f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK1_OV, "BUCK1", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
202f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK1_UV, "BUCK1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
203f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK1_SC, "BUCK1", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
204f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK1_ILIM, "BUCK1", "reach ilim, overcurrent",
205f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
206f17ccc5dSJerome Neanne };
207f17ccc5dSJerome Neanne
208f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_buck2_irq_types[] = {
209f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK2_OV, "BUCK2", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
210f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK2_UV, "BUCK2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
211f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK2_SC, "BUCK2", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
212f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK2_ILIM, "BUCK2", "reach ilim, overcurrent",
213f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
214f17ccc5dSJerome Neanne };
215f17ccc5dSJerome Neanne
216f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_buck3_irq_types[] = {
217f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK3_OV, "BUCK3", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
218f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK3_UV, "BUCK3", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
219f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK3_SC, "BUCK3", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
220f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK3_ILIM, "BUCK3", "reach ilim, overcurrent",
221f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
222f17ccc5dSJerome Neanne };
223f17ccc5dSJerome Neanne
224f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_buck4_irq_types[] = {
225f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK4_OV, "BUCK4", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
226f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK4_UV, "BUCK4", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
227f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK4_SC, "BUCK4", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
228f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK4_ILIM, "BUCK4", "reach ilim, overcurrent",
229f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
230f17ccc5dSJerome Neanne };
231f17ccc5dSJerome Neanne
232f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_buck5_irq_types[] = {
233f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK5_OV, "BUCK5", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
234f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK5_UV, "BUCK5", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
235f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK5_SC, "BUCK5", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
236f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_BUCK5_ILIM, "BUCK5", "reach ilim, overcurrent",
237f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
238f17ccc5dSJerome Neanne };
239f17ccc5dSJerome Neanne
240f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_ldo1_irq_types[] = {
241f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO1_OV, "LDO1", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
242f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO1_UV, "LDO1", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
243f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO1_SC, "LDO1", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
244f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO1_ILIM, "LDO1", "reach ilim, overcurrent",
245f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
246f17ccc5dSJerome Neanne };
247f17ccc5dSJerome Neanne
248f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_ldo2_irq_types[] = {
249f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO2_OV, "LDO2", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
250f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO2_UV, "LDO2", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
251f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO2_SC, "LDO2", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
252f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO2_ILIM, "LDO2", "reach ilim, overcurrent",
253f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
254f17ccc5dSJerome Neanne };
255f17ccc5dSJerome Neanne
256f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_ldo3_irq_types[] = {
257f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO3_OV, "LDO3", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
258f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO3_UV, "LDO3", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
259f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO3_SC, "LDO3", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
260f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO3_ILIM, "LDO3", "reach ilim, overcurrent",
261f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
262f17ccc5dSJerome Neanne };
263f17ccc5dSJerome Neanne
264f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type tps6594_ldo4_irq_types[] = {
265f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO4_OV, "LDO4", "overvoltage", REGULATOR_EVENT_OVER_VOLTAGE_WARN },
266f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO4_UV, "LDO4", "undervoltage", REGULATOR_EVENT_UNDER_VOLTAGE },
267f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO4_SC, "LDO4", "short circuit", REGULATOR_EVENT_REGULATION_OUT },
268f17ccc5dSJerome Neanne { TPS6594_IRQ_NAME_LDO4_ILIM, "LDO4", "reach ilim, overcurrent",
269f17ccc5dSJerome Neanne REGULATOR_EVENT_OVER_CURRENT },
270f17ccc5dSJerome Neanne };
271f17ccc5dSJerome Neanne
272f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type *tps6594_bucks_irq_types[] = {
273f17ccc5dSJerome Neanne tps6594_buck1_irq_types,
274f17ccc5dSJerome Neanne tps6594_buck2_irq_types,
275f17ccc5dSJerome Neanne tps6594_buck3_irq_types,
276f17ccc5dSJerome Neanne tps6594_buck4_irq_types,
277f17ccc5dSJerome Neanne tps6594_buck5_irq_types,
278f17ccc5dSJerome Neanne };
279f17ccc5dSJerome Neanne
280f17ccc5dSJerome Neanne static struct tps6594_regulator_irq_type *tps6594_ldos_irq_types[] = {
281f17ccc5dSJerome Neanne tps6594_ldo1_irq_types,
282f17ccc5dSJerome Neanne tps6594_ldo2_irq_types,
283f17ccc5dSJerome Neanne tps6594_ldo3_irq_types,
284f17ccc5dSJerome Neanne tps6594_ldo4_irq_types,
285f17ccc5dSJerome Neanne };
286f17ccc5dSJerome Neanne
287f17ccc5dSJerome Neanne static const struct regulator_desc multi_regs[] = {
288f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK12", "buck12", TPS6594_BUCK_1,
289f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
290ef633ecbSNeha Malcom Francis TPS6594_REG_BUCKX_VOUT_1(0),
291f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
292ef633ecbSNeha Malcom Francis TPS6594_REG_BUCKX_CTRL(0),
293f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
294f17ccc5dSJerome Neanne 4, 4000, 0, NULL, 0, 0),
295f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK34", "buck34", TPS6594_BUCK_3,
296f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
297ef633ecbSNeha Malcom Francis TPS6594_REG_BUCKX_VOUT_1(2),
298f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
299ef633ecbSNeha Malcom Francis TPS6594_REG_BUCKX_CTRL(2),
300f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
301f17ccc5dSJerome Neanne 4, 0, 0, NULL, 0, 0),
302f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK123", "buck123", TPS6594_BUCK_1,
303f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
304ef633ecbSNeha Malcom Francis TPS6594_REG_BUCKX_VOUT_1(0),
305f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
306ef633ecbSNeha Malcom Francis TPS6594_REG_BUCKX_CTRL(0),
307f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
308f17ccc5dSJerome Neanne 4, 4000, 0, NULL, 0, 0),
309f17ccc5dSJerome Neanne TPS6594_REGULATOR("BUCK1234", "buck1234", TPS6594_BUCK_1,
310f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_bucks_ops, TPS6594_MASK_BUCKS_VSET,
311ef633ecbSNeha Malcom Francis TPS6594_REG_BUCKX_VOUT_1(0),
312f17ccc5dSJerome Neanne TPS6594_MASK_BUCKS_VSET,
313ef633ecbSNeha Malcom Francis TPS6594_REG_BUCKX_CTRL(0),
314f17ccc5dSJerome Neanne TPS6594_BIT_BUCK_EN, 0, 0, bucks_ranges,
315f17ccc5dSJerome Neanne 4, 4000, 0, NULL, 0, 0),
316f17ccc5dSJerome Neanne };
317f17ccc5dSJerome Neanne
318f17ccc5dSJerome Neanne static const struct regulator_desc ldo_regs[] = {
319f17ccc5dSJerome Neanne TPS6594_REGULATOR("LDO1", "ldo1", TPS6594_LDO_1,
320f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET,
321f17ccc5dSJerome Neanne TPS6594_REG_LDOX_VOUT(0),
322f17ccc5dSJerome Neanne TPS6594_MASK_LDO123_VSET,
323f17ccc5dSJerome Neanne TPS6594_REG_LDOX_CTRL(0),
324f17ccc5dSJerome Neanne TPS6594_BIT_LDO_EN, 0, 0, ldos_1_2_3_ranges,
325f17ccc5dSJerome Neanne 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS),
326f17ccc5dSJerome Neanne TPS6594_REGULATOR("LDO2", "ldo2", TPS6594_LDO_2,
327f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET,
328f17ccc5dSJerome Neanne TPS6594_REG_LDOX_VOUT(1),
329f17ccc5dSJerome Neanne TPS6594_MASK_LDO123_VSET,
330f17ccc5dSJerome Neanne TPS6594_REG_LDOX_CTRL(1),
331f17ccc5dSJerome Neanne TPS6594_BIT_LDO_EN, 0, 0, ldos_1_2_3_ranges,
332f17ccc5dSJerome Neanne 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS),
333f17ccc5dSJerome Neanne TPS6594_REGULATOR("LDO3", "ldo3", TPS6594_LDO_3,
334f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_ldos_1_2_3_ops, TPS6594_MASK_LDO123_VSET,
335f17ccc5dSJerome Neanne TPS6594_REG_LDOX_VOUT(2),
336f17ccc5dSJerome Neanne TPS6594_MASK_LDO123_VSET,
337f17ccc5dSJerome Neanne TPS6594_REG_LDOX_CTRL(2),
338f17ccc5dSJerome Neanne TPS6594_BIT_LDO_EN, 0, 0, ldos_1_2_3_ranges,
339f17ccc5dSJerome Neanne 1, 0, 0, NULL, 0, TPS6594_BIT_LDO_BYPASS),
340f17ccc5dSJerome Neanne TPS6594_REGULATOR("LDO4", "ldo4", TPS6594_LDO_4,
341f17ccc5dSJerome Neanne REGULATOR_VOLTAGE, tps6594_ldos_4_ops, TPS6594_MASK_LDO4_VSET >> 1,
342f17ccc5dSJerome Neanne TPS6594_REG_LDOX_VOUT(3),
343f17ccc5dSJerome Neanne TPS6594_MASK_LDO4_VSET,
344f17ccc5dSJerome Neanne TPS6594_REG_LDOX_CTRL(3),
345f17ccc5dSJerome Neanne TPS6594_BIT_LDO_EN, 0, 0, ldos_4_ranges,
346f17ccc5dSJerome Neanne 1, 0, 0, NULL, 0, 0),
347f17ccc5dSJerome Neanne };
348f17ccc5dSJerome Neanne
tps6594_regulator_irq_handler(int irq,void * data)349f17ccc5dSJerome Neanne static irqreturn_t tps6594_regulator_irq_handler(int irq, void *data)
350f17ccc5dSJerome Neanne {
351f17ccc5dSJerome Neanne struct tps6594_regulator_irq_data *irq_data = data;
352f17ccc5dSJerome Neanne
353f17ccc5dSJerome Neanne if (irq_data->type->event_name[0] == '\0') {
354f17ccc5dSJerome Neanne /* This is the timeout interrupt no specific regulator */
355f17ccc5dSJerome Neanne dev_err(irq_data->dev,
356f17ccc5dSJerome Neanne "System was put in shutdown due to timeout during an active or standby transition.\n");
357f17ccc5dSJerome Neanne return IRQ_HANDLED;
358f17ccc5dSJerome Neanne }
359f17ccc5dSJerome Neanne
360f17ccc5dSJerome Neanne dev_err(irq_data->dev, "Error IRQ trap %s for %s\n",
361f17ccc5dSJerome Neanne irq_data->type->event_name, irq_data->type->regulator_name);
362f17ccc5dSJerome Neanne
363f17ccc5dSJerome Neanne regulator_notifier_call_chain(irq_data->rdev,
364f17ccc5dSJerome Neanne irq_data->type->event, NULL);
365f17ccc5dSJerome Neanne
366f17ccc5dSJerome Neanne return IRQ_HANDLED;
367f17ccc5dSJerome Neanne }
368f17ccc5dSJerome Neanne
tps6594_request_reg_irqs(struct platform_device * pdev,struct regulator_dev * rdev,struct tps6594_regulator_irq_data * irq_data,struct tps6594_regulator_irq_type * tps6594_regs_irq_types,int * irq_idx)369f17ccc5dSJerome Neanne static int tps6594_request_reg_irqs(struct platform_device *pdev,
370f17ccc5dSJerome Neanne struct regulator_dev *rdev,
371f17ccc5dSJerome Neanne struct tps6594_regulator_irq_data *irq_data,
372f17ccc5dSJerome Neanne struct tps6594_regulator_irq_type *tps6594_regs_irq_types,
373f17ccc5dSJerome Neanne int *irq_idx)
374f17ccc5dSJerome Neanne {
375f17ccc5dSJerome Neanne struct tps6594_regulator_irq_type *irq_type;
376f17ccc5dSJerome Neanne struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent);
377f17ccc5dSJerome Neanne int j;
378f17ccc5dSJerome Neanne int irq;
379f17ccc5dSJerome Neanne int error;
380f17ccc5dSJerome Neanne
381f17ccc5dSJerome Neanne for (j = 0; j < REGS_INT_NB; j++) {
382f17ccc5dSJerome Neanne irq_type = &tps6594_regs_irq_types[j];
383f17ccc5dSJerome Neanne irq = platform_get_irq_byname(pdev, irq_type->irq_name);
384f17ccc5dSJerome Neanne if (irq < 0)
385f17ccc5dSJerome Neanne return -EINVAL;
386f17ccc5dSJerome Neanne
387ca0e36e3SJerome Neanne irq_data[*irq_idx].dev = tps->dev;
388ca0e36e3SJerome Neanne irq_data[*irq_idx].type = irq_type;
389ca0e36e3SJerome Neanne irq_data[*irq_idx].rdev = rdev;
390f17ccc5dSJerome Neanne
391f17ccc5dSJerome Neanne error = devm_request_threaded_irq(tps->dev, irq, NULL,
392ca0e36e3SJerome Neanne tps6594_regulator_irq_handler, IRQF_ONESHOT,
393ca0e36e3SJerome Neanne irq_type->irq_name, &irq_data[*irq_idx]);
394f17ccc5dSJerome Neanne if (error) {
395f17ccc5dSJerome Neanne dev_err(tps->dev, "tps6594 failed to request %s IRQ %d: %d\n",
396f17ccc5dSJerome Neanne irq_type->irq_name, irq, error);
397f17ccc5dSJerome Neanne return error;
398f17ccc5dSJerome Neanne }
399ca0e36e3SJerome Neanne (*irq_idx)++;
400f17ccc5dSJerome Neanne }
401f17ccc5dSJerome Neanne return 0;
402f17ccc5dSJerome Neanne }
403f17ccc5dSJerome Neanne
tps6594_regulator_probe(struct platform_device * pdev)404f17ccc5dSJerome Neanne static int tps6594_regulator_probe(struct platform_device *pdev)
405f17ccc5dSJerome Neanne {
406f17ccc5dSJerome Neanne struct tps6594 *tps = dev_get_drvdata(pdev->dev.parent);
407f17ccc5dSJerome Neanne struct regulator_dev *rdev;
408f17ccc5dSJerome Neanne struct device_node *np = NULL;
409f17ccc5dSJerome Neanne struct device_node *np_pmic_parent = NULL;
410f17ccc5dSJerome Neanne struct regulator_config config = {};
411f17ccc5dSJerome Neanne struct tps6594_regulator_irq_data *irq_data;
412f17ccc5dSJerome Neanne struct tps6594_ext_regulator_irq_data *irq_ext_reg_data;
413f17ccc5dSJerome Neanne struct tps6594_regulator_irq_type *irq_type;
414f17ccc5dSJerome Neanne u8 buck_configured[BUCK_NB] = { 0 };
415f17ccc5dSJerome Neanne u8 buck_multi[MULTI_PHASE_NB] = { 0 };
416f17ccc5dSJerome Neanne static const char * const multiphases[] = {"buck12", "buck123", "buck1234", "buck34"};
417f17ccc5dSJerome Neanne static const char *npname;
418f17ccc5dSJerome Neanne int error, i, irq, multi, delta;
419f17ccc5dSJerome Neanne int irq_idx = 0;
420f17ccc5dSJerome Neanne int buck_idx = 0;
421ca0e36e3SJerome Neanne size_t ext_reg_irq_nb = 2;
422ca0e36e3SJerome Neanne size_t reg_irq_nb;
423f17ccc5dSJerome Neanne enum {
424f17ccc5dSJerome Neanne MULTI_BUCK12,
425f17ccc5dSJerome Neanne MULTI_BUCK123,
426f17ccc5dSJerome Neanne MULTI_BUCK1234,
427f17ccc5dSJerome Neanne MULTI_BUCK12_34,
428f17ccc5dSJerome Neanne MULTI_FIRST = MULTI_BUCK12,
429f17ccc5dSJerome Neanne MULTI_LAST = MULTI_BUCK12_34,
430f17ccc5dSJerome Neanne MULTI_NUM = MULTI_LAST - MULTI_FIRST + 1
431f17ccc5dSJerome Neanne };
432f17ccc5dSJerome Neanne
433f17ccc5dSJerome Neanne config.dev = tps->dev;
434f17ccc5dSJerome Neanne config.driver_data = tps;
435f17ccc5dSJerome Neanne config.regmap = tps->regmap;
436f17ccc5dSJerome Neanne
437f17ccc5dSJerome Neanne /*
438f17ccc5dSJerome Neanne * Switch case defines different possible multi phase config
439f17ccc5dSJerome Neanne * This is based on dts buck node name.
440f17ccc5dSJerome Neanne * Buck node name must be chosen accordingly.
441f17ccc5dSJerome Neanne * Default case is no Multiphase buck.
442f17ccc5dSJerome Neanne * In case of Multiphase configuration, value should be defined for
443f17ccc5dSJerome Neanne * buck_configured to avoid creating bucks for every buck in multiphase
444f17ccc5dSJerome Neanne */
445f17ccc5dSJerome Neanne for (multi = MULTI_FIRST; multi < MULTI_NUM; multi++) {
446f17ccc5dSJerome Neanne np = of_find_node_by_name(tps->dev->of_node, multiphases[multi]);
447f17ccc5dSJerome Neanne npname = of_node_full_name(np);
448f17ccc5dSJerome Neanne np_pmic_parent = of_get_parent(of_get_parent(np));
449f17ccc5dSJerome Neanne if (of_node_cmp(of_node_full_name(np_pmic_parent), tps->dev->of_node->full_name))
450f17ccc5dSJerome Neanne continue;
451f17ccc5dSJerome Neanne delta = strcmp(npname, multiphases[multi]);
452f17ccc5dSJerome Neanne if (!delta) {
453f17ccc5dSJerome Neanne switch (multi) {
454f17ccc5dSJerome Neanne case MULTI_BUCK12:
455f17ccc5dSJerome Neanne buck_multi[0] = 1;
456f17ccc5dSJerome Neanne buck_configured[0] = 1;
457f17ccc5dSJerome Neanne buck_configured[1] = 1;
458f17ccc5dSJerome Neanne break;
459f17ccc5dSJerome Neanne /* multiphase buck34 is supported only with buck12 */
460f17ccc5dSJerome Neanne case MULTI_BUCK12_34:
461f17ccc5dSJerome Neanne buck_multi[0] = 1;
462f17ccc5dSJerome Neanne buck_multi[1] = 1;
463f17ccc5dSJerome Neanne buck_configured[0] = 1;
464f17ccc5dSJerome Neanne buck_configured[1] = 1;
465f17ccc5dSJerome Neanne buck_configured[2] = 1;
466f17ccc5dSJerome Neanne buck_configured[3] = 1;
467f17ccc5dSJerome Neanne break;
468f17ccc5dSJerome Neanne case MULTI_BUCK123:
469f17ccc5dSJerome Neanne buck_multi[2] = 1;
470f17ccc5dSJerome Neanne buck_configured[0] = 1;
471f17ccc5dSJerome Neanne buck_configured[1] = 1;
472f17ccc5dSJerome Neanne buck_configured[2] = 1;
473f17ccc5dSJerome Neanne break;
474f17ccc5dSJerome Neanne case MULTI_BUCK1234:
475f17ccc5dSJerome Neanne buck_multi[3] = 1;
476f17ccc5dSJerome Neanne buck_configured[0] = 1;
477f17ccc5dSJerome Neanne buck_configured[1] = 1;
478f17ccc5dSJerome Neanne buck_configured[2] = 1;
479f17ccc5dSJerome Neanne buck_configured[3] = 1;
480f17ccc5dSJerome Neanne break;
481f17ccc5dSJerome Neanne }
482f17ccc5dSJerome Neanne }
483f17ccc5dSJerome Neanne }
484f17ccc5dSJerome Neanne
485ca0e36e3SJerome Neanne if (tps->chip_id == LP8764) {
486f17ccc5dSJerome Neanne /* There is only 4 buck on LP8764 */
487f17ccc5dSJerome Neanne buck_configured[4] = 1;
488ca0e36e3SJerome Neanne reg_irq_nb = size_mul(REGS_INT_NB, (BUCK_NB - 1));
489ca0e36e3SJerome Neanne } else {
490ca0e36e3SJerome Neanne reg_irq_nb = size_mul(REGS_INT_NB, (size_add(BUCK_NB, LDO_NB)));
491ca0e36e3SJerome Neanne }
492f17ccc5dSJerome Neanne
493ca0e36e3SJerome Neanne irq_data = devm_kmalloc_array(tps->dev, reg_irq_nb,
494ca0e36e3SJerome Neanne sizeof(struct tps6594_regulator_irq_data), GFP_KERNEL);
495f17ccc5dSJerome Neanne if (!irq_data)
496f17ccc5dSJerome Neanne return -ENOMEM;
497f17ccc5dSJerome Neanne
498f17ccc5dSJerome Neanne for (i = 0; i < MULTI_PHASE_NB; i++) {
499f17ccc5dSJerome Neanne if (buck_multi[i] == 0)
500f17ccc5dSJerome Neanne continue;
501f17ccc5dSJerome Neanne
502f17ccc5dSJerome Neanne rdev = devm_regulator_register(&pdev->dev, &multi_regs[i], &config);
503f17ccc5dSJerome Neanne if (IS_ERR(rdev))
504f17ccc5dSJerome Neanne return dev_err_probe(tps->dev, PTR_ERR(rdev),
505f17ccc5dSJerome Neanne "failed to register %s regulator\n",
506f17ccc5dSJerome Neanne pdev->name);
507f17ccc5dSJerome Neanne
508f17ccc5dSJerome Neanne /* config multiphase buck12+buck34 */
509f17ccc5dSJerome Neanne if (i == 1)
510f17ccc5dSJerome Neanne buck_idx = 2;
511f17ccc5dSJerome Neanne error = tps6594_request_reg_irqs(pdev, rdev, irq_data,
512f17ccc5dSJerome Neanne tps6594_bucks_irq_types[buck_idx], &irq_idx);
513f17ccc5dSJerome Neanne if (error)
514f17ccc5dSJerome Neanne return error;
515f17ccc5dSJerome Neanne error = tps6594_request_reg_irqs(pdev, rdev, irq_data,
516f17ccc5dSJerome Neanne tps6594_bucks_irq_types[buck_idx + 1], &irq_idx);
517f17ccc5dSJerome Neanne if (error)
518f17ccc5dSJerome Neanne return error;
519f17ccc5dSJerome Neanne
520f17ccc5dSJerome Neanne if (i == 2 || i == 3) {
521f17ccc5dSJerome Neanne error = tps6594_request_reg_irqs(pdev, rdev, irq_data,
522f17ccc5dSJerome Neanne tps6594_bucks_irq_types[buck_idx + 2],
523f17ccc5dSJerome Neanne &irq_idx);
524f17ccc5dSJerome Neanne if (error)
525f17ccc5dSJerome Neanne return error;
526f17ccc5dSJerome Neanne }
527f17ccc5dSJerome Neanne if (i == 3) {
528f17ccc5dSJerome Neanne error = tps6594_request_reg_irqs(pdev, rdev, irq_data,
529f17ccc5dSJerome Neanne tps6594_bucks_irq_types[buck_idx + 3],
530f17ccc5dSJerome Neanne &irq_idx);
531f17ccc5dSJerome Neanne if (error)
532f17ccc5dSJerome Neanne return error;
533f17ccc5dSJerome Neanne }
534f17ccc5dSJerome Neanne }
535f17ccc5dSJerome Neanne
536f17ccc5dSJerome Neanne for (i = 0; i < BUCK_NB; i++) {
537f17ccc5dSJerome Neanne if (buck_configured[i] == 1)
538f17ccc5dSJerome Neanne continue;
539f17ccc5dSJerome Neanne
540f17ccc5dSJerome Neanne rdev = devm_regulator_register(&pdev->dev, &buck_regs[i], &config);
541f17ccc5dSJerome Neanne if (IS_ERR(rdev))
542f17ccc5dSJerome Neanne return dev_err_probe(tps->dev, PTR_ERR(rdev),
543f17ccc5dSJerome Neanne "failed to register %s regulator\n",
544f17ccc5dSJerome Neanne pdev->name);
545f17ccc5dSJerome Neanne
546f17ccc5dSJerome Neanne error = tps6594_request_reg_irqs(pdev, rdev, irq_data,
547f17ccc5dSJerome Neanne tps6594_bucks_irq_types[i], &irq_idx);
548f17ccc5dSJerome Neanne if (error)
549f17ccc5dSJerome Neanne return error;
550f17ccc5dSJerome Neanne }
551f17ccc5dSJerome Neanne
552f17ccc5dSJerome Neanne /* LP8764 dosen't have LDO */
553f17ccc5dSJerome Neanne if (tps->chip_id != LP8764) {
554f17ccc5dSJerome Neanne for (i = 0; i < ARRAY_SIZE(ldo_regs); i++) {
555f17ccc5dSJerome Neanne rdev = devm_regulator_register(&pdev->dev, &ldo_regs[i], &config);
556f17ccc5dSJerome Neanne if (IS_ERR(rdev))
557f17ccc5dSJerome Neanne return dev_err_probe(tps->dev, PTR_ERR(rdev),
558f17ccc5dSJerome Neanne "failed to register %s regulator\n",
559f17ccc5dSJerome Neanne pdev->name);
560f17ccc5dSJerome Neanne
561f17ccc5dSJerome Neanne error = tps6594_request_reg_irqs(pdev, rdev, irq_data,
562f17ccc5dSJerome Neanne tps6594_ldos_irq_types[i],
563f17ccc5dSJerome Neanne &irq_idx);
564f17ccc5dSJerome Neanne if (error)
565f17ccc5dSJerome Neanne return error;
566f17ccc5dSJerome Neanne }
567f17ccc5dSJerome Neanne }
568f17ccc5dSJerome Neanne
569f17ccc5dSJerome Neanne if (tps->chip_id == LP8764)
570f17ccc5dSJerome Neanne ext_reg_irq_nb = ARRAY_SIZE(tps6594_ext_regulator_irq_types);
571f17ccc5dSJerome Neanne
572f17ccc5dSJerome Neanne irq_ext_reg_data = devm_kmalloc_array(tps->dev,
573f17ccc5dSJerome Neanne ext_reg_irq_nb,
574f17ccc5dSJerome Neanne sizeof(struct tps6594_ext_regulator_irq_data),
575f17ccc5dSJerome Neanne GFP_KERNEL);
576f17ccc5dSJerome Neanne if (!irq_ext_reg_data)
577f17ccc5dSJerome Neanne return -ENOMEM;
578f17ccc5dSJerome Neanne
579f17ccc5dSJerome Neanne for (i = 0; i < ext_reg_irq_nb; ++i) {
580f17ccc5dSJerome Neanne irq_type = &tps6594_ext_regulator_irq_types[i];
581f17ccc5dSJerome Neanne
582f17ccc5dSJerome Neanne irq = platform_get_irq_byname(pdev, irq_type->irq_name);
583f17ccc5dSJerome Neanne if (irq < 0)
584f17ccc5dSJerome Neanne return -EINVAL;
585f17ccc5dSJerome Neanne
586f17ccc5dSJerome Neanne irq_ext_reg_data[i].dev = tps->dev;
587f17ccc5dSJerome Neanne irq_ext_reg_data[i].type = irq_type;
588f17ccc5dSJerome Neanne
589f17ccc5dSJerome Neanne error = devm_request_threaded_irq(tps->dev, irq, NULL,
590f17ccc5dSJerome Neanne tps6594_regulator_irq_handler,
591f17ccc5dSJerome Neanne IRQF_ONESHOT,
592f17ccc5dSJerome Neanne irq_type->irq_name,
593f17ccc5dSJerome Neanne &irq_ext_reg_data[i]);
594f17ccc5dSJerome Neanne if (error)
595f17ccc5dSJerome Neanne return dev_err_probe(tps->dev, error,
596f17ccc5dSJerome Neanne "failed to request %s IRQ %d\n",
597f17ccc5dSJerome Neanne irq_type->irq_name, irq);
598f17ccc5dSJerome Neanne }
599f17ccc5dSJerome Neanne return 0;
600f17ccc5dSJerome Neanne }
601f17ccc5dSJerome Neanne
602f17ccc5dSJerome Neanne static struct platform_driver tps6594_regulator_driver = {
603f17ccc5dSJerome Neanne .driver = {
604f17ccc5dSJerome Neanne .name = "tps6594-regulator",
605f17ccc5dSJerome Neanne },
606f17ccc5dSJerome Neanne .probe = tps6594_regulator_probe,
607f17ccc5dSJerome Neanne };
608f17ccc5dSJerome Neanne
609f17ccc5dSJerome Neanne module_platform_driver(tps6594_regulator_driver);
610f17ccc5dSJerome Neanne
611f17ccc5dSJerome Neanne MODULE_ALIAS("platform:tps6594-regulator");
612f17ccc5dSJerome Neanne MODULE_AUTHOR("Jerome Neanne <jneanne@baylibre.com>");
613f17ccc5dSJerome Neanne MODULE_DESCRIPTION("TPS6594 voltage regulator driver");
614f17ccc5dSJerome Neanne MODULE_LICENSE("GPL");
615