1 /* 2 * tps51632-regulator.c -- TI TPS51632 3 * 4 * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless 5 * Controller with serial VID control and DVFS. 6 * 7 * Copyright (c) 2012, NVIDIA Corporation. 8 * 9 * Author: Laxman Dewangan <ldewangan@nvidia.com> 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation version 2. 14 * 15 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, 16 * whether express or implied; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 23 * 02111-1307, USA 24 */ 25 26 #include <linux/err.h> 27 #include <linux/i2c.h> 28 #include <linux/init.h> 29 #include <linux/kernel.h> 30 #include <linux/module.h> 31 #include <linux/platform_device.h> 32 #include <linux/regmap.h> 33 #include <linux/regulator/driver.h> 34 #include <linux/regulator/machine.h> 35 #include <linux/regulator/tps51632-regulator.h> 36 #include <linux/slab.h> 37 38 /* Register definitions */ 39 #define TPS51632_VOLTAGE_SELECT_REG 0x0 40 #define TPS51632_VOLTAGE_BASE_REG 0x1 41 #define TPS51632_OFFSET_REG 0x2 42 #define TPS51632_IMON_REG 0x3 43 #define TPS51632_VMAX_REG 0x4 44 #define TPS51632_DVFS_CONTROL_REG 0x5 45 #define TPS51632_POWER_STATE_REG 0x6 46 #define TPS51632_SLEW_REGS 0x7 47 #define TPS51632_FAULT_REG 0x14 48 49 #define TPS51632_MAX_REG 0x15 50 51 #define TPS51632_VOUT_MASK 0x7F 52 #define TPS51632_VOUT_OFFSET_MASK 0x1F 53 #define TPS51632_VMAX_MASK 0x7F 54 #define TPS51632_VMAX_LOCK 0x80 55 56 /* TPS51632_DVFS_CONTROL_REG */ 57 #define TPS51632_DVFS_PWMEN 0x1 58 #define TPS51632_DVFS_STEP_20 0x2 59 #define TPS51632_DVFS_VMAX_PG 0x4 60 #define TPS51632_DVFS_PWMRST 0x8 61 #define TPS51632_DVFS_OCA_EN 0x10 62 #define TPS51632_DVFS_FCCM 0x20 63 64 /* TPS51632_POWER_STATE_REG */ 65 #define TPS51632_POWER_STATE_MASK 0x03 66 #define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x0 67 #define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1 68 #define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2 69 70 #define TPS51632_MIN_VOLATGE 500000 71 #define TPS51632_MAX_VOLATGE 1520000 72 #define TPS51632_VOLATGE_STEP_10mV 10000 73 #define TPS51632_VOLATGE_STEP_20mV 20000 74 #define TPS51632_MAX_VSEL 0x7F 75 #define TPS51632_MIN_VSEL 0x19 76 #define TPS51632_DEFAULT_RAMP_DELAY 6000 77 #define TPS51632_VOLT_VSEL(uV) \ 78 (DIV_ROUND_UP(uV - TPS51632_MIN_VOLATGE, \ 79 TPS51632_VOLATGE_STEP_10mV) + \ 80 TPS51632_MIN_VSEL) 81 82 /* TPS51632 chip information */ 83 struct tps51632_chip { 84 struct device *dev; 85 struct regulator_desc desc; 86 struct regulator_dev *rdev; 87 struct regmap *regmap; 88 bool enable_pwm_dvfs; 89 }; 90 91 static int tps51632_dcdc_get_voltage_sel(struct regulator_dev *rdev) 92 { 93 struct tps51632_chip *tps = rdev_get_drvdata(rdev); 94 unsigned int data; 95 int ret; 96 unsigned int reg = TPS51632_VOLTAGE_SELECT_REG; 97 int vsel; 98 99 if (tps->enable_pwm_dvfs) 100 reg = TPS51632_VOLTAGE_BASE_REG; 101 102 ret = regmap_read(tps->regmap, reg, &data); 103 if (ret < 0) { 104 dev_err(tps->dev, "reg read failed, err %d\n", ret); 105 return ret; 106 } 107 108 vsel = data & TPS51632_VOUT_MASK; 109 return vsel; 110 } 111 112 static int tps51632_dcdc_set_voltage_sel(struct regulator_dev *rdev, 113 unsigned selector) 114 { 115 struct tps51632_chip *tps = rdev_get_drvdata(rdev); 116 int ret; 117 unsigned int reg = TPS51632_VOLTAGE_SELECT_REG; 118 119 if (tps->enable_pwm_dvfs) 120 reg = TPS51632_VOLTAGE_BASE_REG; 121 122 if (selector > TPS51632_MAX_VSEL) 123 return -EINVAL; 124 125 ret = regmap_write(tps->regmap, reg, selector); 126 if (ret < 0) 127 dev_err(tps->dev, "reg write failed, err %d\n", ret); 128 return ret; 129 } 130 131 static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev, 132 int ramp_delay) 133 { 134 struct tps51632_chip *tps = rdev_get_drvdata(rdev); 135 int bit = ramp_delay/6000; 136 int ret; 137 138 if (bit) 139 bit--; 140 ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit)); 141 if (ret < 0) 142 dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret); 143 return ret; 144 } 145 146 static struct regulator_ops tps51632_dcdc_ops = { 147 .get_voltage_sel = tps51632_dcdc_get_voltage_sel, 148 .set_voltage_sel = tps51632_dcdc_set_voltage_sel, 149 .list_voltage = regulator_list_voltage_linear, 150 .set_voltage_time_sel = regulator_set_voltage_time_sel, 151 .set_ramp_delay = tps51632_dcdc_set_ramp_delay, 152 }; 153 154 static int tps51632_init_dcdc(struct tps51632_chip *tps, 155 struct tps51632_regulator_platform_data *pdata) 156 { 157 int ret; 158 uint8_t control = 0; 159 int vsel; 160 161 if (!pdata->enable_pwm_dvfs) 162 goto skip_pwm_config; 163 164 control |= TPS51632_DVFS_PWMEN; 165 tps->enable_pwm_dvfs = pdata->enable_pwm_dvfs; 166 vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV); 167 ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel); 168 if (ret < 0) { 169 dev_err(tps->dev, "BASE reg write failed, err %d\n", ret); 170 return ret; 171 } 172 173 if (pdata->dvfs_step_20mV) 174 control |= TPS51632_DVFS_STEP_20; 175 176 if (pdata->max_voltage_uV) { 177 unsigned int vmax; 178 /** 179 * TPS51632 hw behavior: VMAX register can be write only 180 * once as it get locked after first write. The lock get 181 * reset only when device is power-reset. 182 * Write register only when lock bit is not enabled. 183 */ 184 ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax); 185 if (ret < 0) { 186 dev_err(tps->dev, "VMAX read failed, err %d\n", ret); 187 return ret; 188 } 189 if (!(vmax & TPS51632_VMAX_LOCK)) { 190 vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV); 191 ret = regmap_write(tps->regmap, TPS51632_VMAX_REG, 192 vsel); 193 if (ret < 0) { 194 dev_err(tps->dev, 195 "VMAX write failed, err %d\n", ret); 196 return ret; 197 } 198 } 199 } 200 201 skip_pwm_config: 202 ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control); 203 if (ret < 0) 204 dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret); 205 return ret; 206 } 207 208 static bool rd_wr_reg(struct device *dev, unsigned int reg) 209 { 210 if ((reg >= 0x8) && (reg <= 0x10)) 211 return false; 212 return true; 213 } 214 215 static const struct regmap_config tps51632_regmap_config = { 216 .reg_bits = 8, 217 .val_bits = 8, 218 .writeable_reg = rd_wr_reg, 219 .readable_reg = rd_wr_reg, 220 .max_register = TPS51632_MAX_REG - 1, 221 .cache_type = REGCACHE_RBTREE, 222 }; 223 224 static int tps51632_probe(struct i2c_client *client, 225 const struct i2c_device_id *id) 226 { 227 struct tps51632_regulator_platform_data *pdata; 228 struct regulator_dev *rdev; 229 struct tps51632_chip *tps; 230 int ret; 231 struct regulator_config config = { }; 232 233 pdata = client->dev.platform_data; 234 if (!pdata) { 235 dev_err(&client->dev, "No Platform data\n"); 236 return -EINVAL; 237 } 238 239 if (pdata->enable_pwm_dvfs) { 240 if ((pdata->base_voltage_uV < TPS51632_MIN_VOLATGE) || 241 (pdata->base_voltage_uV > TPS51632_MAX_VOLATGE)) { 242 dev_err(&client->dev, "Invalid base_voltage_uV setting\n"); 243 return -EINVAL; 244 } 245 246 if ((pdata->max_voltage_uV) && 247 ((pdata->max_voltage_uV < TPS51632_MIN_VOLATGE) || 248 (pdata->max_voltage_uV > TPS51632_MAX_VOLATGE))) { 249 dev_err(&client->dev, "Invalid max_voltage_uV setting\n"); 250 return -EINVAL; 251 } 252 } 253 254 tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL); 255 if (!tps) { 256 dev_err(&client->dev, "Memory allocation failed\n"); 257 return -ENOMEM; 258 } 259 260 tps->dev = &client->dev; 261 tps->desc.name = id->name; 262 tps->desc.id = 0; 263 tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY; 264 tps->desc.min_uV = TPS51632_MIN_VOLATGE; 265 tps->desc.uV_step = TPS51632_VOLATGE_STEP_10mV; 266 tps->desc.linear_min_sel = TPS51632_MIN_VSEL; 267 tps->desc.n_voltages = TPS51632_MAX_VSEL + 1; 268 tps->desc.ops = &tps51632_dcdc_ops; 269 tps->desc.type = REGULATOR_VOLTAGE; 270 tps->desc.owner = THIS_MODULE; 271 272 tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config); 273 if (IS_ERR(tps->regmap)) { 274 ret = PTR_ERR(tps->regmap); 275 dev_err(&client->dev, "regmap init failed, err %d\n", ret); 276 return ret; 277 } 278 i2c_set_clientdata(client, tps); 279 280 ret = tps51632_init_dcdc(tps, pdata); 281 if (ret < 0) { 282 dev_err(tps->dev, "Init failed, err = %d\n", ret); 283 return ret; 284 } 285 286 /* Register the regulators */ 287 config.dev = &client->dev; 288 config.init_data = pdata->reg_init_data; 289 config.driver_data = tps; 290 config.regmap = tps->regmap; 291 config.of_node = client->dev.of_node; 292 293 rdev = regulator_register(&tps->desc, &config); 294 if (IS_ERR(rdev)) { 295 dev_err(tps->dev, "regulator register failed\n"); 296 return PTR_ERR(rdev); 297 } 298 299 tps->rdev = rdev; 300 return 0; 301 } 302 303 static int tps51632_remove(struct i2c_client *client) 304 { 305 struct tps51632_chip *tps = i2c_get_clientdata(client); 306 307 regulator_unregister(tps->rdev); 308 return 0; 309 } 310 311 static const struct i2c_device_id tps51632_id[] = { 312 {.name = "tps51632",}, 313 {}, 314 }; 315 316 MODULE_DEVICE_TABLE(i2c, tps51632_id); 317 318 static struct i2c_driver tps51632_i2c_driver = { 319 .driver = { 320 .name = "tps51632", 321 .owner = THIS_MODULE, 322 }, 323 .probe = tps51632_probe, 324 .remove = tps51632_remove, 325 .id_table = tps51632_id, 326 }; 327 328 static int __init tps51632_init(void) 329 { 330 return i2c_add_driver(&tps51632_i2c_driver); 331 } 332 subsys_initcall(tps51632_init); 333 334 static void __exit tps51632_cleanup(void) 335 { 336 i2c_del_driver(&tps51632_i2c_driver); 337 } 338 module_exit(tps51632_cleanup); 339 340 MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>"); 341 MODULE_DESCRIPTION("TPS51632 voltage regulator driver"); 342 MODULE_LICENSE("GPL v2"); 343