1e634cf4eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
20c570674SLaxman Dewangan /*
30c570674SLaxman Dewangan * tps51632-regulator.c -- TI TPS51632
40c570674SLaxman Dewangan *
50c570674SLaxman Dewangan * Regulator driver for TPS51632 3-2-1 Phase D-Cap Step Down Driverless
60c570674SLaxman Dewangan * Controller with serial VID control and DVFS.
70c570674SLaxman Dewangan *
80c570674SLaxman Dewangan * Copyright (c) 2012, NVIDIA Corporation.
90c570674SLaxman Dewangan *
100c570674SLaxman Dewangan * Author: Laxman Dewangan <ldewangan@nvidia.com>
110c570674SLaxman Dewangan */
120c570674SLaxman Dewangan
130c570674SLaxman Dewangan #include <linux/err.h>
140c570674SLaxman Dewangan #include <linux/i2c.h>
150c570674SLaxman Dewangan #include <linux/init.h>
160c570674SLaxman Dewangan #include <linux/kernel.h>
170c570674SLaxman Dewangan #include <linux/module.h>
18c51ce403SLaxman Dewangan #include <linux/of.h>
19c51ce403SLaxman Dewangan #include <linux/of_device.h>
200c570674SLaxman Dewangan #include <linux/platform_device.h>
210c570674SLaxman Dewangan #include <linux/regmap.h>
220c570674SLaxman Dewangan #include <linux/regulator/driver.h>
230c570674SLaxman Dewangan #include <linux/regulator/machine.h>
24c51ce403SLaxman Dewangan #include <linux/regulator/of_regulator.h>
250c570674SLaxman Dewangan #include <linux/regulator/tps51632-regulator.h>
260c570674SLaxman Dewangan #include <linux/slab.h>
270c570674SLaxman Dewangan
280c570674SLaxman Dewangan /* Register definitions */
290c570674SLaxman Dewangan #define TPS51632_VOLTAGE_SELECT_REG 0x0
300c570674SLaxman Dewangan #define TPS51632_VOLTAGE_BASE_REG 0x1
310c570674SLaxman Dewangan #define TPS51632_OFFSET_REG 0x2
320c570674SLaxman Dewangan #define TPS51632_IMON_REG 0x3
330c570674SLaxman Dewangan #define TPS51632_VMAX_REG 0x4
340c570674SLaxman Dewangan #define TPS51632_DVFS_CONTROL_REG 0x5
350c570674SLaxman Dewangan #define TPS51632_POWER_STATE_REG 0x6
360c570674SLaxman Dewangan #define TPS51632_SLEW_REGS 0x7
370c570674SLaxman Dewangan #define TPS51632_FAULT_REG 0x14
380c570674SLaxman Dewangan
390c570674SLaxman Dewangan #define TPS51632_MAX_REG 0x15
400c570674SLaxman Dewangan
410c570674SLaxman Dewangan #define TPS51632_VOUT_MASK 0x7F
420c570674SLaxman Dewangan #define TPS51632_VOUT_OFFSET_MASK 0x1F
430c570674SLaxman Dewangan #define TPS51632_VMAX_MASK 0x7F
440c570674SLaxman Dewangan #define TPS51632_VMAX_LOCK 0x80
450c570674SLaxman Dewangan
460c570674SLaxman Dewangan /* TPS51632_DVFS_CONTROL_REG */
470c570674SLaxman Dewangan #define TPS51632_DVFS_PWMEN 0x1
480c570674SLaxman Dewangan #define TPS51632_DVFS_STEP_20 0x2
490c570674SLaxman Dewangan #define TPS51632_DVFS_VMAX_PG 0x4
500c570674SLaxman Dewangan #define TPS51632_DVFS_PWMRST 0x8
510c570674SLaxman Dewangan #define TPS51632_DVFS_OCA_EN 0x10
520c570674SLaxman Dewangan #define TPS51632_DVFS_FCCM 0x20
530c570674SLaxman Dewangan
540c570674SLaxman Dewangan /* TPS51632_POWER_STATE_REG */
550c570674SLaxman Dewangan #define TPS51632_POWER_STATE_MASK 0x03
560c570674SLaxman Dewangan #define TPS51632_POWER_STATE_MULTI_PHASE_CCM 0x0
570c570674SLaxman Dewangan #define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1
580c570674SLaxman Dewangan #define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2
590c570674SLaxman Dewangan
609d9339d3SFabio Estevam #define TPS51632_MIN_VOLTAGE 500000
619d9339d3SFabio Estevam #define TPS51632_MAX_VOLTAGE 1520000
629d9339d3SFabio Estevam #define TPS51632_VOLTAGE_STEP_10mV 10000
639d9339d3SFabio Estevam #define TPS51632_VOLTAGE_STEP_20mV 20000
640c570674SLaxman Dewangan #define TPS51632_MAX_VSEL 0x7F
650c570674SLaxman Dewangan #define TPS51632_MIN_VSEL 0x19
660c570674SLaxman Dewangan #define TPS51632_DEFAULT_RAMP_DELAY 6000
670c570674SLaxman Dewangan #define TPS51632_VOLT_VSEL(uV) \
689d9339d3SFabio Estevam (DIV_ROUND_UP(uV - TPS51632_MIN_VOLTAGE, \
699d9339d3SFabio Estevam TPS51632_VOLTAGE_STEP_10mV) + \
700c570674SLaxman Dewangan TPS51632_MIN_VSEL)
710c570674SLaxman Dewangan
720c570674SLaxman Dewangan /* TPS51632 chip information */
730c570674SLaxman Dewangan struct tps51632_chip {
740c570674SLaxman Dewangan struct device *dev;
750c570674SLaxman Dewangan struct regulator_desc desc;
760c570674SLaxman Dewangan struct regulator_dev *rdev;
770c570674SLaxman Dewangan struct regmap *regmap;
780c570674SLaxman Dewangan };
790c570674SLaxman Dewangan
tps51632_dcdc_set_ramp_delay(struct regulator_dev * rdev,int ramp_delay)800c570674SLaxman Dewangan static int tps51632_dcdc_set_ramp_delay(struct regulator_dev *rdev,
810c570674SLaxman Dewangan int ramp_delay)
820c570674SLaxman Dewangan {
830c570674SLaxman Dewangan struct tps51632_chip *tps = rdev_get_drvdata(rdev);
84c714a588SAxel Lin int bit;
850c570674SLaxman Dewangan int ret;
860c570674SLaxman Dewangan
87c714a588SAxel Lin if (ramp_delay == 0)
88c714a588SAxel Lin bit = 0;
89c714a588SAxel Lin else
90c714a588SAxel Lin bit = DIV_ROUND_UP(ramp_delay, 6000) - 1;
91c714a588SAxel Lin
920c570674SLaxman Dewangan ret = regmap_write(tps->regmap, TPS51632_SLEW_REGS, BIT(bit));
930c570674SLaxman Dewangan if (ret < 0)
940c570674SLaxman Dewangan dev_err(tps->dev, "SLEW reg write failed, err %d\n", ret);
950c570674SLaxman Dewangan return ret;
960c570674SLaxman Dewangan }
970c570674SLaxman Dewangan
98dcb97c10SRikard Falkeborn static const struct regulator_ops tps51632_dcdc_ops = {
99d94d9acaSAxel Lin .get_voltage_sel = regulator_get_voltage_sel_regmap,
100d94d9acaSAxel Lin .set_voltage_sel = regulator_set_voltage_sel_regmap,
1010c570674SLaxman Dewangan .list_voltage = regulator_list_voltage_linear,
1020c570674SLaxman Dewangan .set_voltage_time_sel = regulator_set_voltage_time_sel,
1030c570674SLaxman Dewangan .set_ramp_delay = tps51632_dcdc_set_ramp_delay,
1040c570674SLaxman Dewangan };
1050c570674SLaxman Dewangan
tps51632_init_dcdc(struct tps51632_chip * tps,struct tps51632_regulator_platform_data * pdata)106a5023574SBill Pemberton static int tps51632_init_dcdc(struct tps51632_chip *tps,
1070c570674SLaxman Dewangan struct tps51632_regulator_platform_data *pdata)
1080c570674SLaxman Dewangan {
1090c570674SLaxman Dewangan int ret;
1100c570674SLaxman Dewangan uint8_t control = 0;
1110c570674SLaxman Dewangan int vsel;
1120c570674SLaxman Dewangan
1130c570674SLaxman Dewangan if (!pdata->enable_pwm_dvfs)
1140c570674SLaxman Dewangan goto skip_pwm_config;
1150c570674SLaxman Dewangan
1160c570674SLaxman Dewangan control |= TPS51632_DVFS_PWMEN;
1170c570674SLaxman Dewangan vsel = TPS51632_VOLT_VSEL(pdata->base_voltage_uV);
1180c570674SLaxman Dewangan ret = regmap_write(tps->regmap, TPS51632_VOLTAGE_BASE_REG, vsel);
1190c570674SLaxman Dewangan if (ret < 0) {
1200c570674SLaxman Dewangan dev_err(tps->dev, "BASE reg write failed, err %d\n", ret);
1210c570674SLaxman Dewangan return ret;
1220c570674SLaxman Dewangan }
1230c570674SLaxman Dewangan
1240c570674SLaxman Dewangan if (pdata->dvfs_step_20mV)
1250c570674SLaxman Dewangan control |= TPS51632_DVFS_STEP_20;
1260c570674SLaxman Dewangan
1270c570674SLaxman Dewangan if (pdata->max_voltage_uV) {
1280c570674SLaxman Dewangan unsigned int vmax;
1290c570674SLaxman Dewangan /**
1300c570674SLaxman Dewangan * TPS51632 hw behavior: VMAX register can be write only
1310c570674SLaxman Dewangan * once as it get locked after first write. The lock get
1320c570674SLaxman Dewangan * reset only when device is power-reset.
1330c570674SLaxman Dewangan * Write register only when lock bit is not enabled.
1340c570674SLaxman Dewangan */
1350c570674SLaxman Dewangan ret = regmap_read(tps->regmap, TPS51632_VMAX_REG, &vmax);
1360c570674SLaxman Dewangan if (ret < 0) {
1370c570674SLaxman Dewangan dev_err(tps->dev, "VMAX read failed, err %d\n", ret);
1380c570674SLaxman Dewangan return ret;
1390c570674SLaxman Dewangan }
1400c570674SLaxman Dewangan if (!(vmax & TPS51632_VMAX_LOCK)) {
1410c570674SLaxman Dewangan vsel = TPS51632_VOLT_VSEL(pdata->max_voltage_uV);
1420c570674SLaxman Dewangan ret = regmap_write(tps->regmap, TPS51632_VMAX_REG,
1430c570674SLaxman Dewangan vsel);
1440c570674SLaxman Dewangan if (ret < 0) {
1450c570674SLaxman Dewangan dev_err(tps->dev,
1460c570674SLaxman Dewangan "VMAX write failed, err %d\n", ret);
1470c570674SLaxman Dewangan return ret;
1480c570674SLaxman Dewangan }
1490c570674SLaxman Dewangan }
1500c570674SLaxman Dewangan }
1510c570674SLaxman Dewangan
1520c570674SLaxman Dewangan skip_pwm_config:
1530c570674SLaxman Dewangan ret = regmap_write(tps->regmap, TPS51632_DVFS_CONTROL_REG, control);
1540c570674SLaxman Dewangan if (ret < 0)
1550c570674SLaxman Dewangan dev_err(tps->dev, "DVFS reg write failed, err %d\n", ret);
1560c570674SLaxman Dewangan return ret;
1570c570674SLaxman Dewangan }
1580c570674SLaxman Dewangan
is_volatile_reg(struct device * dev,unsigned int reg)159faa3b2d5SLaxman Dewangan static bool is_volatile_reg(struct device *dev, unsigned int reg)
1600c570674SLaxman Dewangan {
161faa3b2d5SLaxman Dewangan switch (reg) {
162faa3b2d5SLaxman Dewangan case TPS51632_OFFSET_REG:
163faa3b2d5SLaxman Dewangan case TPS51632_FAULT_REG:
164faa3b2d5SLaxman Dewangan case TPS51632_IMON_REG:
1650c570674SLaxman Dewangan return true;
166faa3b2d5SLaxman Dewangan default:
167faa3b2d5SLaxman Dewangan return false;
168faa3b2d5SLaxman Dewangan }
169faa3b2d5SLaxman Dewangan }
170faa3b2d5SLaxman Dewangan
is_read_reg(struct device * dev,unsigned int reg)171faa3b2d5SLaxman Dewangan static bool is_read_reg(struct device *dev, unsigned int reg)
172faa3b2d5SLaxman Dewangan {
173faa3b2d5SLaxman Dewangan switch (reg) {
174faa3b2d5SLaxman Dewangan case 0x08 ... 0x0F:
175faa3b2d5SLaxman Dewangan return false;
176faa3b2d5SLaxman Dewangan default:
177faa3b2d5SLaxman Dewangan return true;
178faa3b2d5SLaxman Dewangan }
179faa3b2d5SLaxman Dewangan }
180faa3b2d5SLaxman Dewangan
is_write_reg(struct device * dev,unsigned int reg)181faa3b2d5SLaxman Dewangan static bool is_write_reg(struct device *dev, unsigned int reg)
182faa3b2d5SLaxman Dewangan {
183faa3b2d5SLaxman Dewangan switch (reg) {
184faa3b2d5SLaxman Dewangan case TPS51632_VOLTAGE_SELECT_REG:
185faa3b2d5SLaxman Dewangan case TPS51632_VOLTAGE_BASE_REG:
186faa3b2d5SLaxman Dewangan case TPS51632_VMAX_REG:
187faa3b2d5SLaxman Dewangan case TPS51632_DVFS_CONTROL_REG:
188faa3b2d5SLaxman Dewangan case TPS51632_POWER_STATE_REG:
189faa3b2d5SLaxman Dewangan case TPS51632_SLEW_REGS:
190faa3b2d5SLaxman Dewangan return true;
191faa3b2d5SLaxman Dewangan default:
192faa3b2d5SLaxman Dewangan return false;
193faa3b2d5SLaxman Dewangan }
1940c570674SLaxman Dewangan }
1950c570674SLaxman Dewangan
1960c570674SLaxman Dewangan static const struct regmap_config tps51632_regmap_config = {
1970c570674SLaxman Dewangan .reg_bits = 8,
1980c570674SLaxman Dewangan .val_bits = 8,
199faa3b2d5SLaxman Dewangan .writeable_reg = is_write_reg,
200faa3b2d5SLaxman Dewangan .readable_reg = is_read_reg,
201faa3b2d5SLaxman Dewangan .volatile_reg = is_volatile_reg,
2020c570674SLaxman Dewangan .max_register = TPS51632_MAX_REG - 1,
2030c570674SLaxman Dewangan .cache_type = REGCACHE_RBTREE,
2040c570674SLaxman Dewangan };
2050c570674SLaxman Dewangan
206c51ce403SLaxman Dewangan #if defined(CONFIG_OF)
207c51ce403SLaxman Dewangan static const struct of_device_id tps51632_of_match[] = {
208c51ce403SLaxman Dewangan { .compatible = "ti,tps51632",},
209c51ce403SLaxman Dewangan {},
210c51ce403SLaxman Dewangan };
211c51ce403SLaxman Dewangan MODULE_DEVICE_TABLE(of, tps51632_of_match);
212c51ce403SLaxman Dewangan
213c51ce403SLaxman Dewangan static struct tps51632_regulator_platform_data *
of_get_tps51632_platform_data(struct device * dev,const struct regulator_desc * desc)214072e78b1SJavier Martinez Canillas of_get_tps51632_platform_data(struct device *dev,
215072e78b1SJavier Martinez Canillas const struct regulator_desc *desc)
216c51ce403SLaxman Dewangan {
217c51ce403SLaxman Dewangan struct tps51632_regulator_platform_data *pdata;
218c51ce403SLaxman Dewangan struct device_node *np = dev->of_node;
219c51ce403SLaxman Dewangan
220c51ce403SLaxman Dewangan pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
221ef4bcf88SSachin Kamat if (!pdata)
222c51ce403SLaxman Dewangan return NULL;
223c51ce403SLaxman Dewangan
224072e78b1SJavier Martinez Canillas pdata->reg_init_data = of_get_regulator_init_data(dev, dev->of_node,
225072e78b1SJavier Martinez Canillas desc);
226c51ce403SLaxman Dewangan if (!pdata->reg_init_data) {
227c51ce403SLaxman Dewangan dev_err(dev, "Not able to get OF regulator init data\n");
228c51ce403SLaxman Dewangan return NULL;
229c51ce403SLaxman Dewangan }
230c51ce403SLaxman Dewangan
231c51ce403SLaxman Dewangan pdata->enable_pwm_dvfs =
232c51ce403SLaxman Dewangan of_property_read_bool(np, "ti,enable-pwm-dvfs");
233c51ce403SLaxman Dewangan pdata->dvfs_step_20mV = of_property_read_bool(np, "ti,dvfs-step-20mV");
234c51ce403SLaxman Dewangan
235c51ce403SLaxman Dewangan pdata->base_voltage_uV = pdata->reg_init_data->constraints.min_uV ? :
2369d9339d3SFabio Estevam TPS51632_MIN_VOLTAGE;
237c51ce403SLaxman Dewangan pdata->max_voltage_uV = pdata->reg_init_data->constraints.max_uV ? :
2389d9339d3SFabio Estevam TPS51632_MAX_VOLTAGE;
239c51ce403SLaxman Dewangan return pdata;
240c51ce403SLaxman Dewangan }
241c51ce403SLaxman Dewangan #else
242c51ce403SLaxman Dewangan static struct tps51632_regulator_platform_data *
of_get_tps51632_platform_data(struct device * dev,const struct regulator_desc * desc)243072e78b1SJavier Martinez Canillas of_get_tps51632_platform_data(struct device *dev,
244072e78b1SJavier Martinez Canillas const struct regulator_desc *desc)
245c51ce403SLaxman Dewangan {
246c51ce403SLaxman Dewangan return NULL;
247c51ce403SLaxman Dewangan }
248c51ce403SLaxman Dewangan #endif
249c51ce403SLaxman Dewangan
tps51632_probe(struct i2c_client * client)250d4885f30SUwe Kleine-König static int tps51632_probe(struct i2c_client *client)
2510c570674SLaxman Dewangan {
2520c570674SLaxman Dewangan struct tps51632_regulator_platform_data *pdata;
2530c570674SLaxman Dewangan struct regulator_dev *rdev;
2540c570674SLaxman Dewangan struct tps51632_chip *tps;
2550c570674SLaxman Dewangan int ret;
2560c570674SLaxman Dewangan struct regulator_config config = { };
2570c570674SLaxman Dewangan
258c51ce403SLaxman Dewangan if (client->dev.of_node) {
259c51ce403SLaxman Dewangan const struct of_device_id *match;
260c51ce403SLaxman Dewangan match = of_match_device(of_match_ptr(tps51632_of_match),
261c51ce403SLaxman Dewangan &client->dev);
262c51ce403SLaxman Dewangan if (!match) {
263c51ce403SLaxman Dewangan dev_err(&client->dev, "Error: No device match found\n");
264c51ce403SLaxman Dewangan return -ENODEV;
265c51ce403SLaxman Dewangan }
266c51ce403SLaxman Dewangan }
267c51ce403SLaxman Dewangan
268072e78b1SJavier Martinez Canillas tps = devm_kzalloc(&client->dev, sizeof(*tps), GFP_KERNEL);
269072e78b1SJavier Martinez Canillas if (!tps)
270072e78b1SJavier Martinez Canillas return -ENOMEM;
271072e78b1SJavier Martinez Canillas
272072e78b1SJavier Martinez Canillas tps->dev = &client->dev;
273072e78b1SJavier Martinez Canillas tps->desc.name = client->name;
274072e78b1SJavier Martinez Canillas tps->desc.id = 0;
275072e78b1SJavier Martinez Canillas tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY;
276072e78b1SJavier Martinez Canillas tps->desc.min_uV = TPS51632_MIN_VOLTAGE;
277072e78b1SJavier Martinez Canillas tps->desc.uV_step = TPS51632_VOLTAGE_STEP_10mV;
278072e78b1SJavier Martinez Canillas tps->desc.linear_min_sel = TPS51632_MIN_VSEL;
279072e78b1SJavier Martinez Canillas tps->desc.n_voltages = TPS51632_MAX_VSEL + 1;
280072e78b1SJavier Martinez Canillas tps->desc.ops = &tps51632_dcdc_ops;
281072e78b1SJavier Martinez Canillas tps->desc.type = REGULATOR_VOLTAGE;
282072e78b1SJavier Martinez Canillas tps->desc.owner = THIS_MODULE;
283072e78b1SJavier Martinez Canillas
284dff91d0bSJingoo Han pdata = dev_get_platdata(&client->dev);
285c51ce403SLaxman Dewangan if (!pdata && client->dev.of_node)
286072e78b1SJavier Martinez Canillas pdata = of_get_tps51632_platform_data(&client->dev, &tps->desc);
2870c570674SLaxman Dewangan if (!pdata) {
2880c570674SLaxman Dewangan dev_err(&client->dev, "No Platform data\n");
2890c570674SLaxman Dewangan return -EINVAL;
2900c570674SLaxman Dewangan }
2910c570674SLaxman Dewangan
292dbc70518SAxel Lin if (pdata->enable_pwm_dvfs) {
2939d9339d3SFabio Estevam if ((pdata->base_voltage_uV < TPS51632_MIN_VOLTAGE) ||
2949d9339d3SFabio Estevam (pdata->base_voltage_uV > TPS51632_MAX_VOLTAGE)) {
295dbc70518SAxel Lin dev_err(&client->dev, "Invalid base_voltage_uV setting\n");
296dbc70518SAxel Lin return -EINVAL;
297dbc70518SAxel Lin }
298dbc70518SAxel Lin
299dbc70518SAxel Lin if ((pdata->max_voltage_uV) &&
3009d9339d3SFabio Estevam ((pdata->max_voltage_uV < TPS51632_MIN_VOLTAGE) ||
3019d9339d3SFabio Estevam (pdata->max_voltage_uV > TPS51632_MAX_VOLTAGE))) {
302dbc70518SAxel Lin dev_err(&client->dev, "Invalid max_voltage_uV setting\n");
303dbc70518SAxel Lin return -EINVAL;
304dbc70518SAxel Lin }
305dbc70518SAxel Lin }
306dbc70518SAxel Lin
307d94d9acaSAxel Lin if (pdata->enable_pwm_dvfs)
308d94d9acaSAxel Lin tps->desc.vsel_reg = TPS51632_VOLTAGE_BASE_REG;
309d94d9acaSAxel Lin else
310d94d9acaSAxel Lin tps->desc.vsel_reg = TPS51632_VOLTAGE_SELECT_REG;
311d94d9acaSAxel Lin tps->desc.vsel_mask = TPS51632_VOUT_MASK;
312d94d9acaSAxel Lin
3130c570674SLaxman Dewangan tps->regmap = devm_regmap_init_i2c(client, &tps51632_regmap_config);
3140c570674SLaxman Dewangan if (IS_ERR(tps->regmap)) {
3150c570674SLaxman Dewangan ret = PTR_ERR(tps->regmap);
3160c570674SLaxman Dewangan dev_err(&client->dev, "regmap init failed, err %d\n", ret);
3170c570674SLaxman Dewangan return ret;
3180c570674SLaxman Dewangan }
3190c570674SLaxman Dewangan i2c_set_clientdata(client, tps);
3200c570674SLaxman Dewangan
3210c570674SLaxman Dewangan ret = tps51632_init_dcdc(tps, pdata);
3220c570674SLaxman Dewangan if (ret < 0) {
3230c570674SLaxman Dewangan dev_err(tps->dev, "Init failed, err = %d\n", ret);
3240c570674SLaxman Dewangan return ret;
3250c570674SLaxman Dewangan }
3260c570674SLaxman Dewangan
3270c570674SLaxman Dewangan /* Register the regulators */
3280c570674SLaxman Dewangan config.dev = &client->dev;
3290c570674SLaxman Dewangan config.init_data = pdata->reg_init_data;
3300c570674SLaxman Dewangan config.driver_data = tps;
3310c570674SLaxman Dewangan config.regmap = tps->regmap;
3320c570674SLaxman Dewangan config.of_node = client->dev.of_node;
3330c570674SLaxman Dewangan
3341084081dSSachin Kamat rdev = devm_regulator_register(&client->dev, &tps->desc, &config);
3350c570674SLaxman Dewangan if (IS_ERR(rdev)) {
3360c570674SLaxman Dewangan dev_err(tps->dev, "regulator register failed\n");
3370c570674SLaxman Dewangan return PTR_ERR(rdev);
3380c570674SLaxman Dewangan }
3390c570674SLaxman Dewangan
3400c570674SLaxman Dewangan tps->rdev = rdev;
3410c570674SLaxman Dewangan return 0;
3420c570674SLaxman Dewangan }
3430c570674SLaxman Dewangan
3440c570674SLaxman Dewangan static const struct i2c_device_id tps51632_id[] = {
3450c570674SLaxman Dewangan {.name = "tps51632",},
3460c570674SLaxman Dewangan {},
3470c570674SLaxman Dewangan };
3480c570674SLaxman Dewangan
3490c570674SLaxman Dewangan MODULE_DEVICE_TABLE(i2c, tps51632_id);
3500c570674SLaxman Dewangan
3510c570674SLaxman Dewangan static struct i2c_driver tps51632_i2c_driver = {
3520c570674SLaxman Dewangan .driver = {
3530c570674SLaxman Dewangan .name = "tps51632",
354259b93b2SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS,
355c51ce403SLaxman Dewangan .of_match_table = of_match_ptr(tps51632_of_match),
3560c570674SLaxman Dewangan },
357*964e1865SUwe Kleine-König .probe = tps51632_probe,
3580c570674SLaxman Dewangan .id_table = tps51632_id,
3590c570674SLaxman Dewangan };
3600c570674SLaxman Dewangan
tps51632_init(void)3610c570674SLaxman Dewangan static int __init tps51632_init(void)
3620c570674SLaxman Dewangan {
3630c570674SLaxman Dewangan return i2c_add_driver(&tps51632_i2c_driver);
3640c570674SLaxman Dewangan }
3650c570674SLaxman Dewangan subsys_initcall(tps51632_init);
3660c570674SLaxman Dewangan
tps51632_cleanup(void)3670c570674SLaxman Dewangan static void __exit tps51632_cleanup(void)
3680c570674SLaxman Dewangan {
3690c570674SLaxman Dewangan i2c_del_driver(&tps51632_i2c_driver);
3700c570674SLaxman Dewangan }
3710c570674SLaxman Dewangan module_exit(tps51632_cleanup);
3720c570674SLaxman Dewangan
3730c570674SLaxman Dewangan MODULE_AUTHOR("Laxman Dewangan <ldewangan@nvidia.com>");
3740c570674SLaxman Dewangan MODULE_DESCRIPTION("TPS51632 voltage regulator driver");
3750c570674SLaxman Dewangan MODULE_LICENSE("GPL v2");
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