1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) STMicroelectronics 2018 3 // Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics. 4 5 #include <linux/interrupt.h> 6 #include <linux/mfd/stpmic1.h> 7 #include <linux/module.h> 8 #include <linux/of_irq.h> 9 #include <linux/platform_device.h> 10 #include <linux/regmap.h> 11 #include <linux/regulator/driver.h> 12 #include <linux/regulator/machine.h> 13 #include <linux/regulator/of_regulator.h> 14 15 /** 16 * stpmic1 regulator description 17 * @desc: regulator framework description 18 * @mask_reset_reg: mask reset register address 19 * @mask_reset_mask: mask rank and mask reset register mask 20 * @icc_reg: icc register address 21 * @icc_mask: icc register mask 22 */ 23 struct stpmic1_regulator_cfg { 24 struct regulator_desc desc; 25 u8 mask_reset_reg; 26 u8 mask_reset_mask; 27 u8 icc_reg; 28 u8 icc_mask; 29 }; 30 31 /** 32 * stpmic1 regulator data: this structure is used as driver data 33 * @reg_node: DT node of regulator (unused on non-DT platforms) 34 * @cfg: stpmic specific regulator description 35 * @mask_reset: mask_reset bit value 36 * @irq_curlim: current limit interrupt number 37 */ 38 struct stpmic1_regulator { 39 struct device_node *reg_node; 40 const struct stpmic1_regulator_cfg *cfg; 41 u8 mask_reset; 42 int irq_curlim; 43 }; 44 45 static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode); 46 static unsigned int stpmic1_get_mode(struct regulator_dev *rdev); 47 static int stpmic1_set_icc(struct regulator_dev *rdev); 48 static int stpmic1_regulator_parse_dt(void *driver_data); 49 static unsigned int stpmic1_map_mode(unsigned int mode); 50 51 enum { 52 STPMIC1_BUCK1 = 0, 53 STPMIC1_BUCK2 = 1, 54 STPMIC1_BUCK3 = 2, 55 STPMIC1_BUCK4 = 3, 56 STPMIC1_LDO1 = 4, 57 STPMIC1_LDO2 = 5, 58 STPMIC1_LDO3 = 6, 59 STPMIC1_LDO4 = 7, 60 STPMIC1_LDO5 = 8, 61 STPMIC1_LDO6 = 9, 62 STPMIC1_VREF_DDR = 10, 63 STPMIC1_BOOST = 11, 64 STPMIC1_VBUS_OTG = 12, 65 STPMIC1_SW_OUT = 13, 66 }; 67 68 /* Enable time worst case is 5000mV/(2250uV/uS) */ 69 #define PMIC_ENABLE_TIME_US 2200 70 71 #define STPMIC1_BUCK_MODE_NORMAL 0 72 #define STPMIC1_BUCK_MODE_LP BUCK_HPLP_ENABLE_MASK 73 74 static const struct regulator_linear_range buck1_ranges[] = { 75 REGULATOR_LINEAR_RANGE(600000, 0, 30, 25000), 76 REGULATOR_LINEAR_RANGE(1350000, 31, 63, 0), 77 }; 78 79 static const struct regulator_linear_range buck2_ranges[] = { 80 REGULATOR_LINEAR_RANGE(1000000, 0, 17, 0), 81 REGULATOR_LINEAR_RANGE(1050000, 18, 19, 0), 82 REGULATOR_LINEAR_RANGE(1100000, 20, 21, 0), 83 REGULATOR_LINEAR_RANGE(1150000, 22, 23, 0), 84 REGULATOR_LINEAR_RANGE(1200000, 24, 25, 0), 85 REGULATOR_LINEAR_RANGE(1250000, 26, 27, 0), 86 REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0), 87 REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0), 88 REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0), 89 REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0), 90 REGULATOR_LINEAR_RANGE(1500000, 36, 63, 0), 91 }; 92 93 static const struct regulator_linear_range buck3_ranges[] = { 94 REGULATOR_LINEAR_RANGE(1000000, 0, 19, 0), 95 REGULATOR_LINEAR_RANGE(1100000, 20, 23, 0), 96 REGULATOR_LINEAR_RANGE(1200000, 24, 27, 0), 97 REGULATOR_LINEAR_RANGE(1300000, 28, 31, 0), 98 REGULATOR_LINEAR_RANGE(1400000, 32, 35, 0), 99 REGULATOR_LINEAR_RANGE(1500000, 36, 55, 100000), 100 REGULATOR_LINEAR_RANGE(3400000, 56, 63, 0), 101 }; 102 103 static const struct regulator_linear_range buck4_ranges[] = { 104 REGULATOR_LINEAR_RANGE(600000, 0, 27, 25000), 105 REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0), 106 REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0), 107 REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0), 108 REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0), 109 REGULATOR_LINEAR_RANGE(1500000, 36, 60, 100000), 110 REGULATOR_LINEAR_RANGE(3900000, 61, 63, 0), 111 }; 112 113 static const struct regulator_linear_range ldo1_ranges[] = { 114 REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0), 115 REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000), 116 REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0), 117 }; 118 119 static const struct regulator_linear_range ldo2_ranges[] = { 120 REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0), 121 REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000), 122 REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0), 123 }; 124 125 static const struct regulator_linear_range ldo3_ranges[] = { 126 REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0), 127 REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000), 128 REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0), 129 /* with index 31 LDO3 is in DDR mode */ 130 REGULATOR_LINEAR_RANGE(500000, 31, 31, 0), 131 }; 132 133 static const struct regulator_linear_range ldo5_ranges[] = { 134 REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0), 135 REGULATOR_LINEAR_RANGE(1700000, 8, 30, 100000), 136 REGULATOR_LINEAR_RANGE(3900000, 31, 31, 0), 137 }; 138 139 static const struct regulator_linear_range ldo6_ranges[] = { 140 REGULATOR_LINEAR_RANGE(900000, 0, 24, 100000), 141 REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0), 142 }; 143 144 static const struct regulator_ops stpmic1_ldo_ops = { 145 .list_voltage = regulator_list_voltage_linear_range, 146 .map_voltage = regulator_map_voltage_linear_range, 147 .is_enabled = regulator_is_enabled_regmap, 148 .enable = regulator_enable_regmap, 149 .disable = regulator_disable_regmap, 150 .get_voltage_sel = regulator_get_voltage_sel_regmap, 151 .set_voltage_sel = regulator_set_voltage_sel_regmap, 152 .set_pull_down = regulator_set_pull_down_regmap, 153 .set_over_current_protection = stpmic1_set_icc, 154 }; 155 156 static const struct regulator_ops stpmic1_ldo3_ops = { 157 .list_voltage = regulator_list_voltage_linear_range, 158 .map_voltage = regulator_map_voltage_iterate, 159 .is_enabled = regulator_is_enabled_regmap, 160 .enable = regulator_enable_regmap, 161 .disable = regulator_disable_regmap, 162 .get_voltage_sel = regulator_get_voltage_sel_regmap, 163 .set_voltage_sel = regulator_set_voltage_sel_regmap, 164 .set_pull_down = regulator_set_pull_down_regmap, 165 .get_bypass = regulator_get_bypass_regmap, 166 .set_bypass = regulator_set_bypass_regmap, 167 .set_over_current_protection = stpmic1_set_icc, 168 }; 169 170 static const struct regulator_ops stpmic1_ldo4_fixed_regul_ops = { 171 .is_enabled = regulator_is_enabled_regmap, 172 .enable = regulator_enable_regmap, 173 .disable = regulator_disable_regmap, 174 .set_pull_down = regulator_set_pull_down_regmap, 175 .set_over_current_protection = stpmic1_set_icc, 176 }; 177 178 static const struct regulator_ops stpmic1_buck_ops = { 179 .list_voltage = regulator_list_voltage_linear_range, 180 .map_voltage = regulator_map_voltage_linear_range, 181 .is_enabled = regulator_is_enabled_regmap, 182 .enable = regulator_enable_regmap, 183 .disable = regulator_disable_regmap, 184 .get_voltage_sel = regulator_get_voltage_sel_regmap, 185 .set_voltage_sel = regulator_set_voltage_sel_regmap, 186 .set_pull_down = regulator_set_pull_down_regmap, 187 .set_mode = stpmic1_set_mode, 188 .get_mode = stpmic1_get_mode, 189 .set_over_current_protection = stpmic1_set_icc, 190 }; 191 192 static const struct regulator_ops stpmic1_vref_ddr_ops = { 193 .is_enabled = regulator_is_enabled_regmap, 194 .enable = regulator_enable_regmap, 195 .disable = regulator_disable_regmap, 196 .set_pull_down = regulator_set_pull_down_regmap, 197 }; 198 199 static const struct regulator_ops stpmic1_switch_regul_ops = { 200 .is_enabled = regulator_is_enabled_regmap, 201 .enable = regulator_enable_regmap, 202 .disable = regulator_disable_regmap, 203 .set_over_current_protection = stpmic1_set_icc, 204 }; 205 206 #define REG_LDO(ids, base) { \ 207 .name = #ids, \ 208 .id = STPMIC1_##ids, \ 209 .n_voltages = 32, \ 210 .ops = &stpmic1_ldo_ops, \ 211 .linear_ranges = base ## _ranges, \ 212 .n_linear_ranges = ARRAY_SIZE(base ## _ranges), \ 213 .type = REGULATOR_VOLTAGE, \ 214 .owner = THIS_MODULE, \ 215 .vsel_reg = ids##_ACTIVE_CR, \ 216 .vsel_mask = LDO_VOLTAGE_MASK, \ 217 .enable_reg = ids##_ACTIVE_CR, \ 218 .enable_mask = LDO_ENABLE_MASK, \ 219 .enable_val = 1, \ 220 .disable_val = 0, \ 221 .enable_time = PMIC_ENABLE_TIME_US, \ 222 .pull_down_reg = ids##_PULL_DOWN_REG, \ 223 .pull_down_mask = ids##_PULL_DOWN_MASK, \ 224 .supply_name = #base, \ 225 } 226 227 #define REG_LDO3(ids, base) { \ 228 .name = #ids, \ 229 .id = STPMIC1_##ids, \ 230 .n_voltages = 32, \ 231 .ops = &stpmic1_ldo3_ops, \ 232 .linear_ranges = ldo3_ranges, \ 233 .n_linear_ranges = ARRAY_SIZE(ldo3_ranges), \ 234 .type = REGULATOR_VOLTAGE, \ 235 .owner = THIS_MODULE, \ 236 .vsel_reg = LDO3_ACTIVE_CR, \ 237 .vsel_mask = LDO_VOLTAGE_MASK, \ 238 .enable_reg = LDO3_ACTIVE_CR, \ 239 .enable_mask = LDO_ENABLE_MASK, \ 240 .enable_val = 1, \ 241 .disable_val = 0, \ 242 .enable_time = PMIC_ENABLE_TIME_US, \ 243 .bypass_reg = LDO3_ACTIVE_CR, \ 244 .bypass_mask = LDO_BYPASS_MASK, \ 245 .bypass_val_on = LDO_BYPASS_MASK, \ 246 .bypass_val_off = 0, \ 247 .pull_down_reg = ids##_PULL_DOWN_REG, \ 248 .pull_down_mask = ids##_PULL_DOWN_MASK, \ 249 .supply_name = #base, \ 250 } 251 252 #define REG_LDO4(ids, base) { \ 253 .name = #ids, \ 254 .id = STPMIC1_##ids, \ 255 .n_voltages = 1, \ 256 .ops = &stpmic1_ldo4_fixed_regul_ops, \ 257 .type = REGULATOR_VOLTAGE, \ 258 .owner = THIS_MODULE, \ 259 .min_uV = 3300000, \ 260 .fixed_uV = 3300000, \ 261 .enable_reg = LDO4_ACTIVE_CR, \ 262 .enable_mask = LDO_ENABLE_MASK, \ 263 .enable_val = 1, \ 264 .disable_val = 0, \ 265 .enable_time = PMIC_ENABLE_TIME_US, \ 266 .pull_down_reg = ids##_PULL_DOWN_REG, \ 267 .pull_down_mask = ids##_PULL_DOWN_MASK, \ 268 .supply_name = #base, \ 269 } 270 271 #define REG_BUCK(ids, base) { \ 272 .name = #ids, \ 273 .id = STPMIC1_##ids, \ 274 .ops = &stpmic1_buck_ops, \ 275 .n_voltages = 64, \ 276 .linear_ranges = base ## _ranges, \ 277 .n_linear_ranges = ARRAY_SIZE(base ## _ranges), \ 278 .type = REGULATOR_VOLTAGE, \ 279 .owner = THIS_MODULE, \ 280 .vsel_reg = ids##_ACTIVE_CR, \ 281 .vsel_mask = BUCK_VOLTAGE_MASK, \ 282 .enable_reg = ids##_ACTIVE_CR, \ 283 .enable_mask = BUCK_ENABLE_MASK, \ 284 .enable_val = 1, \ 285 .disable_val = 0, \ 286 .enable_time = PMIC_ENABLE_TIME_US, \ 287 .of_map_mode = stpmic1_map_mode, \ 288 .pull_down_reg = ids##_PULL_DOWN_REG, \ 289 .pull_down_mask = ids##_PULL_DOWN_MASK, \ 290 .supply_name = #base, \ 291 } 292 293 #define REG_VREF_DDR(ids, base) { \ 294 .name = #ids, \ 295 .id = STPMIC1_##ids, \ 296 .n_voltages = 1, \ 297 .ops = &stpmic1_vref_ddr_ops, \ 298 .type = REGULATOR_VOLTAGE, \ 299 .owner = THIS_MODULE, \ 300 .min_uV = 500000, \ 301 .fixed_uV = 500000, \ 302 .enable_reg = VREF_DDR_ACTIVE_CR, \ 303 .enable_mask = BUCK_ENABLE_MASK, \ 304 .enable_val = 1, \ 305 .disable_val = 0, \ 306 .enable_time = PMIC_ENABLE_TIME_US, \ 307 .pull_down_reg = ids##_PULL_DOWN_REG, \ 308 .pull_down_mask = ids##_PULL_DOWN_MASK, \ 309 .supply_name = #base, \ 310 } 311 312 #define REG_SWITCH(ids, base, reg, mask, val) { \ 313 .name = #ids, \ 314 .id = STPMIC1_##ids, \ 315 .n_voltages = 1, \ 316 .ops = &stpmic1_switch_regul_ops, \ 317 .type = REGULATOR_VOLTAGE, \ 318 .owner = THIS_MODULE, \ 319 .min_uV = 0, \ 320 .fixed_uV = 5000000, \ 321 .enable_reg = (reg), \ 322 .enable_mask = (mask), \ 323 .enable_val = (val), \ 324 .disable_val = 0, \ 325 .enable_time = PMIC_ENABLE_TIME_US, \ 326 .supply_name = #base, \ 327 } 328 329 static const struct stpmic1_regulator_cfg stpmic1_regulator_cfgs[] = { 330 [STPMIC1_BUCK1] = { 331 .desc = REG_BUCK(BUCK1, buck1), 332 .icc_reg = BUCKS_ICCTO_CR, 333 .icc_mask = BIT(0), 334 .mask_reset_reg = BUCKS_MASK_RESET_CR, 335 .mask_reset_mask = BIT(0), 336 }, 337 [STPMIC1_BUCK2] = { 338 .desc = REG_BUCK(BUCK2, buck2), 339 .icc_reg = BUCKS_ICCTO_CR, 340 .icc_mask = BIT(1), 341 .mask_reset_reg = BUCKS_MASK_RESET_CR, 342 .mask_reset_mask = BIT(1), 343 }, 344 [STPMIC1_BUCK3] = { 345 .desc = REG_BUCK(BUCK3, buck3), 346 .icc_reg = BUCKS_ICCTO_CR, 347 .icc_mask = BIT(2), 348 .mask_reset_reg = BUCKS_MASK_RESET_CR, 349 .mask_reset_mask = BIT(2), 350 }, 351 [STPMIC1_BUCK4] = { 352 .desc = REG_BUCK(BUCK4, buck4), 353 .icc_reg = BUCKS_ICCTO_CR, 354 .icc_mask = BIT(3), 355 .mask_reset_reg = BUCKS_MASK_RESET_CR, 356 .mask_reset_mask = BIT(3), 357 }, 358 [STPMIC1_LDO1] = { 359 .desc = REG_LDO(LDO1, ldo1), 360 .icc_reg = LDOS_ICCTO_CR, 361 .icc_mask = BIT(0), 362 .mask_reset_reg = LDOS_MASK_RESET_CR, 363 .mask_reset_mask = BIT(0), 364 }, 365 [STPMIC1_LDO2] = { 366 .desc = REG_LDO(LDO2, ldo2), 367 .icc_reg = LDOS_ICCTO_CR, 368 .icc_mask = BIT(1), 369 .mask_reset_reg = LDOS_MASK_RESET_CR, 370 .mask_reset_mask = BIT(1), 371 }, 372 [STPMIC1_LDO3] = { 373 .desc = REG_LDO3(LDO3, ldo3), 374 .icc_reg = LDOS_ICCTO_CR, 375 .icc_mask = BIT(2), 376 .mask_reset_reg = LDOS_MASK_RESET_CR, 377 .mask_reset_mask = BIT(2), 378 }, 379 [STPMIC1_LDO4] = { 380 .desc = REG_LDO4(LDO4, ldo4), 381 .icc_reg = LDOS_ICCTO_CR, 382 .icc_mask = BIT(3), 383 .mask_reset_reg = LDOS_MASK_RESET_CR, 384 .mask_reset_mask = BIT(3), 385 }, 386 [STPMIC1_LDO5] = { 387 .desc = REG_LDO(LDO5, ldo5), 388 .icc_reg = LDOS_ICCTO_CR, 389 .icc_mask = BIT(4), 390 .mask_reset_reg = LDOS_MASK_RESET_CR, 391 .mask_reset_mask = BIT(4), 392 }, 393 [STPMIC1_LDO6] = { 394 .desc = REG_LDO(LDO6, ldo6), 395 .icc_reg = LDOS_ICCTO_CR, 396 .icc_mask = BIT(5), 397 .mask_reset_reg = LDOS_MASK_RESET_CR, 398 .mask_reset_mask = BIT(5), 399 }, 400 [STPMIC1_VREF_DDR] = { 401 .desc = REG_VREF_DDR(VREF_DDR, vref_ddr), 402 .mask_reset_reg = LDOS_MASK_RESET_CR, 403 .mask_reset_mask = BIT(6), 404 }, 405 [STPMIC1_BOOST] = { 406 .desc = REG_SWITCH(BOOST, boost, BST_SW_CR, 407 BOOST_ENABLED, 408 BOOST_ENABLED), 409 .icc_reg = BUCKS_ICCTO_CR, 410 .icc_mask = BIT(6), 411 }, 412 [STPMIC1_VBUS_OTG] = { 413 .desc = REG_SWITCH(VBUS_OTG, pwr_sw1, BST_SW_CR, 414 USBSW_OTG_SWITCH_ENABLED, 415 USBSW_OTG_SWITCH_ENABLED), 416 .icc_reg = BUCKS_ICCTO_CR, 417 .icc_mask = BIT(4), 418 }, 419 [STPMIC1_SW_OUT] = { 420 .desc = REG_SWITCH(SW_OUT, pwr_sw2, BST_SW_CR, 421 SWIN_SWOUT_ENABLED, 422 SWIN_SWOUT_ENABLED), 423 .icc_reg = BUCKS_ICCTO_CR, 424 .icc_mask = BIT(5), 425 }, 426 }; 427 428 static unsigned int stpmic1_map_mode(unsigned int mode) 429 { 430 switch (mode) { 431 case STPMIC1_BUCK_MODE_NORMAL: 432 return REGULATOR_MODE_NORMAL; 433 case STPMIC1_BUCK_MODE_LP: 434 return REGULATOR_MODE_STANDBY; 435 default: 436 return REGULATOR_MODE_INVALID; 437 } 438 } 439 440 static unsigned int stpmic1_get_mode(struct regulator_dev *rdev) 441 { 442 int value; 443 444 regmap_read(rdev->regmap, rdev->desc->enable_reg, &value); 445 446 if (value & STPMIC1_BUCK_MODE_LP) 447 return REGULATOR_MODE_STANDBY; 448 449 return REGULATOR_MODE_NORMAL; 450 } 451 452 static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode) 453 { 454 int value; 455 456 switch (mode) { 457 case REGULATOR_MODE_NORMAL: 458 value = STPMIC1_BUCK_MODE_NORMAL; 459 break; 460 case REGULATOR_MODE_STANDBY: 461 value = STPMIC1_BUCK_MODE_LP; 462 break; 463 default: 464 return -EINVAL; 465 } 466 467 return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, 468 STPMIC1_BUCK_MODE_LP, value); 469 } 470 471 static int stpmic1_set_icc(struct regulator_dev *rdev) 472 { 473 struct stpmic1_regulator *regul = rdev_get_drvdata(rdev); 474 struct regmap *regmap = rdev_get_regmap(rdev); 475 476 /* enable switch off in case of over current */ 477 return regmap_update_bits(regmap, regul->cfg->icc_reg, 478 regul->cfg->icc_mask, regul->cfg->icc_mask); 479 } 480 481 static irqreturn_t stpmic1_curlim_irq_handler(int irq, void *data) 482 { 483 struct regulator_dev *rdev = (struct regulator_dev *)data; 484 485 regulator_lock(rdev); 486 487 /* Send an overcurrent notification */ 488 regulator_notifier_call_chain(rdev, 489 REGULATOR_EVENT_OVER_CURRENT, 490 NULL); 491 492 regulator_unlock(rdev); 493 494 return IRQ_HANDLED; 495 } 496 497 static int stpmic1_regulator_init(struct platform_device *pdev, 498 struct regulator_dev *rdev) 499 { 500 struct stpmic1_regulator *regul = rdev_get_drvdata(rdev); 501 struct regmap *regmap = rdev_get_regmap(rdev); 502 int ret = 0; 503 504 /* set mask reset */ 505 if (regul->mask_reset && regul->cfg->mask_reset_reg != 0) { 506 ret = regmap_update_bits(regmap, 507 regul->cfg->mask_reset_reg, 508 regul->cfg->mask_reset_mask, 509 regul->cfg->mask_reset_mask); 510 if (ret) { 511 dev_err(&pdev->dev, "set mask reset failed\n"); 512 return ret; 513 } 514 } 515 516 /* setup an irq handler for over-current detection */ 517 if (regul->irq_curlim > 0) { 518 ret = devm_request_threaded_irq(&pdev->dev, 519 regul->irq_curlim, NULL, 520 stpmic1_curlim_irq_handler, 521 IRQF_ONESHOT | IRQF_SHARED, 522 pdev->name, rdev); 523 if (ret) { 524 dev_err(&pdev->dev, "Request IRQ failed\n"); 525 return ret; 526 } 527 } 528 return 0; 529 } 530 531 #define MATCH(_name, _id) \ 532 [STPMIC1_##_id] = { \ 533 .name = #_name, \ 534 .desc = &stpmic1_regulator_cfgs[STPMIC1_##_id].desc, \ 535 } 536 537 static struct of_regulator_match stpmic1_regulators_matches[] = { 538 MATCH(buck1, BUCK1), 539 MATCH(buck2, BUCK2), 540 MATCH(buck3, BUCK3), 541 MATCH(buck4, BUCK4), 542 MATCH(ldo1, LDO1), 543 MATCH(ldo2, LDO2), 544 MATCH(ldo3, LDO3), 545 MATCH(ldo4, LDO4), 546 MATCH(ldo5, LDO5), 547 MATCH(ldo6, LDO6), 548 MATCH(vref_ddr, VREF_DDR), 549 MATCH(boost, BOOST), 550 MATCH(pwr_sw1, VBUS_OTG), 551 MATCH(pwr_sw2, SW_OUT), 552 }; 553 554 static int stpmic1_regulator_parse_dt(void *driver_data) 555 { 556 struct stpmic1_regulator *regul = 557 (struct stpmic1_regulator *)driver_data; 558 559 if (!regul) 560 return -EINVAL; 561 562 if (of_get_property(regul->reg_node, "st,mask-reset", NULL)) 563 regul->mask_reset = 1; 564 565 regul->irq_curlim = of_irq_get(regul->reg_node, 0); 566 567 return 0; 568 } 569 570 static struct 571 regulator_dev *stpmic1_regulator_register(struct platform_device *pdev, int id, 572 struct regulator_init_data *init_data, 573 struct stpmic1_regulator *regul) 574 { 575 struct stpmic1 *pmic_dev = dev_get_drvdata(pdev->dev.parent); 576 struct regulator_dev *rdev; 577 struct regulator_config config = {}; 578 579 config.dev = &pdev->dev; 580 config.init_data = init_data; 581 config.of_node = stpmic1_regulators_matches[id].of_node; 582 config.regmap = pmic_dev->regmap; 583 config.driver_data = regul; 584 585 regul->reg_node = config.of_node; 586 regul->cfg = &stpmic1_regulator_cfgs[id]; 587 588 rdev = devm_regulator_register(&pdev->dev, ®ul->cfg->desc, &config); 589 if (IS_ERR(rdev)) { 590 dev_err(&pdev->dev, "failed to register %s regulator\n", 591 regul->cfg->desc.name); 592 } 593 594 return rdev; 595 } 596 597 static int stpmic1_regulator_probe(struct platform_device *pdev) 598 { 599 struct regulator_dev *rdev; 600 struct stpmic1_regulator *regul; 601 struct regulator_init_data *init_data; 602 struct device_node *np; 603 int i, ret; 604 605 np = pdev->dev.of_node; 606 607 ret = of_regulator_match(&pdev->dev, np, 608 stpmic1_regulators_matches, 609 ARRAY_SIZE(stpmic1_regulators_matches)); 610 if (ret < 0) { 611 dev_err(&pdev->dev, 612 "Error in PMIC regulator device tree node"); 613 return ret; 614 } 615 616 regul = devm_kzalloc(&pdev->dev, ARRAY_SIZE(stpmic1_regulator_cfgs) * 617 sizeof(struct stpmic1_regulator), 618 GFP_KERNEL); 619 if (!regul) 620 return -ENOMEM; 621 622 for (i = 0; i < ARRAY_SIZE(stpmic1_regulator_cfgs); i++) { 623 /* Parse DT & find regulators to register */ 624 init_data = stpmic1_regulators_matches[i].init_data; 625 if (init_data) 626 init_data->regulator_init = &stpmic1_regulator_parse_dt; 627 628 rdev = stpmic1_regulator_register(pdev, i, init_data, regul); 629 if (IS_ERR(rdev)) 630 return PTR_ERR(rdev); 631 632 ret = stpmic1_regulator_init(pdev, rdev); 633 if (ret) { 634 dev_err(&pdev->dev, 635 "failed to initialize regulator %d\n", ret); 636 return ret; 637 } 638 639 regul++; 640 } 641 642 dev_dbg(&pdev->dev, "stpmic1_regulator driver probed\n"); 643 644 return 0; 645 } 646 647 static const struct of_device_id of_pmic_regulator_match[] = { 648 { .compatible = "st,stpmic1-regulators" }, 649 { }, 650 }; 651 652 MODULE_DEVICE_TABLE(of, of_pmic_regulator_match); 653 654 static struct platform_driver stpmic1_regulator_driver = { 655 .driver = { 656 .name = "stpmic1-regulator", 657 .of_match_table = of_match_ptr(of_pmic_regulator_match), 658 }, 659 .probe = stpmic1_regulator_probe, 660 }; 661 662 module_platform_driver(stpmic1_regulator_driver); 663 664 MODULE_DESCRIPTION("STPMIC1 PMIC voltage regulator driver"); 665 MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>"); 666 MODULE_LICENSE("GPL v2"); 667