1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) STMicroelectronics 2018
3 // Author: Pascal Paillet <p.paillet@st.com> for STMicroelectronics.
4 
5 #include <linux/interrupt.h>
6 #include <linux/mfd/stpmic1.h>
7 #include <linux/module.h>
8 #include <linux/of_irq.h>
9 #include <linux/platform_device.h>
10 #include <linux/regmap.h>
11 #include <linux/regulator/driver.h>
12 #include <linux/regulator/machine.h>
13 #include <linux/regulator/of_regulator.h>
14 
15 #include <dt-bindings/mfd/st,stpmic1.h>
16 
17 /**
18  * struct stpmic1 regulator description: this structure is used as driver data
19  * @desc: regulator framework description
20  * @mask_reset_reg: mask reset register address
21  * @mask_reset_mask: mask rank and mask reset register mask
22  * @icc_reg: icc register address
23  * @icc_mask: icc register mask
24  */
25 struct stpmic1_regulator_cfg {
26 	struct regulator_desc desc;
27 	u8 mask_reset_reg;
28 	u8 mask_reset_mask;
29 	u8 icc_reg;
30 	u8 icc_mask;
31 };
32 
33 static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode);
34 static unsigned int stpmic1_get_mode(struct regulator_dev *rdev);
35 static int stpmic1_set_icc(struct regulator_dev *rdev);
36 static unsigned int stpmic1_map_mode(unsigned int mode);
37 
38 enum {
39 	STPMIC1_BUCK1 = 0,
40 	STPMIC1_BUCK2 = 1,
41 	STPMIC1_BUCK3 = 2,
42 	STPMIC1_BUCK4 = 3,
43 	STPMIC1_LDO1 = 4,
44 	STPMIC1_LDO2 = 5,
45 	STPMIC1_LDO3 = 6,
46 	STPMIC1_LDO4 = 7,
47 	STPMIC1_LDO5 = 8,
48 	STPMIC1_LDO6 = 9,
49 	STPMIC1_VREF_DDR = 10,
50 	STPMIC1_BOOST = 11,
51 	STPMIC1_VBUS_OTG = 12,
52 	STPMIC1_SW_OUT = 13,
53 };
54 
55 /* Enable time worst case is 5000mV/(2250uV/uS) */
56 #define PMIC_ENABLE_TIME_US 2200
57 /* Ramp delay worst case is (2250uV/uS) */
58 #define PMIC_RAMP_DELAY 2200
59 
60 static const struct linear_range buck1_ranges[] = {
61 	REGULATOR_LINEAR_RANGE(725000, 0, 4, 0),
62 	REGULATOR_LINEAR_RANGE(725000, 5, 36, 25000),
63 	REGULATOR_LINEAR_RANGE(1500000, 37, 63, 0),
64 };
65 
66 static const struct linear_range buck2_ranges[] = {
67 	REGULATOR_LINEAR_RANGE(1000000, 0, 17, 0),
68 	REGULATOR_LINEAR_RANGE(1050000, 18, 19, 0),
69 	REGULATOR_LINEAR_RANGE(1100000, 20, 21, 0),
70 	REGULATOR_LINEAR_RANGE(1150000, 22, 23, 0),
71 	REGULATOR_LINEAR_RANGE(1200000, 24, 25, 0),
72 	REGULATOR_LINEAR_RANGE(1250000, 26, 27, 0),
73 	REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0),
74 	REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0),
75 	REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0),
76 	REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0),
77 	REGULATOR_LINEAR_RANGE(1500000, 36, 63, 0),
78 };
79 
80 static const struct linear_range buck3_ranges[] = {
81 	REGULATOR_LINEAR_RANGE(1000000, 0, 19, 0),
82 	REGULATOR_LINEAR_RANGE(1100000, 20, 23, 0),
83 	REGULATOR_LINEAR_RANGE(1200000, 24, 27, 0),
84 	REGULATOR_LINEAR_RANGE(1300000, 28, 31, 0),
85 	REGULATOR_LINEAR_RANGE(1400000, 32, 35, 0),
86 	REGULATOR_LINEAR_RANGE(1500000, 36, 55, 100000),
87 	REGULATOR_LINEAR_RANGE(3400000, 56, 63, 0),
88 };
89 
90 static const struct linear_range buck4_ranges[] = {
91 	REGULATOR_LINEAR_RANGE(600000, 0, 27, 25000),
92 	REGULATOR_LINEAR_RANGE(1300000, 28, 29, 0),
93 	REGULATOR_LINEAR_RANGE(1350000, 30, 31, 0),
94 	REGULATOR_LINEAR_RANGE(1400000, 32, 33, 0),
95 	REGULATOR_LINEAR_RANGE(1450000, 34, 35, 0),
96 	REGULATOR_LINEAR_RANGE(1500000, 36, 60, 100000),
97 	REGULATOR_LINEAR_RANGE(3900000, 61, 63, 0),
98 };
99 
100 static const struct linear_range ldo1_ranges[] = {
101 	REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
102 	REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
103 	REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0),
104 };
105 
106 static const struct linear_range ldo2_ranges[] = {
107 	REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
108 	REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
109 	REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0),
110 };
111 
112 static const struct linear_range ldo3_ranges[] = {
113 	REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
114 	REGULATOR_LINEAR_RANGE(1700000, 8, 24, 100000),
115 	REGULATOR_LINEAR_RANGE(3300000, 25, 30, 0),
116 	/* with index 31 LDO3 is in DDR mode */
117 	REGULATOR_LINEAR_RANGE(500000, 31, 31, 0),
118 };
119 
120 static const struct linear_range ldo5_ranges[] = {
121 	REGULATOR_LINEAR_RANGE(1700000, 0, 7, 0),
122 	REGULATOR_LINEAR_RANGE(1700000, 8, 30, 100000),
123 	REGULATOR_LINEAR_RANGE(3900000, 31, 31, 0),
124 };
125 
126 static const struct linear_range ldo6_ranges[] = {
127 	REGULATOR_LINEAR_RANGE(900000, 0, 24, 100000),
128 	REGULATOR_LINEAR_RANGE(3300000, 25, 31, 0),
129 };
130 
131 static const struct regulator_ops stpmic1_ldo_ops = {
132 	.list_voltage = regulator_list_voltage_linear_range,
133 	.map_voltage = regulator_map_voltage_linear_range,
134 	.is_enabled = regulator_is_enabled_regmap,
135 	.enable = regulator_enable_regmap,
136 	.disable = regulator_disable_regmap,
137 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
138 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
139 	.set_over_current_protection = stpmic1_set_icc,
140 };
141 
142 static const struct regulator_ops stpmic1_ldo3_ops = {
143 	.list_voltage = regulator_list_voltage_linear_range,
144 	.map_voltage = regulator_map_voltage_iterate,
145 	.is_enabled = regulator_is_enabled_regmap,
146 	.enable = regulator_enable_regmap,
147 	.disable = regulator_disable_regmap,
148 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
149 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
150 	.get_bypass = regulator_get_bypass_regmap,
151 	.set_bypass = regulator_set_bypass_regmap,
152 	.set_over_current_protection = stpmic1_set_icc,
153 };
154 
155 static const struct regulator_ops stpmic1_ldo4_fixed_regul_ops = {
156 	.is_enabled = regulator_is_enabled_regmap,
157 	.enable = regulator_enable_regmap,
158 	.disable = regulator_disable_regmap,
159 	.set_over_current_protection = stpmic1_set_icc,
160 };
161 
162 static const struct regulator_ops stpmic1_buck_ops = {
163 	.list_voltage = regulator_list_voltage_linear_range,
164 	.map_voltage = regulator_map_voltage_linear_range,
165 	.is_enabled = regulator_is_enabled_regmap,
166 	.enable = regulator_enable_regmap,
167 	.disable = regulator_disable_regmap,
168 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
169 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
170 	.set_pull_down = regulator_set_pull_down_regmap,
171 	.set_mode = stpmic1_set_mode,
172 	.get_mode = stpmic1_get_mode,
173 	.set_over_current_protection = stpmic1_set_icc,
174 };
175 
176 static const struct regulator_ops stpmic1_vref_ddr_ops = {
177 	.is_enabled = regulator_is_enabled_regmap,
178 	.enable = regulator_enable_regmap,
179 	.disable = regulator_disable_regmap,
180 };
181 
182 static const struct regulator_ops stpmic1_boost_regul_ops = {
183 	.is_enabled = regulator_is_enabled_regmap,
184 	.enable = regulator_enable_regmap,
185 	.disable = regulator_disable_regmap,
186 	.set_over_current_protection = stpmic1_set_icc,
187 };
188 
189 static const struct regulator_ops stpmic1_switch_regul_ops = {
190 	.is_enabled = regulator_is_enabled_regmap,
191 	.enable = regulator_enable_regmap,
192 	.disable = regulator_disable_regmap,
193 	.set_over_current_protection = stpmic1_set_icc,
194 	.set_active_discharge = regulator_set_active_discharge_regmap,
195 };
196 
197 #define REG_LDO(ids, base) { \
198 	.name = #ids, \
199 	.id = STPMIC1_##ids, \
200 	.n_voltages = 32, \
201 	.ops = &stpmic1_ldo_ops, \
202 	.linear_ranges = base ## _ranges, \
203 	.n_linear_ranges = ARRAY_SIZE(base ## _ranges), \
204 	.type = REGULATOR_VOLTAGE, \
205 	.owner = THIS_MODULE, \
206 	.vsel_reg = ids##_ACTIVE_CR, \
207 	.vsel_mask = LDO_VOLTAGE_MASK, \
208 	.enable_reg = ids##_ACTIVE_CR, \
209 	.enable_mask = LDO_ENABLE_MASK, \
210 	.enable_val = 1, \
211 	.disable_val = 0, \
212 	.enable_time = PMIC_ENABLE_TIME_US, \
213 	.ramp_delay = PMIC_RAMP_DELAY, \
214 	.supply_name = #base, \
215 }
216 
217 #define REG_LDO3(ids, base) { \
218 	.name = #ids, \
219 	.id = STPMIC1_##ids, \
220 	.n_voltages = 32, \
221 	.ops = &stpmic1_ldo3_ops, \
222 	.linear_ranges = ldo3_ranges, \
223 	.n_linear_ranges = ARRAY_SIZE(ldo3_ranges), \
224 	.type = REGULATOR_VOLTAGE, \
225 	.owner = THIS_MODULE, \
226 	.vsel_reg = LDO3_ACTIVE_CR, \
227 	.vsel_mask = LDO_VOLTAGE_MASK, \
228 	.enable_reg = LDO3_ACTIVE_CR, \
229 	.enable_mask = LDO_ENABLE_MASK, \
230 	.enable_val = 1, \
231 	.disable_val = 0, \
232 	.enable_time = PMIC_ENABLE_TIME_US, \
233 	.ramp_delay = PMIC_RAMP_DELAY, \
234 	.bypass_reg = LDO3_ACTIVE_CR, \
235 	.bypass_mask = LDO_BYPASS_MASK, \
236 	.bypass_val_on = LDO_BYPASS_MASK, \
237 	.bypass_val_off = 0, \
238 	.supply_name = #base, \
239 }
240 
241 #define REG_LDO4(ids, base) { \
242 	.name = #ids, \
243 	.id = STPMIC1_##ids, \
244 	.n_voltages = 1, \
245 	.ops = &stpmic1_ldo4_fixed_regul_ops, \
246 	.type = REGULATOR_VOLTAGE, \
247 	.owner = THIS_MODULE, \
248 	.min_uV = 3300000, \
249 	.fixed_uV = 3300000, \
250 	.enable_reg = LDO4_ACTIVE_CR, \
251 	.enable_mask = LDO_ENABLE_MASK, \
252 	.enable_val = 1, \
253 	.disable_val = 0, \
254 	.enable_time = PMIC_ENABLE_TIME_US, \
255 	.ramp_delay = PMIC_RAMP_DELAY, \
256 	.supply_name = #base, \
257 }
258 
259 #define REG_BUCK(ids, base) { \
260 	.name = #ids, \
261 	.id = STPMIC1_##ids, \
262 	.ops = &stpmic1_buck_ops, \
263 	.n_voltages = 64, \
264 	.linear_ranges = base ## _ranges, \
265 	.n_linear_ranges = ARRAY_SIZE(base ## _ranges), \
266 	.type = REGULATOR_VOLTAGE, \
267 	.owner = THIS_MODULE, \
268 	.vsel_reg = ids##_ACTIVE_CR, \
269 	.vsel_mask = BUCK_VOLTAGE_MASK, \
270 	.enable_reg = ids##_ACTIVE_CR, \
271 	.enable_mask = BUCK_ENABLE_MASK, \
272 	.enable_val = 1, \
273 	.disable_val = 0, \
274 	.enable_time = PMIC_ENABLE_TIME_US, \
275 	.ramp_delay = PMIC_RAMP_DELAY, \
276 	.of_map_mode = stpmic1_map_mode, \
277 	.pull_down_reg = ids##_PULL_DOWN_REG, \
278 	.pull_down_mask = ids##_PULL_DOWN_MASK, \
279 	.supply_name = #base, \
280 }
281 
282 #define REG_VREF_DDR(ids, base) { \
283 	.name = #ids, \
284 	.id = STPMIC1_##ids, \
285 	.n_voltages = 1, \
286 	.ops = &stpmic1_vref_ddr_ops, \
287 	.type = REGULATOR_VOLTAGE, \
288 	.owner = THIS_MODULE, \
289 	.min_uV = 500000, \
290 	.fixed_uV = 500000, \
291 	.enable_reg = VREF_DDR_ACTIVE_CR, \
292 	.enable_mask = BUCK_ENABLE_MASK, \
293 	.enable_val = 1, \
294 	.disable_val = 0, \
295 	.enable_time = PMIC_ENABLE_TIME_US, \
296 	.supply_name = #base, \
297 }
298 
299 #define REG_BOOST(ids, base) { \
300 	.name = #ids, \
301 	.id = STPMIC1_##ids, \
302 	.n_voltages = 1, \
303 	.ops = &stpmic1_boost_regul_ops, \
304 	.type = REGULATOR_VOLTAGE, \
305 	.owner = THIS_MODULE, \
306 	.min_uV = 0, \
307 	.fixed_uV = 5000000, \
308 	.enable_reg = BST_SW_CR, \
309 	.enable_mask = BOOST_ENABLED, \
310 	.enable_val = BOOST_ENABLED, \
311 	.disable_val = 0, \
312 	.enable_time = PMIC_ENABLE_TIME_US, \
313 	.supply_name = #base, \
314 }
315 
316 #define REG_VBUS_OTG(ids, base) { \
317 	.name = #ids, \
318 	.id = STPMIC1_##ids, \
319 	.n_voltages = 1, \
320 	.ops = &stpmic1_switch_regul_ops, \
321 	.type = REGULATOR_VOLTAGE, \
322 	.owner = THIS_MODULE, \
323 	.min_uV = 0, \
324 	.fixed_uV = 5000000, \
325 	.enable_reg = BST_SW_CR, \
326 	.enable_mask = USBSW_OTG_SWITCH_ENABLED, \
327 	.enable_val = USBSW_OTG_SWITCH_ENABLED, \
328 	.disable_val = 0, \
329 	.enable_time = PMIC_ENABLE_TIME_US, \
330 	.supply_name = #base, \
331 	.active_discharge_reg = BST_SW_CR, \
332 	.active_discharge_mask = VBUS_OTG_DISCHARGE, \
333 	.active_discharge_on = VBUS_OTG_DISCHARGE, \
334 }
335 
336 #define REG_SW_OUT(ids, base) { \
337 	.name = #ids, \
338 	.id = STPMIC1_##ids, \
339 	.n_voltages = 1, \
340 	.ops = &stpmic1_switch_regul_ops, \
341 	.type = REGULATOR_VOLTAGE, \
342 	.owner = THIS_MODULE, \
343 	.min_uV = 0, \
344 	.fixed_uV = 5000000, \
345 	.enable_reg = BST_SW_CR, \
346 	.enable_mask = SWIN_SWOUT_ENABLED, \
347 	.enable_val = SWIN_SWOUT_ENABLED, \
348 	.disable_val = 0, \
349 	.enable_time = PMIC_ENABLE_TIME_US, \
350 	.supply_name = #base, \
351 	.active_discharge_reg = BST_SW_CR, \
352 	.active_discharge_mask = SW_OUT_DISCHARGE, \
353 	.active_discharge_on = SW_OUT_DISCHARGE, \
354 }
355 
356 static const struct stpmic1_regulator_cfg stpmic1_regulator_cfgs[] = {
357 	[STPMIC1_BUCK1] = {
358 		.desc = REG_BUCK(BUCK1, buck1),
359 		.icc_reg = BUCKS_ICCTO_CR,
360 		.icc_mask = BIT(0),
361 		.mask_reset_reg = BUCKS_MASK_RESET_CR,
362 		.mask_reset_mask = BIT(0),
363 	},
364 	[STPMIC1_BUCK2] = {
365 		.desc = REG_BUCK(BUCK2, buck2),
366 		.icc_reg = BUCKS_ICCTO_CR,
367 		.icc_mask = BIT(1),
368 		.mask_reset_reg = BUCKS_MASK_RESET_CR,
369 		.mask_reset_mask = BIT(1),
370 	},
371 	[STPMIC1_BUCK3] = {
372 		.desc = REG_BUCK(BUCK3, buck3),
373 		.icc_reg = BUCKS_ICCTO_CR,
374 		.icc_mask = BIT(2),
375 		.mask_reset_reg = BUCKS_MASK_RESET_CR,
376 		.mask_reset_mask = BIT(2),
377 	},
378 	[STPMIC1_BUCK4] = {
379 		.desc = REG_BUCK(BUCK4, buck4),
380 		.icc_reg = BUCKS_ICCTO_CR,
381 		.icc_mask = BIT(3),
382 		.mask_reset_reg = BUCKS_MASK_RESET_CR,
383 		.mask_reset_mask = BIT(3),
384 	},
385 	[STPMIC1_LDO1] = {
386 		.desc = REG_LDO(LDO1, ldo1),
387 		.icc_reg = LDOS_ICCTO_CR,
388 		.icc_mask = BIT(0),
389 		.mask_reset_reg = LDOS_MASK_RESET_CR,
390 		.mask_reset_mask = BIT(0),
391 	},
392 	[STPMIC1_LDO2] = {
393 		.desc = REG_LDO(LDO2, ldo2),
394 		.icc_reg = LDOS_ICCTO_CR,
395 		.icc_mask = BIT(1),
396 		.mask_reset_reg = LDOS_MASK_RESET_CR,
397 		.mask_reset_mask = BIT(1),
398 	},
399 	[STPMIC1_LDO3] = {
400 		.desc = REG_LDO3(LDO3, ldo3),
401 		.icc_reg = LDOS_ICCTO_CR,
402 		.icc_mask = BIT(2),
403 		.mask_reset_reg = LDOS_MASK_RESET_CR,
404 		.mask_reset_mask = BIT(2),
405 	},
406 	[STPMIC1_LDO4] = {
407 		.desc = REG_LDO4(LDO4, ldo4),
408 		.icc_reg = LDOS_ICCTO_CR,
409 		.icc_mask = BIT(3),
410 		.mask_reset_reg = LDOS_MASK_RESET_CR,
411 		.mask_reset_mask = BIT(3),
412 	},
413 	[STPMIC1_LDO5] = {
414 		.desc = REG_LDO(LDO5, ldo5),
415 		.icc_reg = LDOS_ICCTO_CR,
416 		.icc_mask = BIT(4),
417 		.mask_reset_reg = LDOS_MASK_RESET_CR,
418 		.mask_reset_mask = BIT(4),
419 	},
420 	[STPMIC1_LDO6] = {
421 		.desc = REG_LDO(LDO6, ldo6),
422 		.icc_reg = LDOS_ICCTO_CR,
423 		.icc_mask = BIT(5),
424 		.mask_reset_reg = LDOS_MASK_RESET_CR,
425 		.mask_reset_mask = BIT(5),
426 	},
427 	[STPMIC1_VREF_DDR] = {
428 		.desc = REG_VREF_DDR(VREF_DDR, vref_ddr),
429 		.mask_reset_reg = LDOS_MASK_RESET_CR,
430 		.mask_reset_mask = BIT(6),
431 	},
432 	[STPMIC1_BOOST] = {
433 		.desc = REG_BOOST(BOOST, boost),
434 		.icc_reg = BUCKS_ICCTO_CR,
435 		.icc_mask = BIT(6),
436 	},
437 	[STPMIC1_VBUS_OTG] = {
438 		.desc = REG_VBUS_OTG(VBUS_OTG, pwr_sw1),
439 		.icc_reg = BUCKS_ICCTO_CR,
440 		.icc_mask = BIT(4),
441 	},
442 	[STPMIC1_SW_OUT] = {
443 		.desc = REG_SW_OUT(SW_OUT, pwr_sw2),
444 		.icc_reg = BUCKS_ICCTO_CR,
445 		.icc_mask = BIT(5),
446 	},
447 };
448 
449 static unsigned int stpmic1_map_mode(unsigned int mode)
450 {
451 	switch (mode) {
452 	case STPMIC1_BUCK_MODE_NORMAL:
453 		return REGULATOR_MODE_NORMAL;
454 	case STPMIC1_BUCK_MODE_LP:
455 		return REGULATOR_MODE_STANDBY;
456 	default:
457 		return REGULATOR_MODE_INVALID;
458 	}
459 }
460 
461 static unsigned int stpmic1_get_mode(struct regulator_dev *rdev)
462 {
463 	int value;
464 	struct regmap *regmap = rdev_get_regmap(rdev);
465 
466 	regmap_read(regmap, rdev->desc->enable_reg, &value);
467 
468 	if (value & STPMIC1_BUCK_MODE_LP)
469 		return REGULATOR_MODE_STANDBY;
470 
471 	return REGULATOR_MODE_NORMAL;
472 }
473 
474 static int stpmic1_set_mode(struct regulator_dev *rdev, unsigned int mode)
475 {
476 	int value;
477 	struct regmap *regmap = rdev_get_regmap(rdev);
478 
479 	switch (mode) {
480 	case REGULATOR_MODE_NORMAL:
481 		value = STPMIC1_BUCK_MODE_NORMAL;
482 		break;
483 	case REGULATOR_MODE_STANDBY:
484 		value = STPMIC1_BUCK_MODE_LP;
485 		break;
486 	default:
487 		return -EINVAL;
488 	}
489 
490 	return regmap_update_bits(regmap, rdev->desc->enable_reg,
491 				  STPMIC1_BUCK_MODE_LP, value);
492 }
493 
494 static int stpmic1_set_icc(struct regulator_dev *rdev)
495 {
496 	struct stpmic1_regulator_cfg *cfg = rdev_get_drvdata(rdev);
497 	struct regmap *regmap = rdev_get_regmap(rdev);
498 
499 	/* enable switch off in case of over current */
500 	return regmap_update_bits(regmap, cfg->icc_reg, cfg->icc_mask,
501 				  cfg->icc_mask);
502 }
503 
504 static irqreturn_t stpmic1_curlim_irq_handler(int irq, void *data)
505 {
506 	struct regulator_dev *rdev = (struct regulator_dev *)data;
507 
508 	/* Send an overcurrent notification */
509 	regulator_notifier_call_chain(rdev,
510 				      REGULATOR_EVENT_OVER_CURRENT,
511 				      NULL);
512 
513 	return IRQ_HANDLED;
514 }
515 
516 #define MATCH(_name, _id) \
517 	[STPMIC1_##_id] = { \
518 		.name = #_name, \
519 		.desc = &stpmic1_regulator_cfgs[STPMIC1_##_id].desc, \
520 	}
521 
522 static struct of_regulator_match stpmic1_matches[] = {
523 	MATCH(buck1, BUCK1),
524 	MATCH(buck2, BUCK2),
525 	MATCH(buck3, BUCK3),
526 	MATCH(buck4, BUCK4),
527 	MATCH(ldo1, LDO1),
528 	MATCH(ldo2, LDO2),
529 	MATCH(ldo3, LDO3),
530 	MATCH(ldo4, LDO4),
531 	MATCH(ldo5, LDO5),
532 	MATCH(ldo6, LDO6),
533 	MATCH(vref_ddr, VREF_DDR),
534 	MATCH(boost, BOOST),
535 	MATCH(pwr_sw1, VBUS_OTG),
536 	MATCH(pwr_sw2, SW_OUT),
537 };
538 
539 static int stpmic1_regulator_register(struct platform_device *pdev, int id,
540 				      struct of_regulator_match *match,
541 				      const struct stpmic1_regulator_cfg *cfg)
542 {
543 	struct stpmic1 *pmic_dev = dev_get_drvdata(pdev->dev.parent);
544 	struct regulator_dev *rdev;
545 	struct regulator_config config = {};
546 	int ret = 0;
547 	int irq;
548 
549 	config.dev = &pdev->dev;
550 	config.init_data = match->init_data;
551 	config.of_node = match->of_node;
552 	config.regmap = pmic_dev->regmap;
553 	config.driver_data = (void *)cfg;
554 
555 	rdev = devm_regulator_register(&pdev->dev, &cfg->desc, &config);
556 	if (IS_ERR(rdev)) {
557 		dev_err(&pdev->dev, "failed to register %s regulator\n",
558 			cfg->desc.name);
559 		return PTR_ERR(rdev);
560 	}
561 
562 	/* set mask reset */
563 	if (of_get_property(config.of_node, "st,mask-reset", NULL) &&
564 	    cfg->mask_reset_reg != 0) {
565 		ret = regmap_update_bits(pmic_dev->regmap,
566 					 cfg->mask_reset_reg,
567 					 cfg->mask_reset_mask,
568 					 cfg->mask_reset_mask);
569 		if (ret) {
570 			dev_err(&pdev->dev, "set mask reset failed\n");
571 			return ret;
572 		}
573 	}
574 
575 	/* setup an irq handler for over-current detection */
576 	irq = of_irq_get(config.of_node, 0);
577 	if (irq > 0) {
578 		ret = devm_request_threaded_irq(&pdev->dev,
579 						irq, NULL,
580 						stpmic1_curlim_irq_handler,
581 						IRQF_ONESHOT | IRQF_SHARED,
582 						pdev->name, rdev);
583 		if (ret) {
584 			dev_err(&pdev->dev, "Request IRQ failed\n");
585 			return ret;
586 		}
587 	}
588 	return 0;
589 }
590 
591 static int stpmic1_regulator_probe(struct platform_device *pdev)
592 {
593 	int i, ret;
594 
595 	ret = of_regulator_match(&pdev->dev, pdev->dev.of_node, stpmic1_matches,
596 				 ARRAY_SIZE(stpmic1_matches));
597 	if (ret < 0) {
598 		dev_err(&pdev->dev,
599 			"Error in PMIC regulator device tree node");
600 		return ret;
601 	}
602 
603 	for (i = 0; i < ARRAY_SIZE(stpmic1_regulator_cfgs); i++) {
604 		ret = stpmic1_regulator_register(pdev, i, &stpmic1_matches[i],
605 						 &stpmic1_regulator_cfgs[i]);
606 		if (ret < 0)
607 			return ret;
608 	}
609 
610 	dev_dbg(&pdev->dev, "stpmic1_regulator driver probed\n");
611 
612 	return 0;
613 }
614 
615 static const struct of_device_id of_pmic_regulator_match[] = {
616 	{ .compatible = "st,stpmic1-regulators" },
617 	{ },
618 };
619 
620 MODULE_DEVICE_TABLE(of, of_pmic_regulator_match);
621 
622 static struct platform_driver stpmic1_regulator_driver = {
623 	.driver = {
624 		.name = "stpmic1-regulator",
625 		.of_match_table = of_match_ptr(of_pmic_regulator_match),
626 	},
627 	.probe = stpmic1_regulator_probe,
628 };
629 
630 module_platform_driver(stpmic1_regulator_driver);
631 
632 MODULE_DESCRIPTION("STPMIC1 PMIC voltage regulator driver");
633 MODULE_AUTHOR("Pascal Paillet <p.paillet@st.com>");
634 MODULE_LICENSE("GPL v2");
635