1 /*
2  * Copyright (C) STMicroelectronics 2017
3  *
4  * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
5  *
6  * License terms:  GNU General Public License (GPL), version 2
7  */
8 
9 #include <linux/bitfield.h>
10 #include <linux/clk.h>
11 #include <linux/io.h>
12 #include <linux/iopoll.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/regulator/driver.h>
17 #include <linux/regulator/of_regulator.h>
18 #include <linux/pm_runtime.h>
19 
20 /* STM32 VREFBUF registers */
21 #define STM32_VREFBUF_CSR		0x00
22 
23 /* STM32 VREFBUF CSR bitfields */
24 #define STM32_VRS			GENMASK(6, 4)
25 #define STM32_VRR			BIT(3)
26 #define STM32_HIZ			BIT(1)
27 #define STM32_ENVR			BIT(0)
28 
29 #define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS	10
30 
31 struct stm32_vrefbuf {
32 	void __iomem *base;
33 	struct clk *clk;
34 	struct device *dev;
35 };
36 
37 static const unsigned int stm32_vrefbuf_voltages[] = {
38 	/* Matches resp. VRS = 000b, 001b, 010b, 011b */
39 	2500000, 2048000, 1800000, 1500000,
40 };
41 
42 static int stm32_vrefbuf_enable(struct regulator_dev *rdev)
43 {
44 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
45 	u32 val;
46 	int ret;
47 
48 	ret = pm_runtime_get_sync(priv->dev);
49 	if (ret < 0) {
50 		pm_runtime_put_noidle(priv->dev);
51 		return ret;
52 	}
53 
54 	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
55 	val = (val & ~STM32_HIZ) | STM32_ENVR;
56 	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
57 
58 	/*
59 	 * Vrefbuf startup time depends on external capacitor: wait here for
60 	 * VRR to be set. That means output has reached expected value.
61 	 * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as
62 	 * arbitrary timeout.
63 	 */
64 	ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
65 				 val & STM32_VRR, 650, 10000);
66 	if (ret) {
67 		dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n");
68 		val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
69 		val = (val & ~STM32_ENVR) | STM32_HIZ;
70 		writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
71 	}
72 
73 	pm_runtime_mark_last_busy(priv->dev);
74 	pm_runtime_put_autosuspend(priv->dev);
75 
76 	return ret;
77 }
78 
79 static int stm32_vrefbuf_disable(struct regulator_dev *rdev)
80 {
81 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
82 	u32 val;
83 	int ret;
84 
85 	ret = pm_runtime_get_sync(priv->dev);
86 	if (ret < 0) {
87 		pm_runtime_put_noidle(priv->dev);
88 		return ret;
89 	}
90 
91 	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
92 	val = (val & ~STM32_ENVR) | STM32_HIZ;
93 	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
94 
95 	pm_runtime_mark_last_busy(priv->dev);
96 	pm_runtime_put_autosuspend(priv->dev);
97 
98 	return 0;
99 }
100 
101 static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev)
102 {
103 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
104 	int ret;
105 
106 	ret = pm_runtime_get_sync(priv->dev);
107 	if (ret < 0) {
108 		pm_runtime_put_noidle(priv->dev);
109 		return ret;
110 	}
111 
112 	ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
113 
114 	pm_runtime_mark_last_busy(priv->dev);
115 	pm_runtime_put_autosuspend(priv->dev);
116 
117 	return ret;
118 }
119 
120 static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev,
121 					 unsigned sel)
122 {
123 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
124 	u32 val;
125 	int ret;
126 
127 	ret = pm_runtime_get_sync(priv->dev);
128 	if (ret < 0) {
129 		pm_runtime_put_noidle(priv->dev);
130 		return ret;
131 	}
132 
133 	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
134 	val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel);
135 	writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
136 
137 	pm_runtime_mark_last_busy(priv->dev);
138 	pm_runtime_put_autosuspend(priv->dev);
139 
140 	return 0;
141 }
142 
143 static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev)
144 {
145 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
146 	u32 val;
147 	int ret;
148 
149 	ret = pm_runtime_get_sync(priv->dev);
150 	if (ret < 0) {
151 		pm_runtime_put_noidle(priv->dev);
152 		return ret;
153 	}
154 
155 	val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
156 	ret = FIELD_GET(STM32_VRS, val);
157 
158 	pm_runtime_mark_last_busy(priv->dev);
159 	pm_runtime_put_autosuspend(priv->dev);
160 
161 	return ret;
162 }
163 
164 static const struct regulator_ops stm32_vrefbuf_volt_ops = {
165 	.enable		= stm32_vrefbuf_enable,
166 	.disable	= stm32_vrefbuf_disable,
167 	.is_enabled	= stm32_vrefbuf_is_enabled,
168 	.get_voltage_sel = stm32_vrefbuf_get_voltage_sel,
169 	.set_voltage_sel = stm32_vrefbuf_set_voltage_sel,
170 	.list_voltage	= regulator_list_voltage_table,
171 };
172 
173 static const struct regulator_desc stm32_vrefbuf_regu = {
174 	.name = "vref",
175 	.supply_name = "vdda",
176 	.volt_table = stm32_vrefbuf_voltages,
177 	.n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages),
178 	.ops = &stm32_vrefbuf_volt_ops,
179 	.type = REGULATOR_VOLTAGE,
180 	.owner = THIS_MODULE,
181 };
182 
183 static int stm32_vrefbuf_probe(struct platform_device *pdev)
184 {
185 	struct resource *res;
186 	struct stm32_vrefbuf *priv;
187 	struct regulator_config config = { };
188 	struct regulator_dev *rdev;
189 	int ret;
190 
191 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
192 	if (!priv)
193 		return -ENOMEM;
194 	priv->dev = &pdev->dev;
195 
196 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
197 	priv->base = devm_ioremap_resource(&pdev->dev, res);
198 	if (IS_ERR(priv->base))
199 		return PTR_ERR(priv->base);
200 
201 	priv->clk = devm_clk_get(&pdev->dev, NULL);
202 	if (IS_ERR(priv->clk))
203 		return PTR_ERR(priv->clk);
204 
205 	pm_runtime_get_noresume(&pdev->dev);
206 	pm_runtime_set_active(&pdev->dev);
207 	pm_runtime_set_autosuspend_delay(&pdev->dev,
208 					 STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS);
209 	pm_runtime_use_autosuspend(&pdev->dev);
210 	pm_runtime_enable(&pdev->dev);
211 
212 	ret = clk_prepare_enable(priv->clk);
213 	if (ret) {
214 		dev_err(&pdev->dev, "clk prepare failed with error %d\n", ret);
215 		goto err_pm_stop;
216 	}
217 
218 	config.dev = &pdev->dev;
219 	config.driver_data = priv;
220 	config.of_node = pdev->dev.of_node;
221 	config.init_data = of_get_regulator_init_data(&pdev->dev,
222 						      pdev->dev.of_node,
223 						      &stm32_vrefbuf_regu);
224 
225 	rdev = regulator_register(&stm32_vrefbuf_regu, &config);
226 	if (IS_ERR(rdev)) {
227 		ret = PTR_ERR(rdev);
228 		dev_err(&pdev->dev, "register failed with error %d\n", ret);
229 		goto err_clk_dis;
230 	}
231 	platform_set_drvdata(pdev, rdev);
232 
233 	pm_runtime_mark_last_busy(&pdev->dev);
234 	pm_runtime_put_autosuspend(&pdev->dev);
235 
236 	return 0;
237 
238 err_clk_dis:
239 	clk_disable_unprepare(priv->clk);
240 err_pm_stop:
241 	pm_runtime_disable(&pdev->dev);
242 	pm_runtime_set_suspended(&pdev->dev);
243 	pm_runtime_put_noidle(&pdev->dev);
244 
245 	return ret;
246 }
247 
248 static int stm32_vrefbuf_remove(struct platform_device *pdev)
249 {
250 	struct regulator_dev *rdev = platform_get_drvdata(pdev);
251 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
252 
253 	pm_runtime_get_sync(&pdev->dev);
254 	regulator_unregister(rdev);
255 	clk_disable_unprepare(priv->clk);
256 	pm_runtime_disable(&pdev->dev);
257 	pm_runtime_set_suspended(&pdev->dev);
258 	pm_runtime_put_noidle(&pdev->dev);
259 
260 	return 0;
261 };
262 
263 static int __maybe_unused stm32_vrefbuf_runtime_suspend(struct device *dev)
264 {
265 	struct regulator_dev *rdev = dev_get_drvdata(dev);
266 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
267 
268 	clk_disable_unprepare(priv->clk);
269 
270 	return 0;
271 }
272 
273 static int __maybe_unused stm32_vrefbuf_runtime_resume(struct device *dev)
274 {
275 	struct regulator_dev *rdev = dev_get_drvdata(dev);
276 	struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
277 
278 	return clk_prepare_enable(priv->clk);
279 }
280 
281 static const struct dev_pm_ops stm32_vrefbuf_pm_ops = {
282 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
283 				pm_runtime_force_resume)
284 	SET_RUNTIME_PM_OPS(stm32_vrefbuf_runtime_suspend,
285 			   stm32_vrefbuf_runtime_resume,
286 			   NULL)
287 };
288 
289 static const struct of_device_id stm32_vrefbuf_of_match[] = {
290 	{ .compatible = "st,stm32-vrefbuf", },
291 	{},
292 };
293 MODULE_DEVICE_TABLE(of, stm32_vrefbuf_of_match);
294 
295 static struct platform_driver stm32_vrefbuf_driver = {
296 	.probe = stm32_vrefbuf_probe,
297 	.remove = stm32_vrefbuf_remove,
298 	.driver = {
299 		.name  = "stm32-vrefbuf",
300 		.of_match_table = of_match_ptr(stm32_vrefbuf_of_match),
301 		.pm = &stm32_vrefbuf_pm_ops,
302 	},
303 };
304 module_platform_driver(stm32_vrefbuf_driver);
305 
306 MODULE_LICENSE("GPL v2");
307 MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
308 MODULE_DESCRIPTION("STMicroelectronics STM32 VREFBUF driver");
309 MODULE_ALIAS("platform:stm32-vrefbuf");
310