1 /* 2 * s5m8767.c 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd 5 * http://www.samsung.com 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 * 12 */ 13 14 #include <linux/err.h> 15 #include <linux/of_gpio.h> 16 #include <linux/module.h> 17 #include <linux/platform_device.h> 18 #include <linux/regulator/driver.h> 19 #include <linux/regulator/machine.h> 20 #include <linux/mfd/samsung/core.h> 21 #include <linux/mfd/samsung/s5m8767.h> 22 #include <linux/regulator/of_regulator.h> 23 #include <linux/regmap.h> 24 25 #define S5M8767_OPMODE_NORMAL_MODE 0x1 26 27 struct s5m8767_info { 28 struct device *dev; 29 struct sec_pmic_dev *iodev; 30 int num_regulators; 31 struct sec_opmode_data *opmode; 32 33 int ramp_delay; 34 bool buck2_ramp; 35 bool buck3_ramp; 36 bool buck4_ramp; 37 38 bool buck2_gpiodvs; 39 bool buck3_gpiodvs; 40 bool buck4_gpiodvs; 41 u8 buck2_vol[8]; 42 u8 buck3_vol[8]; 43 u8 buck4_vol[8]; 44 int buck_gpios[3]; 45 int buck_ds[3]; 46 int buck_gpioindex; 47 }; 48 49 struct sec_voltage_desc { 50 int max; 51 int min; 52 int step; 53 }; 54 55 static const struct sec_voltage_desc buck_voltage_val1 = { 56 .max = 2225000, 57 .min = 650000, 58 .step = 6250, 59 }; 60 61 static const struct sec_voltage_desc buck_voltage_val2 = { 62 .max = 1600000, 63 .min = 600000, 64 .step = 6250, 65 }; 66 67 static const struct sec_voltage_desc buck_voltage_val3 = { 68 .max = 3000000, 69 .min = 750000, 70 .step = 12500, 71 }; 72 73 static const struct sec_voltage_desc ldo_voltage_val1 = { 74 .max = 3950000, 75 .min = 800000, 76 .step = 50000, 77 }; 78 79 static const struct sec_voltage_desc ldo_voltage_val2 = { 80 .max = 2375000, 81 .min = 800000, 82 .step = 25000, 83 }; 84 85 static const struct sec_voltage_desc *reg_voltage_map[] = { 86 [S5M8767_LDO1] = &ldo_voltage_val2, 87 [S5M8767_LDO2] = &ldo_voltage_val2, 88 [S5M8767_LDO3] = &ldo_voltage_val1, 89 [S5M8767_LDO4] = &ldo_voltage_val1, 90 [S5M8767_LDO5] = &ldo_voltage_val1, 91 [S5M8767_LDO6] = &ldo_voltage_val2, 92 [S5M8767_LDO7] = &ldo_voltage_val2, 93 [S5M8767_LDO8] = &ldo_voltage_val2, 94 [S5M8767_LDO9] = &ldo_voltage_val1, 95 [S5M8767_LDO10] = &ldo_voltage_val1, 96 [S5M8767_LDO11] = &ldo_voltage_val1, 97 [S5M8767_LDO12] = &ldo_voltage_val1, 98 [S5M8767_LDO13] = &ldo_voltage_val1, 99 [S5M8767_LDO14] = &ldo_voltage_val1, 100 [S5M8767_LDO15] = &ldo_voltage_val2, 101 [S5M8767_LDO16] = &ldo_voltage_val1, 102 [S5M8767_LDO17] = &ldo_voltage_val1, 103 [S5M8767_LDO18] = &ldo_voltage_val1, 104 [S5M8767_LDO19] = &ldo_voltage_val1, 105 [S5M8767_LDO20] = &ldo_voltage_val1, 106 [S5M8767_LDO21] = &ldo_voltage_val1, 107 [S5M8767_LDO22] = &ldo_voltage_val1, 108 [S5M8767_LDO23] = &ldo_voltage_val1, 109 [S5M8767_LDO24] = &ldo_voltage_val1, 110 [S5M8767_LDO25] = &ldo_voltage_val1, 111 [S5M8767_LDO26] = &ldo_voltage_val1, 112 [S5M8767_LDO27] = &ldo_voltage_val1, 113 [S5M8767_LDO28] = &ldo_voltage_val1, 114 [S5M8767_BUCK1] = &buck_voltage_val1, 115 [S5M8767_BUCK2] = &buck_voltage_val2, 116 [S5M8767_BUCK3] = &buck_voltage_val2, 117 [S5M8767_BUCK4] = &buck_voltage_val2, 118 [S5M8767_BUCK5] = &buck_voltage_val1, 119 [S5M8767_BUCK6] = &buck_voltage_val1, 120 [S5M8767_BUCK7] = &buck_voltage_val3, 121 [S5M8767_BUCK8] = &buck_voltage_val3, 122 [S5M8767_BUCK9] = &buck_voltage_val3, 123 }; 124 125 static unsigned int s5m8767_opmode_reg[][4] = { 126 /* {OFF, ON, LOWPOWER, SUSPEND} */ 127 /* LDO1 ... LDO28 */ 128 {0x0, 0x3, 0x2, 0x1}, /* LDO1 */ 129 {0x0, 0x3, 0x2, 0x1}, 130 {0x0, 0x3, 0x2, 0x1}, 131 {0x0, 0x0, 0x0, 0x0}, 132 {0x0, 0x3, 0x2, 0x1}, /* LDO5 */ 133 {0x0, 0x3, 0x2, 0x1}, 134 {0x0, 0x3, 0x2, 0x1}, 135 {0x0, 0x3, 0x2, 0x1}, 136 {0x0, 0x3, 0x2, 0x1}, 137 {0x0, 0x3, 0x2, 0x1}, /* LDO10 */ 138 {0x0, 0x3, 0x2, 0x1}, 139 {0x0, 0x3, 0x2, 0x1}, 140 {0x0, 0x3, 0x2, 0x1}, 141 {0x0, 0x3, 0x2, 0x1}, 142 {0x0, 0x3, 0x2, 0x1}, /* LDO15 */ 143 {0x0, 0x3, 0x2, 0x1}, 144 {0x0, 0x3, 0x2, 0x1}, 145 {0x0, 0x0, 0x0, 0x0}, 146 {0x0, 0x3, 0x2, 0x1}, 147 {0x0, 0x3, 0x2, 0x1}, /* LDO20 */ 148 {0x0, 0x3, 0x2, 0x1}, 149 {0x0, 0x3, 0x2, 0x1}, 150 {0x0, 0x0, 0x0, 0x0}, 151 {0x0, 0x3, 0x2, 0x1}, 152 {0x0, 0x3, 0x2, 0x1}, /* LDO25 */ 153 {0x0, 0x3, 0x2, 0x1}, 154 {0x0, 0x3, 0x2, 0x1}, 155 {0x0, 0x3, 0x2, 0x1}, /* LDO28 */ 156 157 /* BUCK1 ... BUCK9 */ 158 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */ 159 {0x0, 0x3, 0x1, 0x1}, 160 {0x0, 0x3, 0x1, 0x1}, 161 {0x0, 0x3, 0x1, 0x1}, 162 {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */ 163 {0x0, 0x3, 0x1, 0x1}, 164 {0x0, 0x3, 0x1, 0x1}, 165 {0x0, 0x3, 0x1, 0x1}, 166 {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */ 167 }; 168 169 static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id, 170 int *reg, int *enable_ctrl) 171 { 172 int i; 173 unsigned int mode; 174 175 switch (reg_id) { 176 case S5M8767_LDO1 ... S5M8767_LDO2: 177 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); 178 break; 179 case S5M8767_LDO3 ... S5M8767_LDO28: 180 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); 181 break; 182 case S5M8767_BUCK1: 183 *reg = S5M8767_REG_BUCK1CTRL1; 184 break; 185 case S5M8767_BUCK2 ... S5M8767_BUCK4: 186 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; 187 break; 188 case S5M8767_BUCK5: 189 *reg = S5M8767_REG_BUCK5CTRL1; 190 break; 191 case S5M8767_BUCK6 ... S5M8767_BUCK9: 192 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; 193 break; 194 default: 195 return -EINVAL; 196 } 197 198 for (i = 0; i < s5m8767->num_regulators; i++) { 199 if (s5m8767->opmode[i].id == reg_id) { 200 mode = s5m8767->opmode[i].mode; 201 break; 202 } 203 } 204 205 if (i >= s5m8767->num_regulators) 206 return -EINVAL; 207 208 *enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT; 209 210 return 0; 211 } 212 213 static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767) 214 { 215 int reg; 216 217 switch (reg_id) { 218 case S5M8767_LDO1 ... S5M8767_LDO2: 219 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); 220 break; 221 case S5M8767_LDO3 ... S5M8767_LDO28: 222 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); 223 break; 224 case S5M8767_BUCK1: 225 reg = S5M8767_REG_BUCK1CTRL2; 226 break; 227 case S5M8767_BUCK2: 228 reg = S5M8767_REG_BUCK2DVS1; 229 if (s5m8767->buck2_gpiodvs) 230 reg += s5m8767->buck_gpioindex; 231 break; 232 case S5M8767_BUCK3: 233 reg = S5M8767_REG_BUCK3DVS1; 234 if (s5m8767->buck3_gpiodvs) 235 reg += s5m8767->buck_gpioindex; 236 break; 237 case S5M8767_BUCK4: 238 reg = S5M8767_REG_BUCK4DVS1; 239 if (s5m8767->buck4_gpiodvs) 240 reg += s5m8767->buck_gpioindex; 241 break; 242 case S5M8767_BUCK5: 243 reg = S5M8767_REG_BUCK5CTRL2; 244 break; 245 case S5M8767_BUCK6 ... S5M8767_BUCK9: 246 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2; 247 break; 248 default: 249 return -EINVAL; 250 } 251 252 return reg; 253 } 254 255 static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc, 256 int min_vol) 257 { 258 int selector = 0; 259 260 if (desc == NULL) 261 return -EINVAL; 262 263 if (min_vol > desc->max) 264 return -EINVAL; 265 266 if (min_vol < desc->min) 267 min_vol = desc->min; 268 269 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step); 270 271 if (desc->min + desc->step * selector > desc->max) 272 return -EINVAL; 273 274 return selector; 275 } 276 277 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767) 278 { 279 int temp_index = s5m8767->buck_gpioindex; 280 281 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1); 282 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1); 283 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1); 284 285 return 0; 286 } 287 288 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767) 289 { 290 int temp_index = s5m8767->buck_gpioindex; 291 292 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1); 293 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1); 294 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1); 295 296 return 0; 297 } 298 299 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev, 300 unsigned selector) 301 { 302 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 303 int reg_id = rdev_get_id(rdev); 304 int old_index, index = 0; 305 u8 *buck234_vol = NULL; 306 307 switch (reg_id) { 308 case S5M8767_LDO1 ... S5M8767_LDO28: 309 break; 310 case S5M8767_BUCK1 ... S5M8767_BUCK6: 311 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs) 312 buck234_vol = &s5m8767->buck2_vol[0]; 313 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs) 314 buck234_vol = &s5m8767->buck3_vol[0]; 315 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs) 316 buck234_vol = &s5m8767->buck4_vol[0]; 317 break; 318 case S5M8767_BUCK7 ... S5M8767_BUCK8: 319 return -EINVAL; 320 case S5M8767_BUCK9: 321 break; 322 default: 323 return -EINVAL; 324 } 325 326 /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */ 327 if (buck234_vol) { 328 while (*buck234_vol != selector) { 329 buck234_vol++; 330 index++; 331 } 332 old_index = s5m8767->buck_gpioindex; 333 s5m8767->buck_gpioindex = index; 334 335 if (index > old_index) 336 return s5m8767_set_high(s5m8767); 337 else 338 return s5m8767_set_low(s5m8767); 339 } else { 340 return regulator_set_voltage_sel_regmap(rdev, selector); 341 } 342 } 343 344 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev, 345 unsigned int old_sel, 346 unsigned int new_sel) 347 { 348 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 349 const struct sec_voltage_desc *desc; 350 int reg_id = rdev_get_id(rdev); 351 352 desc = reg_voltage_map[reg_id]; 353 354 if ((old_sel < new_sel) && s5m8767->ramp_delay) 355 return DIV_ROUND_UP(desc->step * (new_sel - old_sel), 356 s5m8767->ramp_delay * 1000); 357 return 0; 358 } 359 360 static const struct regulator_ops s5m8767_ops = { 361 .list_voltage = regulator_list_voltage_linear, 362 .is_enabled = regulator_is_enabled_regmap, 363 .enable = regulator_enable_regmap, 364 .disable = regulator_disable_regmap, 365 .get_voltage_sel = regulator_get_voltage_sel_regmap, 366 .set_voltage_sel = s5m8767_set_voltage_sel, 367 .set_voltage_time_sel = s5m8767_set_voltage_time_sel, 368 }; 369 370 static const struct regulator_ops s5m8767_buck78_ops = { 371 .list_voltage = regulator_list_voltage_linear, 372 .is_enabled = regulator_is_enabled_regmap, 373 .enable = regulator_enable_regmap, 374 .disable = regulator_disable_regmap, 375 .get_voltage_sel = regulator_get_voltage_sel_regmap, 376 .set_voltage_sel = regulator_set_voltage_sel_regmap, 377 }; 378 379 #define s5m8767_regulator_desc(_name) { \ 380 .name = #_name, \ 381 .id = S5M8767_##_name, \ 382 .ops = &s5m8767_ops, \ 383 .type = REGULATOR_VOLTAGE, \ 384 .owner = THIS_MODULE, \ 385 } 386 387 #define s5m8767_regulator_buck78_desc(_name) { \ 388 .name = #_name, \ 389 .id = S5M8767_##_name, \ 390 .ops = &s5m8767_buck78_ops, \ 391 .type = REGULATOR_VOLTAGE, \ 392 .owner = THIS_MODULE, \ 393 } 394 395 static struct regulator_desc regulators[] = { 396 s5m8767_regulator_desc(LDO1), 397 s5m8767_regulator_desc(LDO2), 398 s5m8767_regulator_desc(LDO3), 399 s5m8767_regulator_desc(LDO4), 400 s5m8767_regulator_desc(LDO5), 401 s5m8767_regulator_desc(LDO6), 402 s5m8767_regulator_desc(LDO7), 403 s5m8767_regulator_desc(LDO8), 404 s5m8767_regulator_desc(LDO9), 405 s5m8767_regulator_desc(LDO10), 406 s5m8767_regulator_desc(LDO11), 407 s5m8767_regulator_desc(LDO12), 408 s5m8767_regulator_desc(LDO13), 409 s5m8767_regulator_desc(LDO14), 410 s5m8767_regulator_desc(LDO15), 411 s5m8767_regulator_desc(LDO16), 412 s5m8767_regulator_desc(LDO17), 413 s5m8767_regulator_desc(LDO18), 414 s5m8767_regulator_desc(LDO19), 415 s5m8767_regulator_desc(LDO20), 416 s5m8767_regulator_desc(LDO21), 417 s5m8767_regulator_desc(LDO22), 418 s5m8767_regulator_desc(LDO23), 419 s5m8767_regulator_desc(LDO24), 420 s5m8767_regulator_desc(LDO25), 421 s5m8767_regulator_desc(LDO26), 422 s5m8767_regulator_desc(LDO27), 423 s5m8767_regulator_desc(LDO28), 424 s5m8767_regulator_desc(BUCK1), 425 s5m8767_regulator_desc(BUCK2), 426 s5m8767_regulator_desc(BUCK3), 427 s5m8767_regulator_desc(BUCK4), 428 s5m8767_regulator_desc(BUCK5), 429 s5m8767_regulator_desc(BUCK6), 430 s5m8767_regulator_buck78_desc(BUCK7), 431 s5m8767_regulator_buck78_desc(BUCK8), 432 s5m8767_regulator_desc(BUCK9), 433 }; 434 435 /* 436 * Enable GPIO control over BUCK9 in regulator_config for that regulator. 437 */ 438 static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767, 439 struct sec_regulator_data *rdata, 440 struct regulator_config *config) 441 { 442 int i, mode = 0; 443 444 if (rdata->id != S5M8767_BUCK9) 445 return; 446 447 /* Check if opmode for regulator matches S5M8767_ENCTRL_USE_GPIO */ 448 for (i = 0; i < s5m8767->num_regulators; i++) { 449 const struct sec_opmode_data *opmode = &s5m8767->opmode[i]; 450 if (opmode->id == rdata->id) { 451 mode = s5m8767_opmode_reg[rdata->id][opmode->mode]; 452 break; 453 } 454 } 455 if (mode != S5M8767_ENCTRL_USE_GPIO) { 456 dev_warn(s5m8767->dev, 457 "ext-control for %s: mismatched op_mode (%x), ignoring\n", 458 rdata->reg_node->name, mode); 459 return; 460 } 461 462 if (!gpio_is_valid(rdata->ext_control_gpio)) { 463 dev_warn(s5m8767->dev, 464 "ext-control for %s: GPIO not valid, ignoring\n", 465 rdata->reg_node->name); 466 return; 467 } 468 469 config->ena_gpio = rdata->ext_control_gpio; 470 config->ena_gpio_flags = GPIOF_OUT_INIT_HIGH; 471 } 472 473 /* 474 * Turn on GPIO control over BUCK9. 475 */ 476 static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767, 477 struct regulator_dev *rdev) 478 { 479 int id = rdev_get_id(rdev); 480 int ret, reg, enable_ctrl; 481 482 if (id != S5M8767_BUCK9) 483 return -EINVAL; 484 485 ret = s5m8767_get_register(s5m8767, id, ®, &enable_ctrl); 486 if (ret) 487 return ret; 488 489 return regmap_update_bits(s5m8767->iodev->regmap_pmic, 490 reg, S5M8767_ENCTRL_MASK, 491 S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT); 492 } 493 494 495 #ifdef CONFIG_OF 496 static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev, 497 struct sec_platform_data *pdata, 498 struct device_node *pmic_np) 499 { 500 int i, gpio; 501 502 for (i = 0; i < 3; i++) { 503 gpio = of_get_named_gpio(pmic_np, 504 "s5m8767,pmic-buck-dvs-gpios", i); 505 if (!gpio_is_valid(gpio)) { 506 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio); 507 return -EINVAL; 508 } 509 pdata->buck_gpios[i] = gpio; 510 } 511 return 0; 512 } 513 514 static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev, 515 struct sec_platform_data *pdata, 516 struct device_node *pmic_np) 517 { 518 int i, gpio; 519 520 for (i = 0; i < 3; i++) { 521 gpio = of_get_named_gpio(pmic_np, 522 "s5m8767,pmic-buck-ds-gpios", i); 523 if (!gpio_is_valid(gpio)) { 524 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio); 525 return -EINVAL; 526 } 527 pdata->buck_ds[i] = gpio; 528 } 529 return 0; 530 } 531 532 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, 533 struct sec_platform_data *pdata) 534 { 535 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 536 struct device_node *pmic_np, *regulators_np, *reg_np; 537 struct sec_regulator_data *rdata; 538 struct sec_opmode_data *rmode; 539 unsigned int i, dvs_voltage_nr = 8, ret; 540 541 pmic_np = iodev->dev->of_node; 542 if (!pmic_np) { 543 dev_err(iodev->dev, "could not find pmic sub-node\n"); 544 return -ENODEV; 545 } 546 547 regulators_np = of_get_child_by_name(pmic_np, "regulators"); 548 if (!regulators_np) { 549 dev_err(iodev->dev, "could not find regulators sub-node\n"); 550 return -EINVAL; 551 } 552 553 /* count the number of regulators to be supported in pmic */ 554 pdata->num_regulators = of_get_child_count(regulators_np); 555 556 rdata = devm_kzalloc(&pdev->dev, sizeof(*rdata) * 557 pdata->num_regulators, GFP_KERNEL); 558 if (!rdata) 559 return -ENOMEM; 560 561 rmode = devm_kzalloc(&pdev->dev, sizeof(*rmode) * 562 pdata->num_regulators, GFP_KERNEL); 563 if (!rmode) 564 return -ENOMEM; 565 566 pdata->regulators = rdata; 567 pdata->opmode = rmode; 568 for_each_child_of_node(regulators_np, reg_np) { 569 for (i = 0; i < ARRAY_SIZE(regulators); i++) 570 if (!of_node_cmp(reg_np->name, regulators[i].name)) 571 break; 572 573 if (i == ARRAY_SIZE(regulators)) { 574 dev_warn(iodev->dev, 575 "don't know how to configure regulator %s\n", 576 reg_np->name); 577 continue; 578 } 579 580 rdata->ext_control_gpio = of_get_named_gpio(reg_np, 581 "s5m8767,pmic-ext-control-gpios", 0); 582 583 rdata->id = i; 584 rdata->initdata = of_get_regulator_init_data( 585 &pdev->dev, reg_np, 586 ®ulators[i]); 587 rdata->reg_node = reg_np; 588 rdata++; 589 rmode->id = i; 590 if (of_property_read_u32(reg_np, "op_mode", 591 &rmode->mode)) { 592 dev_warn(iodev->dev, 593 "no op_mode property property at %s\n", 594 reg_np->full_name); 595 596 rmode->mode = S5M8767_OPMODE_NORMAL_MODE; 597 } 598 rmode++; 599 } 600 601 of_node_put(regulators_np); 602 603 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL)) { 604 pdata->buck2_gpiodvs = true; 605 606 if (of_property_read_u32_array(pmic_np, 607 "s5m8767,pmic-buck2-dvs-voltage", 608 pdata->buck2_voltage, dvs_voltage_nr)) { 609 dev_err(iodev->dev, "buck2 voltages not specified\n"); 610 return -EINVAL; 611 } 612 } 613 614 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL)) { 615 pdata->buck3_gpiodvs = true; 616 617 if (of_property_read_u32_array(pmic_np, 618 "s5m8767,pmic-buck3-dvs-voltage", 619 pdata->buck3_voltage, dvs_voltage_nr)) { 620 dev_err(iodev->dev, "buck3 voltages not specified\n"); 621 return -EINVAL; 622 } 623 } 624 625 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL)) { 626 pdata->buck4_gpiodvs = true; 627 628 if (of_property_read_u32_array(pmic_np, 629 "s5m8767,pmic-buck4-dvs-voltage", 630 pdata->buck4_voltage, dvs_voltage_nr)) { 631 dev_err(iodev->dev, "buck4 voltages not specified\n"); 632 return -EINVAL; 633 } 634 } 635 636 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 637 pdata->buck4_gpiodvs) { 638 ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np); 639 if (ret) 640 return -EINVAL; 641 642 if (of_property_read_u32(pmic_np, 643 "s5m8767,pmic-buck-default-dvs-idx", 644 &pdata->buck_default_idx)) { 645 pdata->buck_default_idx = 0; 646 } else { 647 if (pdata->buck_default_idx >= 8) { 648 pdata->buck_default_idx = 0; 649 dev_info(iodev->dev, 650 "invalid value for default dvs index, use 0\n"); 651 } 652 } 653 } 654 655 ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np); 656 if (ret) 657 return -EINVAL; 658 659 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-ramp-enable", NULL)) 660 pdata->buck2_ramp_enable = true; 661 662 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-ramp-enable", NULL)) 663 pdata->buck3_ramp_enable = true; 664 665 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-ramp-enable", NULL)) 666 pdata->buck4_ramp_enable = true; 667 668 if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable 669 || pdata->buck4_ramp_enable) { 670 if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay", 671 &pdata->buck_ramp_delay)) 672 pdata->buck_ramp_delay = 0; 673 } 674 675 return 0; 676 } 677 #else 678 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, 679 struct sec_platform_data *pdata) 680 { 681 return 0; 682 } 683 #endif /* CONFIG_OF */ 684 685 static int s5m8767_pmic_probe(struct platform_device *pdev) 686 { 687 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 688 struct sec_platform_data *pdata = iodev->pdata; 689 struct regulator_config config = { }; 690 struct s5m8767_info *s5m8767; 691 int i, ret, buck_init; 692 693 if (!pdata) { 694 dev_err(pdev->dev.parent, "Platform data not supplied\n"); 695 return -ENODEV; 696 } 697 698 if (iodev->dev->of_node) { 699 ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata); 700 if (ret) 701 return ret; 702 } 703 704 if (pdata->buck2_gpiodvs) { 705 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) { 706 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 707 return -EINVAL; 708 } 709 } 710 711 if (pdata->buck3_gpiodvs) { 712 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) { 713 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 714 return -EINVAL; 715 } 716 } 717 718 if (pdata->buck4_gpiodvs) { 719 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) { 720 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 721 return -EINVAL; 722 } 723 } 724 725 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info), 726 GFP_KERNEL); 727 if (!s5m8767) 728 return -ENOMEM; 729 730 s5m8767->dev = &pdev->dev; 731 s5m8767->iodev = iodev; 732 s5m8767->num_regulators = pdata->num_regulators; 733 platform_set_drvdata(pdev, s5m8767); 734 735 s5m8767->buck_gpioindex = pdata->buck_default_idx; 736 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs; 737 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs; 738 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs; 739 s5m8767->buck_gpios[0] = pdata->buck_gpios[0]; 740 s5m8767->buck_gpios[1] = pdata->buck_gpios[1]; 741 s5m8767->buck_gpios[2] = pdata->buck_gpios[2]; 742 s5m8767->buck_ds[0] = pdata->buck_ds[0]; 743 s5m8767->buck_ds[1] = pdata->buck_ds[1]; 744 s5m8767->buck_ds[2] = pdata->buck_ds[2]; 745 746 s5m8767->ramp_delay = pdata->buck_ramp_delay; 747 s5m8767->buck2_ramp = pdata->buck2_ramp_enable; 748 s5m8767->buck3_ramp = pdata->buck3_ramp_enable; 749 s5m8767->buck4_ramp = pdata->buck4_ramp_enable; 750 s5m8767->opmode = pdata->opmode; 751 752 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 753 pdata->buck2_init); 754 755 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2, 756 buck_init); 757 758 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 759 pdata->buck3_init); 760 761 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2, 762 buck_init); 763 764 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 765 pdata->buck4_init); 766 767 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2, 768 buck_init); 769 770 for (i = 0; i < 8; i++) { 771 if (s5m8767->buck2_gpiodvs) { 772 s5m8767->buck2_vol[i] = 773 s5m8767_convert_voltage_to_sel( 774 &buck_voltage_val2, 775 pdata->buck2_voltage[i]); 776 } 777 778 if (s5m8767->buck3_gpiodvs) { 779 s5m8767->buck3_vol[i] = 780 s5m8767_convert_voltage_to_sel( 781 &buck_voltage_val2, 782 pdata->buck3_voltage[i]); 783 } 784 785 if (s5m8767->buck4_gpiodvs) { 786 s5m8767->buck4_vol[i] = 787 s5m8767_convert_voltage_to_sel( 788 &buck_voltage_val2, 789 pdata->buck4_voltage[i]); 790 } 791 } 792 793 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 794 pdata->buck4_gpiodvs) { 795 796 if (!gpio_is_valid(pdata->buck_gpios[0]) || 797 !gpio_is_valid(pdata->buck_gpios[1]) || 798 !gpio_is_valid(pdata->buck_gpios[2])) { 799 dev_err(&pdev->dev, "GPIO NOT VALID\n"); 800 return -EINVAL; 801 } 802 803 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0], 804 "S5M8767 SET1"); 805 if (ret) 806 return ret; 807 808 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1], 809 "S5M8767 SET2"); 810 if (ret) 811 return ret; 812 813 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2], 814 "S5M8767 SET3"); 815 if (ret) 816 return ret; 817 818 /* SET1 GPIO */ 819 gpio_direction_output(pdata->buck_gpios[0], 820 (s5m8767->buck_gpioindex >> 2) & 0x1); 821 /* SET2 GPIO */ 822 gpio_direction_output(pdata->buck_gpios[1], 823 (s5m8767->buck_gpioindex >> 1) & 0x1); 824 /* SET3 GPIO */ 825 gpio_direction_output(pdata->buck_gpios[2], 826 (s5m8767->buck_gpioindex >> 0) & 0x1); 827 } 828 829 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2"); 830 if (ret) 831 return ret; 832 833 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3"); 834 if (ret) 835 return ret; 836 837 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4"); 838 if (ret) 839 return ret; 840 841 /* DS2 GPIO */ 842 gpio_direction_output(pdata->buck_ds[0], 0x0); 843 /* DS3 GPIO */ 844 gpio_direction_output(pdata->buck_ds[1], 0x0); 845 /* DS4 GPIO */ 846 gpio_direction_output(pdata->buck_ds[2], 0x0); 847 848 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 849 pdata->buck4_gpiodvs) { 850 regmap_update_bits(s5m8767->iodev->regmap_pmic, 851 S5M8767_REG_BUCK2CTRL, 1 << 1, 852 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1)); 853 regmap_update_bits(s5m8767->iodev->regmap_pmic, 854 S5M8767_REG_BUCK3CTRL, 1 << 1, 855 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1)); 856 regmap_update_bits(s5m8767->iodev->regmap_pmic, 857 S5M8767_REG_BUCK4CTRL, 1 << 1, 858 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1)); 859 } 860 861 /* Initialize GPIO DVS registers */ 862 for (i = 0; i < 8; i++) { 863 if (s5m8767->buck2_gpiodvs) { 864 regmap_write(s5m8767->iodev->regmap_pmic, 865 S5M8767_REG_BUCK2DVS1 + i, 866 s5m8767->buck2_vol[i]); 867 } 868 869 if (s5m8767->buck3_gpiodvs) { 870 regmap_write(s5m8767->iodev->regmap_pmic, 871 S5M8767_REG_BUCK3DVS1 + i, 872 s5m8767->buck3_vol[i]); 873 } 874 875 if (s5m8767->buck4_gpiodvs) { 876 regmap_write(s5m8767->iodev->regmap_pmic, 877 S5M8767_REG_BUCK4DVS1 + i, 878 s5m8767->buck4_vol[i]); 879 } 880 } 881 882 if (s5m8767->buck2_ramp) 883 regmap_update_bits(s5m8767->iodev->regmap_pmic, 884 S5M8767_REG_DVSRAMP, 0x08, 0x08); 885 886 if (s5m8767->buck3_ramp) 887 regmap_update_bits(s5m8767->iodev->regmap_pmic, 888 S5M8767_REG_DVSRAMP, 0x04, 0x04); 889 890 if (s5m8767->buck4_ramp) 891 regmap_update_bits(s5m8767->iodev->regmap_pmic, 892 S5M8767_REG_DVSRAMP, 0x02, 0x02); 893 894 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp 895 || s5m8767->buck4_ramp) { 896 unsigned int val; 897 switch (s5m8767->ramp_delay) { 898 case 5: 899 val = S5M8767_DVS_BUCK_RAMP_5; 900 break; 901 case 10: 902 val = S5M8767_DVS_BUCK_RAMP_10; 903 break; 904 case 25: 905 val = S5M8767_DVS_BUCK_RAMP_25; 906 break; 907 case 50: 908 val = S5M8767_DVS_BUCK_RAMP_50; 909 break; 910 case 100: 911 val = S5M8767_DVS_BUCK_RAMP_100; 912 break; 913 default: 914 val = S5M8767_DVS_BUCK_RAMP_10; 915 } 916 regmap_update_bits(s5m8767->iodev->regmap_pmic, 917 S5M8767_REG_DVSRAMP, 918 S5M8767_DVS_BUCK_RAMP_MASK, 919 val << S5M8767_DVS_BUCK_RAMP_SHIFT); 920 } 921 922 for (i = 0; i < pdata->num_regulators; i++) { 923 const struct sec_voltage_desc *desc; 924 int id = pdata->regulators[i].id; 925 int enable_reg, enable_val; 926 struct regulator_dev *rdev; 927 928 desc = reg_voltage_map[id]; 929 if (desc) { 930 regulators[id].n_voltages = 931 (desc->max - desc->min) / desc->step + 1; 932 regulators[id].min_uV = desc->min; 933 regulators[id].uV_step = desc->step; 934 regulators[id].vsel_reg = 935 s5m8767_get_vsel_reg(id, s5m8767); 936 if (id < S5M8767_BUCK1) 937 regulators[id].vsel_mask = 0x3f; 938 else 939 regulators[id].vsel_mask = 0xff; 940 941 ret = s5m8767_get_register(s5m8767, id, &enable_reg, 942 &enable_val); 943 if (ret) { 944 dev_err(s5m8767->dev, "error reading registers\n"); 945 return ret; 946 } 947 regulators[id].enable_reg = enable_reg; 948 regulators[id].enable_mask = S5M8767_ENCTRL_MASK; 949 regulators[id].enable_val = enable_val; 950 } 951 952 config.dev = s5m8767->dev; 953 config.init_data = pdata->regulators[i].initdata; 954 config.driver_data = s5m8767; 955 config.regmap = iodev->regmap_pmic; 956 config.of_node = pdata->regulators[i].reg_node; 957 config.ena_gpio = -EINVAL; 958 config.ena_gpio_flags = 0; 959 config.ena_gpio_initialized = true; 960 if (gpio_is_valid(pdata->regulators[i].ext_control_gpio)) 961 s5m8767_regulator_config_ext_control(s5m8767, 962 &pdata->regulators[i], &config); 963 964 rdev = devm_regulator_register(&pdev->dev, ®ulators[id], 965 &config); 966 if (IS_ERR(rdev)) { 967 ret = PTR_ERR(rdev); 968 dev_err(s5m8767->dev, "regulator init failed for %d\n", 969 id); 970 return ret; 971 } 972 973 if (gpio_is_valid(pdata->regulators[i].ext_control_gpio)) { 974 ret = s5m8767_enable_ext_control(s5m8767, rdev); 975 if (ret < 0) { 976 dev_err(s5m8767->dev, 977 "failed to enable gpio control over %s: %d\n", 978 rdev->desc->name, ret); 979 return ret; 980 } 981 } 982 } 983 984 return 0; 985 } 986 987 static const struct platform_device_id s5m8767_pmic_id[] = { 988 { "s5m8767-pmic", 0}, 989 { }, 990 }; 991 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id); 992 993 static struct platform_driver s5m8767_pmic_driver = { 994 .driver = { 995 .name = "s5m8767-pmic", 996 }, 997 .probe = s5m8767_pmic_probe, 998 .id_table = s5m8767_pmic_id, 999 }; 1000 1001 static int __init s5m8767_pmic_init(void) 1002 { 1003 return platform_driver_register(&s5m8767_pmic_driver); 1004 } 1005 subsys_initcall(s5m8767_pmic_init); 1006 1007 static void __exit s5m8767_pmic_exit(void) 1008 { 1009 platform_driver_unregister(&s5m8767_pmic_driver); 1010 } 1011 module_exit(s5m8767_pmic_exit); 1012 1013 /* Module information */ 1014 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); 1015 MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver"); 1016 MODULE_LICENSE("GPL"); 1017