xref: /openbmc/linux/drivers/regulator/s5m8767.c (revision d623f60d)
1 /*
2  * s5m8767.c
3  *
4  * Copyright (c) 2011 Samsung Electronics Co., Ltd
5  *              http://www.samsung.com
6  *
7  *  This program is free software; you can redistribute  it and/or modify it
8  *  under  the terms of  the GNU General  Public License as published by the
9  *  Free Software Foundation;  either version 2 of the  License, or (at your
10  *  option) any later version.
11  *
12  */
13 
14 #include <linux/err.h>
15 #include <linux/of_gpio.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/module.h>
18 #include <linux/platform_device.h>
19 #include <linux/regulator/driver.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/mfd/samsung/core.h>
22 #include <linux/mfd/samsung/s5m8767.h>
23 #include <linux/regulator/of_regulator.h>
24 #include <linux/regmap.h>
25 
26 #define S5M8767_OPMODE_NORMAL_MODE 0x1
27 
28 struct s5m8767_info {
29 	struct device *dev;
30 	struct sec_pmic_dev *iodev;
31 	int num_regulators;
32 	struct sec_opmode_data *opmode;
33 
34 	int ramp_delay;
35 	bool buck2_ramp;
36 	bool buck3_ramp;
37 	bool buck4_ramp;
38 
39 	bool buck2_gpiodvs;
40 	bool buck3_gpiodvs;
41 	bool buck4_gpiodvs;
42 	u8 buck2_vol[8];
43 	u8 buck3_vol[8];
44 	u8 buck4_vol[8];
45 	int buck_gpios[3];
46 	int buck_ds[3];
47 	int buck_gpioindex;
48 };
49 
50 struct sec_voltage_desc {
51 	int max;
52 	int min;
53 	int step;
54 };
55 
56 static const struct sec_voltage_desc buck_voltage_val1 = {
57 	.max = 2225000,
58 	.min =  650000,
59 	.step =   6250,
60 };
61 
62 static const struct sec_voltage_desc buck_voltage_val2 = {
63 	.max = 1600000,
64 	.min =  600000,
65 	.step =   6250,
66 };
67 
68 static const struct sec_voltage_desc buck_voltage_val3 = {
69 	.max = 3000000,
70 	.min =  750000,
71 	.step =  12500,
72 };
73 
74 static const struct sec_voltage_desc ldo_voltage_val1 = {
75 	.max = 3950000,
76 	.min =  800000,
77 	.step =  50000,
78 };
79 
80 static const struct sec_voltage_desc ldo_voltage_val2 = {
81 	.max = 2375000,
82 	.min =  800000,
83 	.step =  25000,
84 };
85 
86 static const struct sec_voltage_desc *reg_voltage_map[] = {
87 	[S5M8767_LDO1] = &ldo_voltage_val2,
88 	[S5M8767_LDO2] = &ldo_voltage_val2,
89 	[S5M8767_LDO3] = &ldo_voltage_val1,
90 	[S5M8767_LDO4] = &ldo_voltage_val1,
91 	[S5M8767_LDO5] = &ldo_voltage_val1,
92 	[S5M8767_LDO6] = &ldo_voltage_val2,
93 	[S5M8767_LDO7] = &ldo_voltage_val2,
94 	[S5M8767_LDO8] = &ldo_voltage_val2,
95 	[S5M8767_LDO9] = &ldo_voltage_val1,
96 	[S5M8767_LDO10] = &ldo_voltage_val1,
97 	[S5M8767_LDO11] = &ldo_voltage_val1,
98 	[S5M8767_LDO12] = &ldo_voltage_val1,
99 	[S5M8767_LDO13] = &ldo_voltage_val1,
100 	[S5M8767_LDO14] = &ldo_voltage_val1,
101 	[S5M8767_LDO15] = &ldo_voltage_val2,
102 	[S5M8767_LDO16] = &ldo_voltage_val1,
103 	[S5M8767_LDO17] = &ldo_voltage_val1,
104 	[S5M8767_LDO18] = &ldo_voltage_val1,
105 	[S5M8767_LDO19] = &ldo_voltage_val1,
106 	[S5M8767_LDO20] = &ldo_voltage_val1,
107 	[S5M8767_LDO21] = &ldo_voltage_val1,
108 	[S5M8767_LDO22] = &ldo_voltage_val1,
109 	[S5M8767_LDO23] = &ldo_voltage_val1,
110 	[S5M8767_LDO24] = &ldo_voltage_val1,
111 	[S5M8767_LDO25] = &ldo_voltage_val1,
112 	[S5M8767_LDO26] = &ldo_voltage_val1,
113 	[S5M8767_LDO27] = &ldo_voltage_val1,
114 	[S5M8767_LDO28] = &ldo_voltage_val1,
115 	[S5M8767_BUCK1] = &buck_voltage_val1,
116 	[S5M8767_BUCK2] = &buck_voltage_val2,
117 	[S5M8767_BUCK3] = &buck_voltage_val2,
118 	[S5M8767_BUCK4] = &buck_voltage_val2,
119 	[S5M8767_BUCK5] = &buck_voltage_val1,
120 	[S5M8767_BUCK6] = &buck_voltage_val1,
121 	[S5M8767_BUCK7] = &buck_voltage_val3,
122 	[S5M8767_BUCK8] = &buck_voltage_val3,
123 	[S5M8767_BUCK9] = &buck_voltage_val3,
124 };
125 
126 static unsigned int s5m8767_opmode_reg[][4] = {
127 	/* {OFF, ON, LOWPOWER, SUSPEND} */
128 	/* LDO1 ... LDO28 */
129 	{0x0, 0x3, 0x2, 0x1}, /* LDO1 */
130 	{0x0, 0x3, 0x2, 0x1},
131 	{0x0, 0x3, 0x2, 0x1},
132 	{0x0, 0x0, 0x0, 0x0},
133 	{0x0, 0x3, 0x2, 0x1}, /* LDO5 */
134 	{0x0, 0x3, 0x2, 0x1},
135 	{0x0, 0x3, 0x2, 0x1},
136 	{0x0, 0x3, 0x2, 0x1},
137 	{0x0, 0x3, 0x2, 0x1},
138 	{0x0, 0x3, 0x2, 0x1}, /* LDO10 */
139 	{0x0, 0x3, 0x2, 0x1},
140 	{0x0, 0x3, 0x2, 0x1},
141 	{0x0, 0x3, 0x2, 0x1},
142 	{0x0, 0x3, 0x2, 0x1},
143 	{0x0, 0x3, 0x2, 0x1}, /* LDO15 */
144 	{0x0, 0x3, 0x2, 0x1},
145 	{0x0, 0x3, 0x2, 0x1},
146 	{0x0, 0x0, 0x0, 0x0},
147 	{0x0, 0x3, 0x2, 0x1},
148 	{0x0, 0x3, 0x2, 0x1}, /* LDO20 */
149 	{0x0, 0x3, 0x2, 0x1},
150 	{0x0, 0x3, 0x2, 0x1},
151 	{0x0, 0x0, 0x0, 0x0},
152 	{0x0, 0x3, 0x2, 0x1},
153 	{0x0, 0x3, 0x2, 0x1}, /* LDO25 */
154 	{0x0, 0x3, 0x2, 0x1},
155 	{0x0, 0x3, 0x2, 0x1},
156 	{0x0, 0x3, 0x2, 0x1}, /* LDO28 */
157 
158 	/* BUCK1 ... BUCK9 */
159 	{0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
160 	{0x0, 0x3, 0x1, 0x1},
161 	{0x0, 0x3, 0x1, 0x1},
162 	{0x0, 0x3, 0x1, 0x1},
163 	{0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
164 	{0x0, 0x3, 0x1, 0x1},
165 	{0x0, 0x3, 0x1, 0x1},
166 	{0x0, 0x3, 0x1, 0x1},
167 	{0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
168 };
169 
170 static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id,
171 				int *reg, int *enable_ctrl)
172 {
173 	int i;
174 	unsigned int mode;
175 
176 	switch (reg_id) {
177 	case S5M8767_LDO1 ... S5M8767_LDO2:
178 		*reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
179 		break;
180 	case S5M8767_LDO3 ... S5M8767_LDO28:
181 		*reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
182 		break;
183 	case S5M8767_BUCK1:
184 		*reg = S5M8767_REG_BUCK1CTRL1;
185 		break;
186 	case S5M8767_BUCK2 ... S5M8767_BUCK4:
187 		*reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
188 		break;
189 	case S5M8767_BUCK5:
190 		*reg = S5M8767_REG_BUCK5CTRL1;
191 		break;
192 	case S5M8767_BUCK6 ... S5M8767_BUCK9:
193 		*reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
194 		break;
195 	default:
196 		return -EINVAL;
197 	}
198 
199 	for (i = 0; i < s5m8767->num_regulators; i++) {
200 		if (s5m8767->opmode[i].id == reg_id) {
201 			mode = s5m8767->opmode[i].mode;
202 			break;
203 		}
204 	}
205 
206 	if (i >= s5m8767->num_regulators)
207 		return -EINVAL;
208 
209 	*enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
210 
211 	return 0;
212 }
213 
214 static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
215 {
216 	int reg;
217 
218 	switch (reg_id) {
219 	case S5M8767_LDO1 ... S5M8767_LDO2:
220 		reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
221 		break;
222 	case S5M8767_LDO3 ... S5M8767_LDO28:
223 		reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
224 		break;
225 	case S5M8767_BUCK1:
226 		reg = S5M8767_REG_BUCK1CTRL2;
227 		break;
228 	case S5M8767_BUCK2:
229 		reg = S5M8767_REG_BUCK2DVS1;
230 		if (s5m8767->buck2_gpiodvs)
231 			reg += s5m8767->buck_gpioindex;
232 		break;
233 	case S5M8767_BUCK3:
234 		reg = S5M8767_REG_BUCK3DVS1;
235 		if (s5m8767->buck3_gpiodvs)
236 			reg += s5m8767->buck_gpioindex;
237 		break;
238 	case S5M8767_BUCK4:
239 		reg = S5M8767_REG_BUCK4DVS1;
240 		if (s5m8767->buck4_gpiodvs)
241 			reg += s5m8767->buck_gpioindex;
242 		break;
243 	case S5M8767_BUCK5:
244 		reg = S5M8767_REG_BUCK5CTRL2;
245 		break;
246 	case S5M8767_BUCK6 ... S5M8767_BUCK9:
247 		reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
248 		break;
249 	default:
250 		return -EINVAL;
251 	}
252 
253 	return reg;
254 }
255 
256 static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
257 					  int min_vol)
258 {
259 	int selector = 0;
260 
261 	if (desc == NULL)
262 		return -EINVAL;
263 
264 	if (min_vol > desc->max)
265 		return -EINVAL;
266 
267 	if (min_vol < desc->min)
268 		min_vol = desc->min;
269 
270 	selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
271 
272 	if (desc->min + desc->step * selector > desc->max)
273 		return -EINVAL;
274 
275 	return selector;
276 }
277 
278 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
279 {
280 	int temp_index = s5m8767->buck_gpioindex;
281 
282 	gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
283 	gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
284 	gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
285 
286 	return 0;
287 }
288 
289 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
290 {
291 	int temp_index = s5m8767->buck_gpioindex;
292 
293 	gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
294 	gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
295 	gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
296 
297 	return 0;
298 }
299 
300 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
301 				   unsigned selector)
302 {
303 	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
304 	int reg_id = rdev_get_id(rdev);
305 	int old_index, index = 0;
306 	u8 *buck234_vol = NULL;
307 
308 	switch (reg_id) {
309 	case S5M8767_LDO1 ... S5M8767_LDO28:
310 		break;
311 	case S5M8767_BUCK1 ... S5M8767_BUCK6:
312 		if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
313 			buck234_vol = &s5m8767->buck2_vol[0];
314 		else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
315 			buck234_vol = &s5m8767->buck3_vol[0];
316 		else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
317 			buck234_vol = &s5m8767->buck4_vol[0];
318 		break;
319 	case S5M8767_BUCK7 ... S5M8767_BUCK8:
320 		return -EINVAL;
321 	case S5M8767_BUCK9:
322 		break;
323 	default:
324 		return -EINVAL;
325 	}
326 
327 	/* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
328 	if (buck234_vol) {
329 		while (*buck234_vol != selector) {
330 			buck234_vol++;
331 			index++;
332 		}
333 		old_index = s5m8767->buck_gpioindex;
334 		s5m8767->buck_gpioindex = index;
335 
336 		if (index > old_index)
337 			return s5m8767_set_high(s5m8767);
338 		else
339 			return s5m8767_set_low(s5m8767);
340 	} else {
341 		return regulator_set_voltage_sel_regmap(rdev, selector);
342 	}
343 }
344 
345 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
346 					     unsigned int old_sel,
347 					     unsigned int new_sel)
348 {
349 	struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
350 	const struct sec_voltage_desc *desc;
351 	int reg_id = rdev_get_id(rdev);
352 
353 	desc = reg_voltage_map[reg_id];
354 
355 	if ((old_sel < new_sel) && s5m8767->ramp_delay)
356 		return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
357 					s5m8767->ramp_delay * 1000);
358 	return 0;
359 }
360 
361 static const struct regulator_ops s5m8767_ops = {
362 	.list_voltage		= regulator_list_voltage_linear,
363 	.is_enabled		= regulator_is_enabled_regmap,
364 	.enable			= regulator_enable_regmap,
365 	.disable		= regulator_disable_regmap,
366 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
367 	.set_voltage_sel	= s5m8767_set_voltage_sel,
368 	.set_voltage_time_sel	= s5m8767_set_voltage_time_sel,
369 };
370 
371 static const struct regulator_ops s5m8767_buck78_ops = {
372 	.list_voltage		= regulator_list_voltage_linear,
373 	.is_enabled		= regulator_is_enabled_regmap,
374 	.enable			= regulator_enable_regmap,
375 	.disable		= regulator_disable_regmap,
376 	.get_voltage_sel	= regulator_get_voltage_sel_regmap,
377 	.set_voltage_sel	= regulator_set_voltage_sel_regmap,
378 };
379 
380 #define s5m8767_regulator_desc(_name) {		\
381 	.name		= #_name,		\
382 	.id		= S5M8767_##_name,	\
383 	.ops		= &s5m8767_ops,		\
384 	.type		= REGULATOR_VOLTAGE,	\
385 	.owner		= THIS_MODULE,		\
386 }
387 
388 #define s5m8767_regulator_buck78_desc(_name) {	\
389 	.name		= #_name,		\
390 	.id		= S5M8767_##_name,	\
391 	.ops		= &s5m8767_buck78_ops,	\
392 	.type		= REGULATOR_VOLTAGE,	\
393 	.owner		= THIS_MODULE,		\
394 }
395 
396 static struct regulator_desc regulators[] = {
397 	s5m8767_regulator_desc(LDO1),
398 	s5m8767_regulator_desc(LDO2),
399 	s5m8767_regulator_desc(LDO3),
400 	s5m8767_regulator_desc(LDO4),
401 	s5m8767_regulator_desc(LDO5),
402 	s5m8767_regulator_desc(LDO6),
403 	s5m8767_regulator_desc(LDO7),
404 	s5m8767_regulator_desc(LDO8),
405 	s5m8767_regulator_desc(LDO9),
406 	s5m8767_regulator_desc(LDO10),
407 	s5m8767_regulator_desc(LDO11),
408 	s5m8767_regulator_desc(LDO12),
409 	s5m8767_regulator_desc(LDO13),
410 	s5m8767_regulator_desc(LDO14),
411 	s5m8767_regulator_desc(LDO15),
412 	s5m8767_regulator_desc(LDO16),
413 	s5m8767_regulator_desc(LDO17),
414 	s5m8767_regulator_desc(LDO18),
415 	s5m8767_regulator_desc(LDO19),
416 	s5m8767_regulator_desc(LDO20),
417 	s5m8767_regulator_desc(LDO21),
418 	s5m8767_regulator_desc(LDO22),
419 	s5m8767_regulator_desc(LDO23),
420 	s5m8767_regulator_desc(LDO24),
421 	s5m8767_regulator_desc(LDO25),
422 	s5m8767_regulator_desc(LDO26),
423 	s5m8767_regulator_desc(LDO27),
424 	s5m8767_regulator_desc(LDO28),
425 	s5m8767_regulator_desc(BUCK1),
426 	s5m8767_regulator_desc(BUCK2),
427 	s5m8767_regulator_desc(BUCK3),
428 	s5m8767_regulator_desc(BUCK4),
429 	s5m8767_regulator_desc(BUCK5),
430 	s5m8767_regulator_desc(BUCK6),
431 	s5m8767_regulator_buck78_desc(BUCK7),
432 	s5m8767_regulator_buck78_desc(BUCK8),
433 	s5m8767_regulator_desc(BUCK9),
434 };
435 
436 /*
437  * Enable GPIO control over BUCK9 in regulator_config for that regulator.
438  */
439 static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767,
440 		struct sec_regulator_data *rdata,
441 		struct regulator_config *config)
442 {
443 	int i, mode = 0;
444 
445 	if (rdata->id != S5M8767_BUCK9)
446 		return;
447 
448 	/* Check if opmode for regulator matches S5M8767_ENCTRL_USE_GPIO */
449 	for (i = 0; i < s5m8767->num_regulators; i++) {
450 		const struct sec_opmode_data *opmode = &s5m8767->opmode[i];
451 		if (opmode->id == rdata->id) {
452 			mode = s5m8767_opmode_reg[rdata->id][opmode->mode];
453 			break;
454 		}
455 	}
456 	if (mode != S5M8767_ENCTRL_USE_GPIO) {
457 		dev_warn(s5m8767->dev,
458 				"ext-control for %s: mismatched op_mode (%x), ignoring\n",
459 				rdata->reg_node->name, mode);
460 		return;
461 	}
462 
463 	if (!rdata->ext_control_gpiod) {
464 		dev_warn(s5m8767->dev,
465 				"ext-control for %s: GPIO not valid, ignoring\n",
466 			 rdata->reg_node->name);
467 		return;
468 	}
469 
470 	config->ena_gpiod = rdata->ext_control_gpiod;
471 }
472 
473 /*
474  * Turn on GPIO control over BUCK9.
475  */
476 static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767,
477 		struct regulator_dev *rdev)
478 {
479 	int id = rdev_get_id(rdev);
480 	int ret, reg, enable_ctrl;
481 
482 	if (id != S5M8767_BUCK9)
483 		return -EINVAL;
484 
485 	ret = s5m8767_get_register(s5m8767, id, &reg, &enable_ctrl);
486 	if (ret)
487 		return ret;
488 
489 	return regmap_update_bits(s5m8767->iodev->regmap_pmic,
490 			reg, S5M8767_ENCTRL_MASK,
491 			S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT);
492 }
493 
494 
495 #ifdef CONFIG_OF
496 static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev,
497 			struct sec_platform_data *pdata,
498 			struct device_node *pmic_np)
499 {
500 	int i, gpio;
501 
502 	for (i = 0; i < 3; i++) {
503 		gpio = of_get_named_gpio(pmic_np,
504 					"s5m8767,pmic-buck-dvs-gpios", i);
505 		if (!gpio_is_valid(gpio)) {
506 			dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
507 			return -EINVAL;
508 		}
509 		pdata->buck_gpios[i] = gpio;
510 	}
511 	return 0;
512 }
513 
514 static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev,
515 			struct sec_platform_data *pdata,
516 			struct device_node *pmic_np)
517 {
518 	int i, gpio;
519 
520 	for (i = 0; i < 3; i++) {
521 		gpio = of_get_named_gpio(pmic_np,
522 					"s5m8767,pmic-buck-ds-gpios", i);
523 		if (!gpio_is_valid(gpio)) {
524 			dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio);
525 			return -EINVAL;
526 		}
527 		pdata->buck_ds[i] = gpio;
528 	}
529 	return 0;
530 }
531 
532 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
533 					struct sec_platform_data *pdata)
534 {
535 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
536 	struct device_node *pmic_np, *regulators_np, *reg_np;
537 	struct sec_regulator_data *rdata;
538 	struct sec_opmode_data *rmode;
539 	unsigned int i, dvs_voltage_nr = 8, ret;
540 
541 	pmic_np = iodev->dev->of_node;
542 	if (!pmic_np) {
543 		dev_err(iodev->dev, "could not find pmic sub-node\n");
544 		return -ENODEV;
545 	}
546 
547 	regulators_np = of_get_child_by_name(pmic_np, "regulators");
548 	if (!regulators_np) {
549 		dev_err(iodev->dev, "could not find regulators sub-node\n");
550 		return -EINVAL;
551 	}
552 
553 	/* count the number of regulators to be supported in pmic */
554 	pdata->num_regulators = of_get_child_count(regulators_np);
555 
556 	rdata = devm_kcalloc(&pdev->dev,
557 			     pdata->num_regulators, sizeof(*rdata),
558 			     GFP_KERNEL);
559 	if (!rdata)
560 		return -ENOMEM;
561 
562 	rmode = devm_kcalloc(&pdev->dev,
563 			     pdata->num_regulators, sizeof(*rmode),
564 			     GFP_KERNEL);
565 	if (!rmode)
566 		return -ENOMEM;
567 
568 	pdata->regulators = rdata;
569 	pdata->opmode = rmode;
570 	for_each_child_of_node(regulators_np, reg_np) {
571 		for (i = 0; i < ARRAY_SIZE(regulators); i++)
572 			if (!of_node_cmp(reg_np->name, regulators[i].name))
573 				break;
574 
575 		if (i == ARRAY_SIZE(regulators)) {
576 			dev_warn(iodev->dev,
577 			"don't know how to configure regulator %s\n",
578 			reg_np->name);
579 			continue;
580 		}
581 
582 		rdata->ext_control_gpiod = devm_gpiod_get_from_of_node(&pdev->dev,
583 								       reg_np,
584 								       "s5m8767,pmic-ext-control-gpios",
585 								       0,
586 								       GPIOD_OUT_HIGH,
587 								       "s5m8767");
588 		if (IS_ERR(rdata->ext_control_gpiod))
589 			return PTR_ERR(rdata->ext_control_gpiod);
590 
591 		rdata->id = i;
592 		rdata->initdata = of_get_regulator_init_data(
593 						&pdev->dev, reg_np,
594 						&regulators[i]);
595 		rdata->reg_node = reg_np;
596 		rdata++;
597 		rmode->id = i;
598 		if (of_property_read_u32(reg_np, "op_mode",
599 				&rmode->mode)) {
600 			dev_warn(iodev->dev,
601 				"no op_mode property property at %pOF\n",
602 				reg_np);
603 
604 			rmode->mode = S5M8767_OPMODE_NORMAL_MODE;
605 		}
606 		rmode++;
607 	}
608 
609 	of_node_put(regulators_np);
610 
611 	if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL)) {
612 		pdata->buck2_gpiodvs = true;
613 
614 		if (of_property_read_u32_array(pmic_np,
615 				"s5m8767,pmic-buck2-dvs-voltage",
616 				pdata->buck2_voltage, dvs_voltage_nr)) {
617 			dev_err(iodev->dev, "buck2 voltages not specified\n");
618 			return -EINVAL;
619 		}
620 	}
621 
622 	if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL)) {
623 		pdata->buck3_gpiodvs = true;
624 
625 		if (of_property_read_u32_array(pmic_np,
626 				"s5m8767,pmic-buck3-dvs-voltage",
627 				pdata->buck3_voltage, dvs_voltage_nr)) {
628 			dev_err(iodev->dev, "buck3 voltages not specified\n");
629 			return -EINVAL;
630 		}
631 	}
632 
633 	if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL)) {
634 		pdata->buck4_gpiodvs = true;
635 
636 		if (of_property_read_u32_array(pmic_np,
637 				"s5m8767,pmic-buck4-dvs-voltage",
638 				pdata->buck4_voltage, dvs_voltage_nr)) {
639 			dev_err(iodev->dev, "buck4 voltages not specified\n");
640 			return -EINVAL;
641 		}
642 	}
643 
644 	if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
645 						pdata->buck4_gpiodvs) {
646 		ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np);
647 		if (ret)
648 			return -EINVAL;
649 
650 		if (of_property_read_u32(pmic_np,
651 				"s5m8767,pmic-buck-default-dvs-idx",
652 				&pdata->buck_default_idx)) {
653 			pdata->buck_default_idx = 0;
654 		} else {
655 			if (pdata->buck_default_idx >= 8) {
656 				pdata->buck_default_idx = 0;
657 				dev_info(iodev->dev,
658 				"invalid value for default dvs index, use 0\n");
659 			}
660 		}
661 	}
662 
663 	ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np);
664 	if (ret)
665 		return -EINVAL;
666 
667 	if (of_get_property(pmic_np, "s5m8767,pmic-buck2-ramp-enable", NULL))
668 		pdata->buck2_ramp_enable = true;
669 
670 	if (of_get_property(pmic_np, "s5m8767,pmic-buck3-ramp-enable", NULL))
671 		pdata->buck3_ramp_enable = true;
672 
673 	if (of_get_property(pmic_np, "s5m8767,pmic-buck4-ramp-enable", NULL))
674 		pdata->buck4_ramp_enable = true;
675 
676 	if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable
677 			|| pdata->buck4_ramp_enable) {
678 		if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay",
679 				&pdata->buck_ramp_delay))
680 			pdata->buck_ramp_delay = 0;
681 	}
682 
683 	return 0;
684 }
685 #else
686 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev,
687 					struct sec_platform_data *pdata)
688 {
689 	return 0;
690 }
691 #endif /* CONFIG_OF */
692 
693 static int s5m8767_pmic_probe(struct platform_device *pdev)
694 {
695 	struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
696 	struct sec_platform_data *pdata = iodev->pdata;
697 	struct regulator_config config = { };
698 	struct s5m8767_info *s5m8767;
699 	int i, ret, buck_init;
700 
701 	if (!pdata) {
702 		dev_err(pdev->dev.parent, "Platform data not supplied\n");
703 		return -ENODEV;
704 	}
705 
706 	if (iodev->dev->of_node) {
707 		ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata);
708 		if (ret)
709 			return ret;
710 	}
711 
712 	if (pdata->buck2_gpiodvs) {
713 		if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
714 			dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
715 			return -EINVAL;
716 		}
717 	}
718 
719 	if (pdata->buck3_gpiodvs) {
720 		if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
721 			dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
722 			return -EINVAL;
723 		}
724 	}
725 
726 	if (pdata->buck4_gpiodvs) {
727 		if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
728 			dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
729 			return -EINVAL;
730 		}
731 	}
732 
733 	s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
734 				GFP_KERNEL);
735 	if (!s5m8767)
736 		return -ENOMEM;
737 
738 	s5m8767->dev = &pdev->dev;
739 	s5m8767->iodev = iodev;
740 	s5m8767->num_regulators = pdata->num_regulators;
741 	platform_set_drvdata(pdev, s5m8767);
742 
743 	s5m8767->buck_gpioindex = pdata->buck_default_idx;
744 	s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
745 	s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
746 	s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
747 	s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
748 	s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
749 	s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
750 	s5m8767->buck_ds[0] = pdata->buck_ds[0];
751 	s5m8767->buck_ds[1] = pdata->buck_ds[1];
752 	s5m8767->buck_ds[2] = pdata->buck_ds[2];
753 
754 	s5m8767->ramp_delay = pdata->buck_ramp_delay;
755 	s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
756 	s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
757 	s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
758 	s5m8767->opmode = pdata->opmode;
759 
760 	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
761 						   pdata->buck2_init);
762 
763 	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
764 			buck_init);
765 
766 	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
767 						   pdata->buck3_init);
768 
769 	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
770 			buck_init);
771 
772 	buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
773 						   pdata->buck4_init);
774 
775 	regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
776 			buck_init);
777 
778 	for (i = 0; i < 8; i++) {
779 		if (s5m8767->buck2_gpiodvs) {
780 			s5m8767->buck2_vol[i] =
781 				s5m8767_convert_voltage_to_sel(
782 						&buck_voltage_val2,
783 						pdata->buck2_voltage[i]);
784 		}
785 
786 		if (s5m8767->buck3_gpiodvs) {
787 			s5m8767->buck3_vol[i] =
788 				s5m8767_convert_voltage_to_sel(
789 						&buck_voltage_val2,
790 						pdata->buck3_voltage[i]);
791 		}
792 
793 		if (s5m8767->buck4_gpiodvs) {
794 			s5m8767->buck4_vol[i] =
795 				s5m8767_convert_voltage_to_sel(
796 						&buck_voltage_val2,
797 						pdata->buck4_voltage[i]);
798 		}
799 	}
800 
801 	if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
802 						pdata->buck4_gpiodvs) {
803 
804 		if (!gpio_is_valid(pdata->buck_gpios[0]) ||
805 			!gpio_is_valid(pdata->buck_gpios[1]) ||
806 			!gpio_is_valid(pdata->buck_gpios[2])) {
807 			dev_err(&pdev->dev, "GPIO NOT VALID\n");
808 			return -EINVAL;
809 		}
810 
811 		ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
812 					"S5M8767 SET1");
813 		if (ret)
814 			return ret;
815 
816 		ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
817 					"S5M8767 SET2");
818 		if (ret)
819 			return ret;
820 
821 		ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
822 					"S5M8767 SET3");
823 		if (ret)
824 			return ret;
825 
826 		/* SET1 GPIO */
827 		gpio_direction_output(pdata->buck_gpios[0],
828 				(s5m8767->buck_gpioindex >> 2) & 0x1);
829 		/* SET2 GPIO */
830 		gpio_direction_output(pdata->buck_gpios[1],
831 				(s5m8767->buck_gpioindex >> 1) & 0x1);
832 		/* SET3 GPIO */
833 		gpio_direction_output(pdata->buck_gpios[2],
834 				(s5m8767->buck_gpioindex >> 0) & 0x1);
835 	}
836 
837 	ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
838 	if (ret)
839 		return ret;
840 
841 	ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
842 	if (ret)
843 		return ret;
844 
845 	ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
846 	if (ret)
847 		return ret;
848 
849 	/* DS2 GPIO */
850 	gpio_direction_output(pdata->buck_ds[0], 0x0);
851 	/* DS3 GPIO */
852 	gpio_direction_output(pdata->buck_ds[1], 0x0);
853 	/* DS4 GPIO */
854 	gpio_direction_output(pdata->buck_ds[2], 0x0);
855 
856 	if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
857 	   pdata->buck4_gpiodvs) {
858 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
859 				S5M8767_REG_BUCK2CTRL, 1 << 1,
860 				(pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
861 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
862 				S5M8767_REG_BUCK3CTRL, 1 << 1,
863 				(pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
864 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
865 				S5M8767_REG_BUCK4CTRL, 1 << 1,
866 				(pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
867 	}
868 
869 	/* Initialize GPIO DVS registers */
870 	for (i = 0; i < 8; i++) {
871 		if (s5m8767->buck2_gpiodvs) {
872 			regmap_write(s5m8767->iodev->regmap_pmic,
873 					S5M8767_REG_BUCK2DVS1 + i,
874 					s5m8767->buck2_vol[i]);
875 		}
876 
877 		if (s5m8767->buck3_gpiodvs) {
878 			regmap_write(s5m8767->iodev->regmap_pmic,
879 					S5M8767_REG_BUCK3DVS1 + i,
880 					s5m8767->buck3_vol[i]);
881 		}
882 
883 		if (s5m8767->buck4_gpiodvs) {
884 			regmap_write(s5m8767->iodev->regmap_pmic,
885 					S5M8767_REG_BUCK4DVS1 + i,
886 					s5m8767->buck4_vol[i]);
887 		}
888 	}
889 
890 	if (s5m8767->buck2_ramp)
891 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
892 				S5M8767_REG_DVSRAMP, 0x08, 0x08);
893 
894 	if (s5m8767->buck3_ramp)
895 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
896 				S5M8767_REG_DVSRAMP, 0x04, 0x04);
897 
898 	if (s5m8767->buck4_ramp)
899 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
900 				S5M8767_REG_DVSRAMP, 0x02, 0x02);
901 
902 	if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
903 		|| s5m8767->buck4_ramp) {
904 		unsigned int val;
905 		switch (s5m8767->ramp_delay) {
906 		case 5:
907 			val = S5M8767_DVS_BUCK_RAMP_5;
908 			break;
909 		case 10:
910 			val = S5M8767_DVS_BUCK_RAMP_10;
911 			break;
912 		case 25:
913 			val = S5M8767_DVS_BUCK_RAMP_25;
914 			break;
915 		case 50:
916 			val = S5M8767_DVS_BUCK_RAMP_50;
917 			break;
918 		case 100:
919 			val = S5M8767_DVS_BUCK_RAMP_100;
920 			break;
921 		default:
922 			val = S5M8767_DVS_BUCK_RAMP_10;
923 		}
924 		regmap_update_bits(s5m8767->iodev->regmap_pmic,
925 					S5M8767_REG_DVSRAMP,
926 					S5M8767_DVS_BUCK_RAMP_MASK,
927 					val << S5M8767_DVS_BUCK_RAMP_SHIFT);
928 	}
929 
930 	for (i = 0; i < pdata->num_regulators; i++) {
931 		const struct sec_voltage_desc *desc;
932 		int id = pdata->regulators[i].id;
933 		int enable_reg, enable_val;
934 		struct regulator_dev *rdev;
935 
936 		desc = reg_voltage_map[id];
937 		if (desc) {
938 			regulators[id].n_voltages =
939 				(desc->max - desc->min) / desc->step + 1;
940 			regulators[id].min_uV = desc->min;
941 			regulators[id].uV_step = desc->step;
942 			regulators[id].vsel_reg =
943 				s5m8767_get_vsel_reg(id, s5m8767);
944 			if (id < S5M8767_BUCK1)
945 				regulators[id].vsel_mask = 0x3f;
946 			else
947 				regulators[id].vsel_mask = 0xff;
948 
949 			ret = s5m8767_get_register(s5m8767, id, &enable_reg,
950 					     &enable_val);
951 			if (ret) {
952 				dev_err(s5m8767->dev, "error reading registers\n");
953 				return ret;
954 			}
955 			regulators[id].enable_reg = enable_reg;
956 			regulators[id].enable_mask = S5M8767_ENCTRL_MASK;
957 			regulators[id].enable_val = enable_val;
958 		}
959 
960 		config.dev = s5m8767->dev;
961 		config.init_data = pdata->regulators[i].initdata;
962 		config.driver_data = s5m8767;
963 		config.regmap = iodev->regmap_pmic;
964 		config.of_node = pdata->regulators[i].reg_node;
965 		config.ena_gpiod = NULL;
966 		if (pdata->regulators[i].ext_control_gpiod)
967 			s5m8767_regulator_config_ext_control(s5m8767,
968 					&pdata->regulators[i], &config);
969 
970 		rdev = devm_regulator_register(&pdev->dev, &regulators[id],
971 						  &config);
972 		if (IS_ERR(rdev)) {
973 			ret = PTR_ERR(rdev);
974 			dev_err(s5m8767->dev, "regulator init failed for %d\n",
975 					id);
976 			return ret;
977 		}
978 
979 		if (pdata->regulators[i].ext_control_gpiod) {
980 			ret = s5m8767_enable_ext_control(s5m8767, rdev);
981 			if (ret < 0) {
982 				dev_err(s5m8767->dev,
983 						"failed to enable gpio control over %s: %d\n",
984 						rdev->desc->name, ret);
985 				return ret;
986 			}
987 		}
988 	}
989 
990 	return 0;
991 }
992 
993 static const struct platform_device_id s5m8767_pmic_id[] = {
994 	{ "s5m8767-pmic", 0},
995 	{ },
996 };
997 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
998 
999 static struct platform_driver s5m8767_pmic_driver = {
1000 	.driver = {
1001 		.name = "s5m8767-pmic",
1002 	},
1003 	.probe = s5m8767_pmic_probe,
1004 	.id_table = s5m8767_pmic_id,
1005 };
1006 
1007 static int __init s5m8767_pmic_init(void)
1008 {
1009 	return platform_driver_register(&s5m8767_pmic_driver);
1010 }
1011 subsys_initcall(s5m8767_pmic_init);
1012 
1013 static void __exit s5m8767_pmic_exit(void)
1014 {
1015 	platform_driver_unregister(&s5m8767_pmic_driver);
1016 }
1017 module_exit(s5m8767_pmic_exit);
1018 
1019 /* Module information */
1020 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
1021 MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
1022 MODULE_LICENSE("GPL");
1023