1 /* 2 * s5m8767.c 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd 5 * http://www.samsung.com 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 * 12 */ 13 14 #include <linux/err.h> 15 #include <linux/of_gpio.h> 16 #include <linux/module.h> 17 #include <linux/platform_device.h> 18 #include <linux/regulator/driver.h> 19 #include <linux/regulator/machine.h> 20 #include <linux/mfd/samsung/core.h> 21 #include <linux/mfd/samsung/s5m8767.h> 22 #include <linux/regulator/of_regulator.h> 23 #include <linux/regmap.h> 24 25 #define S5M8767_OPMODE_NORMAL_MODE 0x1 26 27 struct s5m8767_info { 28 struct device *dev; 29 struct sec_pmic_dev *iodev; 30 int num_regulators; 31 struct regulator_dev **rdev; 32 struct sec_opmode_data *opmode; 33 34 int ramp_delay; 35 bool buck2_ramp; 36 bool buck3_ramp; 37 bool buck4_ramp; 38 39 bool buck2_gpiodvs; 40 bool buck3_gpiodvs; 41 bool buck4_gpiodvs; 42 u8 buck2_vol[8]; 43 u8 buck3_vol[8]; 44 u8 buck4_vol[8]; 45 int buck_gpios[3]; 46 int buck_ds[3]; 47 int buck_gpioindex; 48 }; 49 50 struct sec_voltage_desc { 51 int max; 52 int min; 53 int step; 54 }; 55 56 static const struct sec_voltage_desc buck_voltage_val1 = { 57 .max = 2225000, 58 .min = 650000, 59 .step = 6250, 60 }; 61 62 static const struct sec_voltage_desc buck_voltage_val2 = { 63 .max = 1600000, 64 .min = 600000, 65 .step = 6250, 66 }; 67 68 static const struct sec_voltage_desc buck_voltage_val3 = { 69 .max = 3000000, 70 .min = 750000, 71 .step = 12500, 72 }; 73 74 static const struct sec_voltage_desc ldo_voltage_val1 = { 75 .max = 3950000, 76 .min = 800000, 77 .step = 50000, 78 }; 79 80 static const struct sec_voltage_desc ldo_voltage_val2 = { 81 .max = 2375000, 82 .min = 800000, 83 .step = 25000, 84 }; 85 86 static const struct sec_voltage_desc *reg_voltage_map[] = { 87 [S5M8767_LDO1] = &ldo_voltage_val2, 88 [S5M8767_LDO2] = &ldo_voltage_val2, 89 [S5M8767_LDO3] = &ldo_voltage_val1, 90 [S5M8767_LDO4] = &ldo_voltage_val1, 91 [S5M8767_LDO5] = &ldo_voltage_val1, 92 [S5M8767_LDO6] = &ldo_voltage_val2, 93 [S5M8767_LDO7] = &ldo_voltage_val2, 94 [S5M8767_LDO8] = &ldo_voltage_val2, 95 [S5M8767_LDO9] = &ldo_voltage_val1, 96 [S5M8767_LDO10] = &ldo_voltage_val1, 97 [S5M8767_LDO11] = &ldo_voltage_val1, 98 [S5M8767_LDO12] = &ldo_voltage_val1, 99 [S5M8767_LDO13] = &ldo_voltage_val1, 100 [S5M8767_LDO14] = &ldo_voltage_val1, 101 [S5M8767_LDO15] = &ldo_voltage_val2, 102 [S5M8767_LDO16] = &ldo_voltage_val1, 103 [S5M8767_LDO17] = &ldo_voltage_val1, 104 [S5M8767_LDO18] = &ldo_voltage_val1, 105 [S5M8767_LDO19] = &ldo_voltage_val1, 106 [S5M8767_LDO20] = &ldo_voltage_val1, 107 [S5M8767_LDO21] = &ldo_voltage_val1, 108 [S5M8767_LDO22] = &ldo_voltage_val1, 109 [S5M8767_LDO23] = &ldo_voltage_val1, 110 [S5M8767_LDO24] = &ldo_voltage_val1, 111 [S5M8767_LDO25] = &ldo_voltage_val1, 112 [S5M8767_LDO26] = &ldo_voltage_val1, 113 [S5M8767_LDO27] = &ldo_voltage_val1, 114 [S5M8767_LDO28] = &ldo_voltage_val1, 115 [S5M8767_BUCK1] = &buck_voltage_val1, 116 [S5M8767_BUCK2] = &buck_voltage_val2, 117 [S5M8767_BUCK3] = &buck_voltage_val2, 118 [S5M8767_BUCK4] = &buck_voltage_val2, 119 [S5M8767_BUCK5] = &buck_voltage_val1, 120 [S5M8767_BUCK6] = &buck_voltage_val1, 121 [S5M8767_BUCK7] = &buck_voltage_val3, 122 [S5M8767_BUCK8] = &buck_voltage_val3, 123 [S5M8767_BUCK9] = &buck_voltage_val3, 124 }; 125 126 static unsigned int s5m8767_opmode_reg[][4] = { 127 /* {OFF, ON, LOWPOWER, SUSPEND} */ 128 /* LDO1 ... LDO28 */ 129 {0x0, 0x3, 0x2, 0x1}, /* LDO1 */ 130 {0x0, 0x3, 0x2, 0x1}, 131 {0x0, 0x3, 0x2, 0x1}, 132 {0x0, 0x0, 0x0, 0x0}, 133 {0x0, 0x3, 0x2, 0x1}, /* LDO5 */ 134 {0x0, 0x3, 0x2, 0x1}, 135 {0x0, 0x3, 0x2, 0x1}, 136 {0x0, 0x3, 0x2, 0x1}, 137 {0x0, 0x3, 0x2, 0x1}, 138 {0x0, 0x3, 0x2, 0x1}, /* LDO10 */ 139 {0x0, 0x3, 0x2, 0x1}, 140 {0x0, 0x3, 0x2, 0x1}, 141 {0x0, 0x3, 0x2, 0x1}, 142 {0x0, 0x3, 0x2, 0x1}, 143 {0x0, 0x3, 0x2, 0x1}, /* LDO15 */ 144 {0x0, 0x3, 0x2, 0x1}, 145 {0x0, 0x3, 0x2, 0x1}, 146 {0x0, 0x0, 0x0, 0x0}, 147 {0x0, 0x3, 0x2, 0x1}, 148 {0x0, 0x3, 0x2, 0x1}, /* LDO20 */ 149 {0x0, 0x3, 0x2, 0x1}, 150 {0x0, 0x3, 0x2, 0x1}, 151 {0x0, 0x0, 0x0, 0x0}, 152 {0x0, 0x3, 0x2, 0x1}, 153 {0x0, 0x3, 0x2, 0x1}, /* LDO25 */ 154 {0x0, 0x3, 0x2, 0x1}, 155 {0x0, 0x3, 0x2, 0x1}, 156 {0x0, 0x3, 0x2, 0x1}, /* LDO28 */ 157 158 /* BUCK1 ... BUCK9 */ 159 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */ 160 {0x0, 0x3, 0x1, 0x1}, 161 {0x0, 0x3, 0x1, 0x1}, 162 {0x0, 0x3, 0x1, 0x1}, 163 {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */ 164 {0x0, 0x3, 0x1, 0x1}, 165 {0x0, 0x3, 0x1, 0x1}, 166 {0x0, 0x3, 0x1, 0x1}, 167 {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */ 168 }; 169 170 static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id, 171 int *reg, int *enable_ctrl) 172 { 173 int i; 174 unsigned int mode; 175 176 switch (reg_id) { 177 case S5M8767_LDO1 ... S5M8767_LDO2: 178 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); 179 break; 180 case S5M8767_LDO3 ... S5M8767_LDO28: 181 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); 182 break; 183 case S5M8767_BUCK1: 184 *reg = S5M8767_REG_BUCK1CTRL1; 185 break; 186 case S5M8767_BUCK2 ... S5M8767_BUCK4: 187 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; 188 break; 189 case S5M8767_BUCK5: 190 *reg = S5M8767_REG_BUCK5CTRL1; 191 break; 192 case S5M8767_BUCK6 ... S5M8767_BUCK9: 193 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; 194 break; 195 default: 196 return -EINVAL; 197 } 198 199 for (i = 0; i < s5m8767->num_regulators; i++) { 200 if (s5m8767->opmode[i].id == reg_id) { 201 mode = s5m8767->opmode[i].mode; 202 break; 203 } 204 } 205 206 if (i < s5m8767->num_regulators) 207 *enable_ctrl = 208 s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT; 209 210 return 0; 211 } 212 213 static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767) 214 { 215 int reg; 216 217 switch (reg_id) { 218 case S5M8767_LDO1 ... S5M8767_LDO2: 219 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); 220 break; 221 case S5M8767_LDO3 ... S5M8767_LDO28: 222 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); 223 break; 224 case S5M8767_BUCK1: 225 reg = S5M8767_REG_BUCK1CTRL2; 226 break; 227 case S5M8767_BUCK2: 228 reg = S5M8767_REG_BUCK2DVS1; 229 if (s5m8767->buck2_gpiodvs) 230 reg += s5m8767->buck_gpioindex; 231 break; 232 case S5M8767_BUCK3: 233 reg = S5M8767_REG_BUCK3DVS1; 234 if (s5m8767->buck3_gpiodvs) 235 reg += s5m8767->buck_gpioindex; 236 break; 237 case S5M8767_BUCK4: 238 reg = S5M8767_REG_BUCK4DVS1; 239 if (s5m8767->buck4_gpiodvs) 240 reg += s5m8767->buck_gpioindex; 241 break; 242 case S5M8767_BUCK5: 243 reg = S5M8767_REG_BUCK5CTRL2; 244 break; 245 case S5M8767_BUCK6 ... S5M8767_BUCK9: 246 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2; 247 break; 248 default: 249 return -EINVAL; 250 } 251 252 return reg; 253 } 254 255 static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc, 256 int min_vol) 257 { 258 int selector = 0; 259 260 if (desc == NULL) 261 return -EINVAL; 262 263 if (min_vol > desc->max) 264 return -EINVAL; 265 266 if (min_vol < desc->min) 267 min_vol = desc->min; 268 269 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step); 270 271 if (desc->min + desc->step * selector > desc->max) 272 return -EINVAL; 273 274 return selector; 275 } 276 277 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767) 278 { 279 int temp_index = s5m8767->buck_gpioindex; 280 281 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1); 282 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1); 283 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1); 284 285 return 0; 286 } 287 288 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767) 289 { 290 int temp_index = s5m8767->buck_gpioindex; 291 292 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1); 293 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1); 294 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1); 295 296 return 0; 297 } 298 299 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev, 300 unsigned selector) 301 { 302 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 303 int reg_id = rdev_get_id(rdev); 304 int old_index, index = 0; 305 u8 *buck234_vol = NULL; 306 307 switch (reg_id) { 308 case S5M8767_LDO1 ... S5M8767_LDO28: 309 break; 310 case S5M8767_BUCK1 ... S5M8767_BUCK6: 311 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs) 312 buck234_vol = &s5m8767->buck2_vol[0]; 313 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs) 314 buck234_vol = &s5m8767->buck3_vol[0]; 315 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs) 316 buck234_vol = &s5m8767->buck4_vol[0]; 317 break; 318 case S5M8767_BUCK7 ... S5M8767_BUCK8: 319 return -EINVAL; 320 case S5M8767_BUCK9: 321 break; 322 default: 323 return -EINVAL; 324 } 325 326 /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */ 327 if (buck234_vol) { 328 while (*buck234_vol != selector) { 329 buck234_vol++; 330 index++; 331 } 332 old_index = s5m8767->buck_gpioindex; 333 s5m8767->buck_gpioindex = index; 334 335 if (index > old_index) 336 return s5m8767_set_high(s5m8767); 337 else 338 return s5m8767_set_low(s5m8767); 339 } else { 340 return regulator_set_voltage_sel_regmap(rdev, selector); 341 } 342 } 343 344 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev, 345 unsigned int old_sel, 346 unsigned int new_sel) 347 { 348 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 349 const struct sec_voltage_desc *desc; 350 int reg_id = rdev_get_id(rdev); 351 352 desc = reg_voltage_map[reg_id]; 353 354 if ((old_sel < new_sel) && s5m8767->ramp_delay) 355 return DIV_ROUND_UP(desc->step * (new_sel - old_sel), 356 s5m8767->ramp_delay * 1000); 357 return 0; 358 } 359 360 static struct regulator_ops s5m8767_ops = { 361 .list_voltage = regulator_list_voltage_linear, 362 .is_enabled = regulator_is_enabled_regmap, 363 .enable = regulator_enable_regmap, 364 .disable = regulator_disable_regmap, 365 .get_voltage_sel = regulator_get_voltage_sel_regmap, 366 .set_voltage_sel = s5m8767_set_voltage_sel, 367 .set_voltage_time_sel = s5m8767_set_voltage_time_sel, 368 }; 369 370 static struct regulator_ops s5m8767_buck78_ops = { 371 .list_voltage = regulator_list_voltage_linear, 372 .is_enabled = regulator_is_enabled_regmap, 373 .enable = regulator_enable_regmap, 374 .disable = regulator_disable_regmap, 375 .get_voltage_sel = regulator_get_voltage_sel_regmap, 376 .set_voltage_sel = regulator_set_voltage_sel_regmap, 377 }; 378 379 #define s5m8767_regulator_desc(_name) { \ 380 .name = #_name, \ 381 .id = S5M8767_##_name, \ 382 .ops = &s5m8767_ops, \ 383 .type = REGULATOR_VOLTAGE, \ 384 .owner = THIS_MODULE, \ 385 } 386 387 #define s5m8767_regulator_buck78_desc(_name) { \ 388 .name = #_name, \ 389 .id = S5M8767_##_name, \ 390 .ops = &s5m8767_buck78_ops, \ 391 .type = REGULATOR_VOLTAGE, \ 392 .owner = THIS_MODULE, \ 393 } 394 395 static struct regulator_desc regulators[] = { 396 s5m8767_regulator_desc(LDO1), 397 s5m8767_regulator_desc(LDO2), 398 s5m8767_regulator_desc(LDO3), 399 s5m8767_regulator_desc(LDO4), 400 s5m8767_regulator_desc(LDO5), 401 s5m8767_regulator_desc(LDO6), 402 s5m8767_regulator_desc(LDO7), 403 s5m8767_regulator_desc(LDO8), 404 s5m8767_regulator_desc(LDO9), 405 s5m8767_regulator_desc(LDO10), 406 s5m8767_regulator_desc(LDO11), 407 s5m8767_regulator_desc(LDO12), 408 s5m8767_regulator_desc(LDO13), 409 s5m8767_regulator_desc(LDO14), 410 s5m8767_regulator_desc(LDO15), 411 s5m8767_regulator_desc(LDO16), 412 s5m8767_regulator_desc(LDO17), 413 s5m8767_regulator_desc(LDO18), 414 s5m8767_regulator_desc(LDO19), 415 s5m8767_regulator_desc(LDO20), 416 s5m8767_regulator_desc(LDO21), 417 s5m8767_regulator_desc(LDO22), 418 s5m8767_regulator_desc(LDO23), 419 s5m8767_regulator_desc(LDO24), 420 s5m8767_regulator_desc(LDO25), 421 s5m8767_regulator_desc(LDO26), 422 s5m8767_regulator_desc(LDO27), 423 s5m8767_regulator_desc(LDO28), 424 s5m8767_regulator_desc(BUCK1), 425 s5m8767_regulator_desc(BUCK2), 426 s5m8767_regulator_desc(BUCK3), 427 s5m8767_regulator_desc(BUCK4), 428 s5m8767_regulator_desc(BUCK5), 429 s5m8767_regulator_desc(BUCK6), 430 s5m8767_regulator_buck78_desc(BUCK7), 431 s5m8767_regulator_buck78_desc(BUCK8), 432 s5m8767_regulator_desc(BUCK9), 433 }; 434 435 /* 436 * Enable GPIO control over BUCK9 in regulator_config for that regulator. 437 */ 438 static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767, 439 struct sec_regulator_data *rdata, 440 struct regulator_config *config) 441 { 442 int i, mode = 0; 443 444 if (rdata->id != S5M8767_BUCK9) 445 return; 446 447 /* Check if opmode for regulator matches S5M8767_ENCTRL_USE_GPIO */ 448 for (i = 0; i < s5m8767->num_regulators; i++) { 449 const struct sec_opmode_data *opmode = &s5m8767->opmode[i]; 450 if (opmode->id == rdata->id) { 451 mode = s5m8767_opmode_reg[rdata->id][opmode->mode]; 452 break; 453 } 454 } 455 if (mode != S5M8767_ENCTRL_USE_GPIO) { 456 dev_warn(s5m8767->dev, 457 "ext-control for %s: mismatched op_mode (%x), ignoring\n", 458 rdata->reg_node->name, mode); 459 return; 460 } 461 462 if (!gpio_is_valid(rdata->ext_control_gpio)) { 463 dev_warn(s5m8767->dev, 464 "ext-control for %s: GPIO not valid, ignoring\n", 465 rdata->reg_node->name); 466 return; 467 } 468 469 config->ena_gpio = rdata->ext_control_gpio; 470 config->ena_gpio_flags = GPIOF_OUT_INIT_HIGH; 471 } 472 473 /* 474 * Turn on GPIO control over BUCK9. 475 */ 476 static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767, 477 struct regulator_dev *rdev) 478 { 479 int id = rdev_get_id(rdev); 480 int ret, reg, enable_ctrl; 481 482 if (id != S5M8767_BUCK9) 483 return -EINVAL; 484 485 ret = s5m8767_get_register(s5m8767, id, ®, &enable_ctrl); 486 if (ret) 487 return ret; 488 489 return regmap_update_bits(s5m8767->iodev->regmap_pmic, 490 reg, S5M8767_ENCTRL_MASK, 491 S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT); 492 } 493 494 495 #ifdef CONFIG_OF 496 static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev, 497 struct sec_platform_data *pdata, 498 struct device_node *pmic_np) 499 { 500 int i, gpio; 501 502 for (i = 0; i < 3; i++) { 503 gpio = of_get_named_gpio(pmic_np, 504 "s5m8767,pmic-buck-dvs-gpios", i); 505 if (!gpio_is_valid(gpio)) { 506 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio); 507 return -EINVAL; 508 } 509 pdata->buck_gpios[i] = gpio; 510 } 511 return 0; 512 } 513 514 static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev, 515 struct sec_platform_data *pdata, 516 struct device_node *pmic_np) 517 { 518 int i, gpio; 519 520 for (i = 0; i < 3; i++) { 521 gpio = of_get_named_gpio(pmic_np, 522 "s5m8767,pmic-buck-ds-gpios", i); 523 if (!gpio_is_valid(gpio)) { 524 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio); 525 return -EINVAL; 526 } 527 pdata->buck_ds[i] = gpio; 528 } 529 return 0; 530 } 531 532 static void s5m8767_pmic_dt_parse_ext_control_gpio(struct sec_pmic_dev *iodev, 533 struct sec_regulator_data *rdata, 534 struct device_node *reg_np) 535 { 536 rdata->ext_control_gpio = of_get_named_gpio(reg_np, 537 "s5m8767,pmic-ext-control-gpios", 0); 538 if (!gpio_is_valid(rdata->ext_control_gpio)) 539 rdata->ext_control_gpio = 0; 540 } 541 542 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, 543 struct sec_platform_data *pdata) 544 { 545 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 546 struct device_node *pmic_np, *regulators_np, *reg_np; 547 struct sec_regulator_data *rdata; 548 struct sec_opmode_data *rmode; 549 unsigned int i, dvs_voltage_nr = 8, ret; 550 551 pmic_np = iodev->dev->of_node; 552 if (!pmic_np) { 553 dev_err(iodev->dev, "could not find pmic sub-node\n"); 554 return -ENODEV; 555 } 556 557 regulators_np = of_get_child_by_name(pmic_np, "regulators"); 558 if (!regulators_np) { 559 dev_err(iodev->dev, "could not find regulators sub-node\n"); 560 return -EINVAL; 561 } 562 563 /* count the number of regulators to be supported in pmic */ 564 pdata->num_regulators = of_get_child_count(regulators_np); 565 566 rdata = devm_kzalloc(&pdev->dev, sizeof(*rdata) * 567 pdata->num_regulators, GFP_KERNEL); 568 if (!rdata) 569 return -ENOMEM; 570 571 rmode = devm_kzalloc(&pdev->dev, sizeof(*rmode) * 572 pdata->num_regulators, GFP_KERNEL); 573 if (!rmode) 574 return -ENOMEM; 575 576 pdata->regulators = rdata; 577 pdata->opmode = rmode; 578 for_each_child_of_node(regulators_np, reg_np) { 579 for (i = 0; i < ARRAY_SIZE(regulators); i++) 580 if (!of_node_cmp(reg_np->name, regulators[i].name)) 581 break; 582 583 if (i == ARRAY_SIZE(regulators)) { 584 dev_warn(iodev->dev, 585 "don't know how to configure regulator %s\n", 586 reg_np->name); 587 continue; 588 } 589 590 s5m8767_pmic_dt_parse_ext_control_gpio(iodev, rdata, reg_np); 591 592 rdata->id = i; 593 rdata->initdata = of_get_regulator_init_data( 594 &pdev->dev, reg_np); 595 rdata->reg_node = reg_np; 596 rdata++; 597 rmode->id = i; 598 if (of_property_read_u32(reg_np, "op_mode", 599 &rmode->mode)) { 600 dev_warn(iodev->dev, 601 "no op_mode property property at %s\n", 602 reg_np->full_name); 603 604 rmode->mode = S5M8767_OPMODE_NORMAL_MODE; 605 } 606 rmode++; 607 } 608 609 of_node_put(regulators_np); 610 611 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL)) { 612 pdata->buck2_gpiodvs = true; 613 614 if (of_property_read_u32_array(pmic_np, 615 "s5m8767,pmic-buck2-dvs-voltage", 616 pdata->buck2_voltage, dvs_voltage_nr)) { 617 dev_err(iodev->dev, "buck2 voltages not specified\n"); 618 return -EINVAL; 619 } 620 } 621 622 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL)) { 623 pdata->buck3_gpiodvs = true; 624 625 if (of_property_read_u32_array(pmic_np, 626 "s5m8767,pmic-buck3-dvs-voltage", 627 pdata->buck3_voltage, dvs_voltage_nr)) { 628 dev_err(iodev->dev, "buck3 voltages not specified\n"); 629 return -EINVAL; 630 } 631 } 632 633 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL)) { 634 pdata->buck4_gpiodvs = true; 635 636 if (of_property_read_u32_array(pmic_np, 637 "s5m8767,pmic-buck4-dvs-voltage", 638 pdata->buck4_voltage, dvs_voltage_nr)) { 639 dev_err(iodev->dev, "buck4 voltages not specified\n"); 640 return -EINVAL; 641 } 642 } 643 644 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 645 pdata->buck4_gpiodvs) { 646 ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np); 647 if (ret) 648 return -EINVAL; 649 650 if (of_property_read_u32(pmic_np, 651 "s5m8767,pmic-buck-default-dvs-idx", 652 &pdata->buck_default_idx)) { 653 pdata->buck_default_idx = 0; 654 } else { 655 if (pdata->buck_default_idx >= 8) { 656 pdata->buck_default_idx = 0; 657 dev_info(iodev->dev, 658 "invalid value for default dvs index, use 0\n"); 659 } 660 } 661 } 662 663 ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np); 664 if (ret) 665 return -EINVAL; 666 667 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-ramp-enable", NULL)) 668 pdata->buck2_ramp_enable = true; 669 670 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-ramp-enable", NULL)) 671 pdata->buck3_ramp_enable = true; 672 673 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-ramp-enable", NULL)) 674 pdata->buck4_ramp_enable = true; 675 676 if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable 677 || pdata->buck4_ramp_enable) { 678 if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay", 679 &pdata->buck_ramp_delay)) 680 pdata->buck_ramp_delay = 0; 681 } 682 683 return 0; 684 } 685 #else 686 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, 687 struct sec_platform_data *pdata) 688 { 689 return 0; 690 } 691 #endif /* CONFIG_OF */ 692 693 static int s5m8767_pmic_probe(struct platform_device *pdev) 694 { 695 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 696 struct sec_platform_data *pdata = iodev->pdata; 697 struct regulator_config config = { }; 698 struct regulator_dev **rdev; 699 struct s5m8767_info *s5m8767; 700 int i, ret, size, buck_init; 701 702 if (!pdata) { 703 dev_err(pdev->dev.parent, "Platform data not supplied\n"); 704 return -ENODEV; 705 } 706 707 if (iodev->dev->of_node) { 708 ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata); 709 if (ret) 710 return ret; 711 } 712 713 if (pdata->buck2_gpiodvs) { 714 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) { 715 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 716 return -EINVAL; 717 } 718 } 719 720 if (pdata->buck3_gpiodvs) { 721 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) { 722 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 723 return -EINVAL; 724 } 725 } 726 727 if (pdata->buck4_gpiodvs) { 728 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) { 729 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 730 return -EINVAL; 731 } 732 } 733 734 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info), 735 GFP_KERNEL); 736 if (!s5m8767) 737 return -ENOMEM; 738 739 size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2); 740 s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); 741 if (!s5m8767->rdev) 742 return -ENOMEM; 743 744 rdev = s5m8767->rdev; 745 s5m8767->dev = &pdev->dev; 746 s5m8767->iodev = iodev; 747 s5m8767->num_regulators = pdata->num_regulators; 748 platform_set_drvdata(pdev, s5m8767); 749 750 s5m8767->buck_gpioindex = pdata->buck_default_idx; 751 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs; 752 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs; 753 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs; 754 s5m8767->buck_gpios[0] = pdata->buck_gpios[0]; 755 s5m8767->buck_gpios[1] = pdata->buck_gpios[1]; 756 s5m8767->buck_gpios[2] = pdata->buck_gpios[2]; 757 s5m8767->buck_ds[0] = pdata->buck_ds[0]; 758 s5m8767->buck_ds[1] = pdata->buck_ds[1]; 759 s5m8767->buck_ds[2] = pdata->buck_ds[2]; 760 761 s5m8767->ramp_delay = pdata->buck_ramp_delay; 762 s5m8767->buck2_ramp = pdata->buck2_ramp_enable; 763 s5m8767->buck3_ramp = pdata->buck3_ramp_enable; 764 s5m8767->buck4_ramp = pdata->buck4_ramp_enable; 765 s5m8767->opmode = pdata->opmode; 766 767 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 768 pdata->buck2_init); 769 770 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2, 771 buck_init); 772 773 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 774 pdata->buck3_init); 775 776 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2, 777 buck_init); 778 779 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 780 pdata->buck4_init); 781 782 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2, 783 buck_init); 784 785 for (i = 0; i < 8; i++) { 786 if (s5m8767->buck2_gpiodvs) { 787 s5m8767->buck2_vol[i] = 788 s5m8767_convert_voltage_to_sel( 789 &buck_voltage_val2, 790 pdata->buck2_voltage[i]); 791 } 792 793 if (s5m8767->buck3_gpiodvs) { 794 s5m8767->buck3_vol[i] = 795 s5m8767_convert_voltage_to_sel( 796 &buck_voltage_val2, 797 pdata->buck3_voltage[i]); 798 } 799 800 if (s5m8767->buck4_gpiodvs) { 801 s5m8767->buck4_vol[i] = 802 s5m8767_convert_voltage_to_sel( 803 &buck_voltage_val2, 804 pdata->buck4_voltage[i]); 805 } 806 } 807 808 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 809 pdata->buck4_gpiodvs) { 810 811 if (!gpio_is_valid(pdata->buck_gpios[0]) || 812 !gpio_is_valid(pdata->buck_gpios[1]) || 813 !gpio_is_valid(pdata->buck_gpios[2])) { 814 dev_err(&pdev->dev, "GPIO NOT VALID\n"); 815 return -EINVAL; 816 } 817 818 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0], 819 "S5M8767 SET1"); 820 if (ret) 821 return ret; 822 823 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1], 824 "S5M8767 SET2"); 825 if (ret) 826 return ret; 827 828 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2], 829 "S5M8767 SET3"); 830 if (ret) 831 return ret; 832 833 /* SET1 GPIO */ 834 gpio_direction_output(pdata->buck_gpios[0], 835 (s5m8767->buck_gpioindex >> 2) & 0x1); 836 /* SET2 GPIO */ 837 gpio_direction_output(pdata->buck_gpios[1], 838 (s5m8767->buck_gpioindex >> 1) & 0x1); 839 /* SET3 GPIO */ 840 gpio_direction_output(pdata->buck_gpios[2], 841 (s5m8767->buck_gpioindex >> 0) & 0x1); 842 } 843 844 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2"); 845 if (ret) 846 return ret; 847 848 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3"); 849 if (ret) 850 return ret; 851 852 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4"); 853 if (ret) 854 return ret; 855 856 /* DS2 GPIO */ 857 gpio_direction_output(pdata->buck_ds[0], 0x0); 858 /* DS3 GPIO */ 859 gpio_direction_output(pdata->buck_ds[1], 0x0); 860 /* DS4 GPIO */ 861 gpio_direction_output(pdata->buck_ds[2], 0x0); 862 863 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 864 pdata->buck4_gpiodvs) { 865 regmap_update_bits(s5m8767->iodev->regmap_pmic, 866 S5M8767_REG_BUCK2CTRL, 1 << 1, 867 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1)); 868 regmap_update_bits(s5m8767->iodev->regmap_pmic, 869 S5M8767_REG_BUCK3CTRL, 1 << 1, 870 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1)); 871 regmap_update_bits(s5m8767->iodev->regmap_pmic, 872 S5M8767_REG_BUCK4CTRL, 1 << 1, 873 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1)); 874 } 875 876 /* Initialize GPIO DVS registers */ 877 for (i = 0; i < 8; i++) { 878 if (s5m8767->buck2_gpiodvs) { 879 regmap_write(s5m8767->iodev->regmap_pmic, 880 S5M8767_REG_BUCK2DVS1 + i, 881 s5m8767->buck2_vol[i]); 882 } 883 884 if (s5m8767->buck3_gpiodvs) { 885 regmap_write(s5m8767->iodev->regmap_pmic, 886 S5M8767_REG_BUCK3DVS1 + i, 887 s5m8767->buck3_vol[i]); 888 } 889 890 if (s5m8767->buck4_gpiodvs) { 891 regmap_write(s5m8767->iodev->regmap_pmic, 892 S5M8767_REG_BUCK4DVS1 + i, 893 s5m8767->buck4_vol[i]); 894 } 895 } 896 897 if (s5m8767->buck2_ramp) 898 regmap_update_bits(s5m8767->iodev->regmap_pmic, 899 S5M8767_REG_DVSRAMP, 0x08, 0x08); 900 901 if (s5m8767->buck3_ramp) 902 regmap_update_bits(s5m8767->iodev->regmap_pmic, 903 S5M8767_REG_DVSRAMP, 0x04, 0x04); 904 905 if (s5m8767->buck4_ramp) 906 regmap_update_bits(s5m8767->iodev->regmap_pmic, 907 S5M8767_REG_DVSRAMP, 0x02, 0x02); 908 909 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp 910 || s5m8767->buck4_ramp) { 911 unsigned int val; 912 switch (s5m8767->ramp_delay) { 913 case 5: 914 val = S5M8767_DVS_BUCK_RAMP_5; 915 break; 916 case 10: 917 val = S5M8767_DVS_BUCK_RAMP_10; 918 break; 919 case 25: 920 val = S5M8767_DVS_BUCK_RAMP_25; 921 break; 922 case 50: 923 val = S5M8767_DVS_BUCK_RAMP_50; 924 break; 925 case 100: 926 val = S5M8767_DVS_BUCK_RAMP_100; 927 break; 928 default: 929 val = S5M8767_DVS_BUCK_RAMP_10; 930 } 931 regmap_update_bits(s5m8767->iodev->regmap_pmic, 932 S5M8767_REG_DVSRAMP, 933 S5M8767_DVS_BUCK_RAMP_MASK, 934 val << S5M8767_DVS_BUCK_RAMP_SHIFT); 935 } 936 937 for (i = 0; i < pdata->num_regulators; i++) { 938 const struct sec_voltage_desc *desc; 939 int id = pdata->regulators[i].id; 940 int enable_reg, enable_val; 941 942 desc = reg_voltage_map[id]; 943 if (desc) { 944 regulators[id].n_voltages = 945 (desc->max - desc->min) / desc->step + 1; 946 regulators[id].min_uV = desc->min; 947 regulators[id].uV_step = desc->step; 948 regulators[id].vsel_reg = 949 s5m8767_get_vsel_reg(id, s5m8767); 950 if (id < S5M8767_BUCK1) 951 regulators[id].vsel_mask = 0x3f; 952 else 953 regulators[id].vsel_mask = 0xff; 954 955 s5m8767_get_register(s5m8767, id, &enable_reg, 956 &enable_val); 957 regulators[id].enable_reg = enable_reg; 958 regulators[id].enable_mask = S5M8767_ENCTRL_MASK; 959 regulators[id].enable_val = enable_val; 960 } 961 962 config.dev = s5m8767->dev; 963 config.init_data = pdata->regulators[i].initdata; 964 config.driver_data = s5m8767; 965 config.regmap = iodev->regmap_pmic; 966 config.of_node = pdata->regulators[i].reg_node; 967 config.ena_gpio = config.ena_gpio_flags = 0; 968 if (pdata->regulators[i].ext_control_gpio) 969 s5m8767_regulator_config_ext_control(s5m8767, 970 &pdata->regulators[i], &config); 971 972 rdev[i] = devm_regulator_register(&pdev->dev, ®ulators[id], 973 &config); 974 if (IS_ERR(rdev[i])) { 975 ret = PTR_ERR(rdev[i]); 976 dev_err(s5m8767->dev, "regulator init failed for %d\n", 977 id); 978 return ret; 979 } 980 981 if (pdata->regulators[i].ext_control_gpio) { 982 ret = s5m8767_enable_ext_control(s5m8767, rdev[i]); 983 if (ret < 0) { 984 dev_err(s5m8767->dev, 985 "failed to enable gpio control over %s: %d\n", 986 rdev[i]->desc->name, ret); 987 return ret; 988 } 989 } 990 } 991 992 return 0; 993 } 994 995 static const struct platform_device_id s5m8767_pmic_id[] = { 996 { "s5m8767-pmic", 0}, 997 { }, 998 }; 999 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id); 1000 1001 static struct platform_driver s5m8767_pmic_driver = { 1002 .driver = { 1003 .name = "s5m8767-pmic", 1004 .owner = THIS_MODULE, 1005 }, 1006 .probe = s5m8767_pmic_probe, 1007 .id_table = s5m8767_pmic_id, 1008 }; 1009 1010 static int __init s5m8767_pmic_init(void) 1011 { 1012 return platform_driver_register(&s5m8767_pmic_driver); 1013 } 1014 subsys_initcall(s5m8767_pmic_init); 1015 1016 static void __exit s5m8767_pmic_exit(void) 1017 { 1018 platform_driver_unregister(&s5m8767_pmic_driver); 1019 } 1020 module_exit(s5m8767_pmic_exit); 1021 1022 /* Module information */ 1023 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); 1024 MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver"); 1025 MODULE_LICENSE("GPL"); 1026