1 /* 2 * s5m8767.c 3 * 4 * Copyright (c) 2011 Samsung Electronics Co., Ltd 5 * http://www.samsung.com 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License as published by the 9 * Free Software Foundation; either version 2 of the License, or (at your 10 * option) any later version. 11 * 12 */ 13 14 #include <linux/bug.h> 15 #include <linux/err.h> 16 #include <linux/gpio.h> 17 #include <linux/slab.h> 18 #include <linux/module.h> 19 #include <linux/platform_device.h> 20 #include <linux/regulator/driver.h> 21 #include <linux/regulator/machine.h> 22 #include <linux/mfd/samsung/core.h> 23 #include <linux/mfd/samsung/s5m8767.h> 24 25 struct s5m8767_info { 26 struct device *dev; 27 struct sec_pmic_dev *iodev; 28 int num_regulators; 29 struct regulator_dev **rdev; 30 struct sec_opmode_data *opmode; 31 32 int ramp_delay; 33 bool buck2_ramp; 34 bool buck3_ramp; 35 bool buck4_ramp; 36 37 bool buck2_gpiodvs; 38 bool buck3_gpiodvs; 39 bool buck4_gpiodvs; 40 u8 buck2_vol[8]; 41 u8 buck3_vol[8]; 42 u8 buck4_vol[8]; 43 int buck_gpios[3]; 44 int buck_ds[3]; 45 int buck_gpioindex; 46 }; 47 48 struct sec_voltage_desc { 49 int max; 50 int min; 51 int step; 52 }; 53 54 static const struct sec_voltage_desc buck_voltage_val1 = { 55 .max = 2225000, 56 .min = 650000, 57 .step = 6250, 58 }; 59 60 static const struct sec_voltage_desc buck_voltage_val2 = { 61 .max = 1600000, 62 .min = 600000, 63 .step = 6250, 64 }; 65 66 static const struct sec_voltage_desc buck_voltage_val3 = { 67 .max = 3000000, 68 .min = 750000, 69 .step = 12500, 70 }; 71 72 static const struct sec_voltage_desc ldo_voltage_val1 = { 73 .max = 3950000, 74 .min = 800000, 75 .step = 50000, 76 }; 77 78 static const struct sec_voltage_desc ldo_voltage_val2 = { 79 .max = 2375000, 80 .min = 800000, 81 .step = 25000, 82 }; 83 84 static const struct sec_voltage_desc *reg_voltage_map[] = { 85 [S5M8767_LDO1] = &ldo_voltage_val2, 86 [S5M8767_LDO2] = &ldo_voltage_val2, 87 [S5M8767_LDO3] = &ldo_voltage_val1, 88 [S5M8767_LDO4] = &ldo_voltage_val1, 89 [S5M8767_LDO5] = &ldo_voltage_val1, 90 [S5M8767_LDO6] = &ldo_voltage_val2, 91 [S5M8767_LDO7] = &ldo_voltage_val2, 92 [S5M8767_LDO8] = &ldo_voltage_val2, 93 [S5M8767_LDO9] = &ldo_voltage_val1, 94 [S5M8767_LDO10] = &ldo_voltage_val1, 95 [S5M8767_LDO11] = &ldo_voltage_val1, 96 [S5M8767_LDO12] = &ldo_voltage_val1, 97 [S5M8767_LDO13] = &ldo_voltage_val1, 98 [S5M8767_LDO14] = &ldo_voltage_val1, 99 [S5M8767_LDO15] = &ldo_voltage_val2, 100 [S5M8767_LDO16] = &ldo_voltage_val1, 101 [S5M8767_LDO17] = &ldo_voltage_val1, 102 [S5M8767_LDO18] = &ldo_voltage_val1, 103 [S5M8767_LDO19] = &ldo_voltage_val1, 104 [S5M8767_LDO20] = &ldo_voltage_val1, 105 [S5M8767_LDO21] = &ldo_voltage_val1, 106 [S5M8767_LDO22] = &ldo_voltage_val1, 107 [S5M8767_LDO23] = &ldo_voltage_val1, 108 [S5M8767_LDO24] = &ldo_voltage_val1, 109 [S5M8767_LDO25] = &ldo_voltage_val1, 110 [S5M8767_LDO26] = &ldo_voltage_val1, 111 [S5M8767_LDO27] = &ldo_voltage_val1, 112 [S5M8767_LDO28] = &ldo_voltage_val1, 113 [S5M8767_BUCK1] = &buck_voltage_val1, 114 [S5M8767_BUCK2] = &buck_voltage_val2, 115 [S5M8767_BUCK3] = &buck_voltage_val2, 116 [S5M8767_BUCK4] = &buck_voltage_val2, 117 [S5M8767_BUCK5] = &buck_voltage_val1, 118 [S5M8767_BUCK6] = &buck_voltage_val1, 119 [S5M8767_BUCK7] = NULL, 120 [S5M8767_BUCK8] = NULL, 121 [S5M8767_BUCK9] = &buck_voltage_val3, 122 }; 123 124 static unsigned int s5m8767_opmode_reg[][4] = { 125 /* {OFF, ON, LOWPOWER, SUSPEND} */ 126 /* LDO1 ... LDO28 */ 127 {0x0, 0x3, 0x2, 0x1}, /* LDO1 */ 128 {0x0, 0x3, 0x2, 0x1}, 129 {0x0, 0x3, 0x2, 0x1}, 130 {0x0, 0x0, 0x0, 0x0}, 131 {0x0, 0x3, 0x2, 0x1}, /* LDO5 */ 132 {0x0, 0x3, 0x2, 0x1}, 133 {0x0, 0x3, 0x2, 0x1}, 134 {0x0, 0x3, 0x2, 0x1}, 135 {0x0, 0x3, 0x2, 0x1}, 136 {0x0, 0x3, 0x2, 0x1}, /* LDO10 */ 137 {0x0, 0x3, 0x2, 0x1}, 138 {0x0, 0x3, 0x2, 0x1}, 139 {0x0, 0x3, 0x2, 0x1}, 140 {0x0, 0x3, 0x2, 0x1}, 141 {0x0, 0x3, 0x2, 0x1}, /* LDO15 */ 142 {0x0, 0x3, 0x2, 0x1}, 143 {0x0, 0x3, 0x2, 0x1}, 144 {0x0, 0x0, 0x0, 0x0}, 145 {0x0, 0x3, 0x2, 0x1}, 146 {0x0, 0x3, 0x2, 0x1}, /* LDO20 */ 147 {0x0, 0x3, 0x2, 0x1}, 148 {0x0, 0x3, 0x2, 0x1}, 149 {0x0, 0x0, 0x0, 0x0}, 150 {0x0, 0x3, 0x2, 0x1}, 151 {0x0, 0x3, 0x2, 0x1}, /* LDO25 */ 152 {0x0, 0x3, 0x2, 0x1}, 153 {0x0, 0x3, 0x2, 0x1}, 154 {0x0, 0x3, 0x2, 0x1}, /* LDO28 */ 155 156 /* BUCK1 ... BUCK9 */ 157 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */ 158 {0x0, 0x3, 0x1, 0x1}, 159 {0x0, 0x3, 0x1, 0x1}, 160 {0x0, 0x3, 0x1, 0x1}, 161 {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */ 162 {0x0, 0x3, 0x1, 0x1}, 163 {0x0, 0x3, 0x1, 0x1}, 164 {0x0, 0x3, 0x1, 0x1}, 165 {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */ 166 }; 167 168 static int s5m8767_get_register(struct regulator_dev *rdev, int *reg, 169 int *enable_ctrl) 170 { 171 int i, reg_id = rdev_get_id(rdev); 172 unsigned int mode; 173 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 174 175 switch (reg_id) { 176 case S5M8767_LDO1 ... S5M8767_LDO2: 177 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); 178 break; 179 case S5M8767_LDO3 ... S5M8767_LDO28: 180 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); 181 break; 182 case S5M8767_BUCK1: 183 *reg = S5M8767_REG_BUCK1CTRL1; 184 break; 185 case S5M8767_BUCK2 ... S5M8767_BUCK4: 186 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; 187 break; 188 case S5M8767_BUCK5: 189 *reg = S5M8767_REG_BUCK5CTRL1; 190 break; 191 case S5M8767_BUCK6 ... S5M8767_BUCK9: 192 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; 193 break; 194 default: 195 return -EINVAL; 196 } 197 198 for (i = 0; i < s5m8767->num_regulators; i++) { 199 if (s5m8767->opmode[i].id == reg_id) { 200 mode = s5m8767->opmode[i].mode; 201 break; 202 } 203 } 204 205 if (i < s5m8767->num_regulators) 206 *enable_ctrl = 207 s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT; 208 209 return 0; 210 } 211 212 static int s5m8767_reg_is_enabled(struct regulator_dev *rdev) 213 { 214 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 215 int ret, reg; 216 int mask = 0xc0, enable_ctrl; 217 u8 val; 218 219 ret = s5m8767_get_register(rdev, ®, &enable_ctrl); 220 if (ret == -EINVAL) 221 return 1; 222 else if (ret) 223 return ret; 224 225 ret = sec_reg_read(s5m8767->iodev, reg, &val); 226 if (ret) 227 return ret; 228 229 return (val & mask) == enable_ctrl; 230 } 231 232 static int s5m8767_reg_enable(struct regulator_dev *rdev) 233 { 234 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 235 int ret, reg; 236 int mask = 0xc0, enable_ctrl; 237 238 ret = s5m8767_get_register(rdev, ®, &enable_ctrl); 239 if (ret) 240 return ret; 241 242 return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask); 243 } 244 245 static int s5m8767_reg_disable(struct regulator_dev *rdev) 246 { 247 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 248 int ret, reg; 249 int mask = 0xc0, enable_ctrl; 250 251 ret = s5m8767_get_register(rdev, ®, &enable_ctrl); 252 if (ret) 253 return ret; 254 255 return sec_reg_update(s5m8767->iodev, reg, ~mask, mask); 256 } 257 258 static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg) 259 { 260 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 261 int reg_id = rdev_get_id(rdev); 262 int reg; 263 264 switch (reg_id) { 265 case S5M8767_LDO1 ... S5M8767_LDO2: 266 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); 267 break; 268 case S5M8767_LDO3 ... S5M8767_LDO28: 269 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); 270 break; 271 case S5M8767_BUCK1: 272 reg = S5M8767_REG_BUCK1CTRL2; 273 break; 274 case S5M8767_BUCK2: 275 reg = S5M8767_REG_BUCK2DVS1; 276 if (s5m8767->buck2_gpiodvs) 277 reg += s5m8767->buck_gpioindex; 278 break; 279 case S5M8767_BUCK3: 280 reg = S5M8767_REG_BUCK3DVS1; 281 if (s5m8767->buck3_gpiodvs) 282 reg += s5m8767->buck_gpioindex; 283 break; 284 case S5M8767_BUCK4: 285 reg = S5M8767_REG_BUCK4DVS1; 286 if (s5m8767->buck4_gpiodvs) 287 reg += s5m8767->buck_gpioindex; 288 break; 289 case S5M8767_BUCK5: 290 reg = S5M8767_REG_BUCK5CTRL2; 291 break; 292 case S5M8767_BUCK6 ... S5M8767_BUCK9: 293 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2; 294 break; 295 default: 296 return -EINVAL; 297 } 298 299 *_reg = reg; 300 301 return 0; 302 } 303 304 static int s5m8767_get_voltage_sel(struct regulator_dev *rdev) 305 { 306 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 307 int reg, mask, ret; 308 int reg_id = rdev_get_id(rdev); 309 u8 val; 310 311 ret = s5m8767_get_voltage_register(rdev, ®); 312 if (ret) 313 return ret; 314 315 mask = (reg_id < S5M8767_BUCK1) ? 0x3f : 0xff; 316 317 ret = sec_reg_read(s5m8767->iodev, reg, &val); 318 if (ret) 319 return ret; 320 321 val &= mask; 322 323 return val; 324 } 325 326 static int s5m8767_convert_voltage_to_sel( 327 const struct sec_voltage_desc *desc, 328 int min_vol, int max_vol) 329 { 330 int selector = 0; 331 332 if (desc == NULL) 333 return -EINVAL; 334 335 if (max_vol < desc->min || min_vol > desc->max) 336 return -EINVAL; 337 338 if (min_vol < desc->min) 339 min_vol = desc->min; 340 341 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step); 342 343 if (desc->min + desc->step * selector > max_vol) 344 return -EINVAL; 345 346 return selector; 347 } 348 349 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767) 350 { 351 int temp_index = s5m8767->buck_gpioindex; 352 353 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1); 354 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1); 355 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1); 356 357 return 0; 358 } 359 360 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767) 361 { 362 int temp_index = s5m8767->buck_gpioindex; 363 364 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1); 365 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1); 366 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1); 367 368 return 0; 369 } 370 371 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev, 372 unsigned selector) 373 { 374 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 375 int reg_id = rdev_get_id(rdev); 376 int reg, mask, ret = 0, old_index, index = 0; 377 u8 *buck234_vol = NULL; 378 379 switch (reg_id) { 380 case S5M8767_LDO1 ... S5M8767_LDO28: 381 mask = 0x3f; 382 break; 383 case S5M8767_BUCK1 ... S5M8767_BUCK6: 384 mask = 0xff; 385 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs) 386 buck234_vol = &s5m8767->buck2_vol[0]; 387 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs) 388 buck234_vol = &s5m8767->buck3_vol[0]; 389 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs) 390 buck234_vol = &s5m8767->buck4_vol[0]; 391 break; 392 case S5M8767_BUCK7 ... S5M8767_BUCK8: 393 return -EINVAL; 394 case S5M8767_BUCK9: 395 mask = 0xff; 396 break; 397 default: 398 return -EINVAL; 399 } 400 401 /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */ 402 if (buck234_vol) { 403 while (*buck234_vol != selector) { 404 buck234_vol++; 405 index++; 406 } 407 old_index = s5m8767->buck_gpioindex; 408 s5m8767->buck_gpioindex = index; 409 410 if (index > old_index) 411 return s5m8767_set_high(s5m8767); 412 else 413 return s5m8767_set_low(s5m8767); 414 } else { 415 ret = s5m8767_get_voltage_register(rdev, ®); 416 if (ret) 417 return ret; 418 419 return sec_reg_update(s5m8767->iodev, reg, selector, mask); 420 } 421 } 422 423 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev, 424 unsigned int old_sel, 425 unsigned int new_sel) 426 { 427 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 428 const struct sec_voltage_desc *desc; 429 int reg_id = rdev_get_id(rdev); 430 431 desc = reg_voltage_map[reg_id]; 432 433 if ((old_sel < new_sel) && s5m8767->ramp_delay) 434 return DIV_ROUND_UP(desc->step * (new_sel - old_sel), 435 s5m8767->ramp_delay * 1000); 436 return 0; 437 } 438 439 static struct regulator_ops s5m8767_ops = { 440 .list_voltage = regulator_list_voltage_linear, 441 .is_enabled = s5m8767_reg_is_enabled, 442 .enable = s5m8767_reg_enable, 443 .disable = s5m8767_reg_disable, 444 .get_voltage_sel = s5m8767_get_voltage_sel, 445 .set_voltage_sel = s5m8767_set_voltage_sel, 446 .set_voltage_time_sel = s5m8767_set_voltage_time_sel, 447 }; 448 449 static struct regulator_ops s5m8767_buck78_ops = { 450 .is_enabled = s5m8767_reg_is_enabled, 451 .enable = s5m8767_reg_enable, 452 .disable = s5m8767_reg_disable, 453 }; 454 455 #define s5m8767_regulator_desc(_name) { \ 456 .name = #_name, \ 457 .id = S5M8767_##_name, \ 458 .ops = &s5m8767_ops, \ 459 .type = REGULATOR_VOLTAGE, \ 460 .owner = THIS_MODULE, \ 461 } 462 463 #define s5m8767_regulator_buck78_desc(_name) { \ 464 .name = #_name, \ 465 .id = S5M8767_##_name, \ 466 .ops = &s5m8767_buck78_ops, \ 467 .type = REGULATOR_VOLTAGE, \ 468 .owner = THIS_MODULE, \ 469 } 470 471 static struct regulator_desc regulators[] = { 472 s5m8767_regulator_desc(LDO1), 473 s5m8767_regulator_desc(LDO2), 474 s5m8767_regulator_desc(LDO3), 475 s5m8767_regulator_desc(LDO4), 476 s5m8767_regulator_desc(LDO5), 477 s5m8767_regulator_desc(LDO6), 478 s5m8767_regulator_desc(LDO7), 479 s5m8767_regulator_desc(LDO8), 480 s5m8767_regulator_desc(LDO9), 481 s5m8767_regulator_desc(LDO10), 482 s5m8767_regulator_desc(LDO11), 483 s5m8767_regulator_desc(LDO12), 484 s5m8767_regulator_desc(LDO13), 485 s5m8767_regulator_desc(LDO14), 486 s5m8767_regulator_desc(LDO15), 487 s5m8767_regulator_desc(LDO16), 488 s5m8767_regulator_desc(LDO17), 489 s5m8767_regulator_desc(LDO18), 490 s5m8767_regulator_desc(LDO19), 491 s5m8767_regulator_desc(LDO20), 492 s5m8767_regulator_desc(LDO21), 493 s5m8767_regulator_desc(LDO22), 494 s5m8767_regulator_desc(LDO23), 495 s5m8767_regulator_desc(LDO24), 496 s5m8767_regulator_desc(LDO25), 497 s5m8767_regulator_desc(LDO26), 498 s5m8767_regulator_desc(LDO27), 499 s5m8767_regulator_desc(LDO28), 500 s5m8767_regulator_desc(BUCK1), 501 s5m8767_regulator_desc(BUCK2), 502 s5m8767_regulator_desc(BUCK3), 503 s5m8767_regulator_desc(BUCK4), 504 s5m8767_regulator_desc(BUCK5), 505 s5m8767_regulator_desc(BUCK6), 506 s5m8767_regulator_buck78_desc(BUCK7), 507 s5m8767_regulator_buck78_desc(BUCK8), 508 s5m8767_regulator_desc(BUCK9), 509 }; 510 511 static int s5m8767_pmic_probe(struct platform_device *pdev) 512 { 513 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 514 struct sec_platform_data *pdata = dev_get_platdata(iodev->dev); 515 struct regulator_config config = { }; 516 struct regulator_dev **rdev; 517 struct s5m8767_info *s5m8767; 518 int i, ret, size, buck_init; 519 520 if (!pdata) { 521 dev_err(pdev->dev.parent, "Platform data not supplied\n"); 522 return -ENODEV; 523 } 524 525 if (pdata->buck2_gpiodvs) { 526 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) { 527 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 528 return -EINVAL; 529 } 530 } 531 532 if (pdata->buck3_gpiodvs) { 533 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) { 534 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 535 return -EINVAL; 536 } 537 } 538 539 if (pdata->buck4_gpiodvs) { 540 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) { 541 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 542 return -EINVAL; 543 } 544 } 545 546 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info), 547 GFP_KERNEL); 548 if (!s5m8767) 549 return -ENOMEM; 550 551 size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2); 552 s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); 553 if (!s5m8767->rdev) 554 return -ENOMEM; 555 556 rdev = s5m8767->rdev; 557 s5m8767->dev = &pdev->dev; 558 s5m8767->iodev = iodev; 559 s5m8767->num_regulators = pdata->num_regulators; 560 platform_set_drvdata(pdev, s5m8767); 561 562 s5m8767->buck_gpioindex = pdata->buck_default_idx; 563 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs; 564 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs; 565 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs; 566 s5m8767->buck_gpios[0] = pdata->buck_gpios[0]; 567 s5m8767->buck_gpios[1] = pdata->buck_gpios[1]; 568 s5m8767->buck_gpios[2] = pdata->buck_gpios[2]; 569 s5m8767->buck_ds[0] = pdata->buck_ds[0]; 570 s5m8767->buck_ds[1] = pdata->buck_ds[1]; 571 s5m8767->buck_ds[2] = pdata->buck_ds[2]; 572 573 s5m8767->ramp_delay = pdata->buck_ramp_delay; 574 s5m8767->buck2_ramp = pdata->buck2_ramp_enable; 575 s5m8767->buck3_ramp = pdata->buck3_ramp_enable; 576 s5m8767->buck4_ramp = pdata->buck4_ramp_enable; 577 s5m8767->opmode = pdata->opmode; 578 579 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 580 pdata->buck2_init, 581 pdata->buck2_init + 582 buck_voltage_val2.step); 583 584 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init); 585 586 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 587 pdata->buck3_init, 588 pdata->buck3_init + 589 buck_voltage_val2.step); 590 591 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init); 592 593 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 594 pdata->buck4_init, 595 pdata->buck4_init + 596 buck_voltage_val2.step); 597 598 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init); 599 600 for (i = 0; i < 8; i++) { 601 if (s5m8767->buck2_gpiodvs) { 602 s5m8767->buck2_vol[i] = 603 s5m8767_convert_voltage_to_sel( 604 &buck_voltage_val2, 605 pdata->buck2_voltage[i], 606 pdata->buck2_voltage[i] + 607 buck_voltage_val2.step); 608 } 609 610 if (s5m8767->buck3_gpiodvs) { 611 s5m8767->buck3_vol[i] = 612 s5m8767_convert_voltage_to_sel( 613 &buck_voltage_val2, 614 pdata->buck3_voltage[i], 615 pdata->buck3_voltage[i] + 616 buck_voltage_val2.step); 617 } 618 619 if (s5m8767->buck4_gpiodvs) { 620 s5m8767->buck4_vol[i] = 621 s5m8767_convert_voltage_to_sel( 622 &buck_voltage_val2, 623 pdata->buck4_voltage[i], 624 pdata->buck4_voltage[i] + 625 buck_voltage_val2.step); 626 } 627 } 628 629 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 630 pdata->buck4_gpiodvs) { 631 632 if (!gpio_is_valid(pdata->buck_gpios[0]) || 633 !gpio_is_valid(pdata->buck_gpios[1]) || 634 !gpio_is_valid(pdata->buck_gpios[2])) { 635 dev_err(&pdev->dev, "GPIO NOT VALID\n"); 636 return -EINVAL; 637 } 638 639 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0], 640 "S5M8767 SET1"); 641 if (ret) 642 return ret; 643 644 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1], 645 "S5M8767 SET2"); 646 if (ret) 647 return ret; 648 649 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2], 650 "S5M8767 SET3"); 651 if (ret) 652 return ret; 653 654 /* SET1 GPIO */ 655 gpio_direction_output(pdata->buck_gpios[0], 656 (s5m8767->buck_gpioindex >> 2) & 0x1); 657 /* SET2 GPIO */ 658 gpio_direction_output(pdata->buck_gpios[1], 659 (s5m8767->buck_gpioindex >> 1) & 0x1); 660 /* SET3 GPIO */ 661 gpio_direction_output(pdata->buck_gpios[2], 662 (s5m8767->buck_gpioindex >> 0) & 0x1); 663 } 664 665 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2"); 666 if (ret) 667 return ret; 668 669 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3"); 670 if (ret) 671 return ret; 672 673 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4"); 674 if (ret) 675 return ret; 676 677 /* DS2 GPIO */ 678 gpio_direction_output(pdata->buck_ds[0], 0x0); 679 /* DS3 GPIO */ 680 gpio_direction_output(pdata->buck_ds[1], 0x0); 681 /* DS4 GPIO */ 682 gpio_direction_output(pdata->buck_ds[2], 0x0); 683 684 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 685 pdata->buck4_gpiodvs) { 686 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL, 687 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1), 688 1 << 1); 689 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL, 690 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1), 691 1 << 1); 692 sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL, 693 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1), 694 1 << 1); 695 } 696 697 /* Initialize GPIO DVS registers */ 698 for (i = 0; i < 8; i++) { 699 if (s5m8767->buck2_gpiodvs) { 700 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i, 701 s5m8767->buck2_vol[i]); 702 } 703 704 if (s5m8767->buck3_gpiodvs) { 705 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i, 706 s5m8767->buck3_vol[i]); 707 } 708 709 if (s5m8767->buck4_gpiodvs) { 710 sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i, 711 s5m8767->buck4_vol[i]); 712 } 713 } 714 715 if (s5m8767->buck2_ramp) 716 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08); 717 718 if (s5m8767->buck3_ramp) 719 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04); 720 721 if (s5m8767->buck4_ramp) 722 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02); 723 724 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp 725 || s5m8767->buck4_ramp) { 726 switch (s5m8767->ramp_delay) { 727 case 5: 728 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 729 0x40, 0xf0); 730 break; 731 case 10: 732 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 733 0x90, 0xf0); 734 break; 735 case 25: 736 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 737 0xd0, 0xf0); 738 break; 739 case 50: 740 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 741 0xe0, 0xf0); 742 break; 743 case 100: 744 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 745 0xf0, 0xf0); 746 break; 747 default: 748 sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 749 0x90, 0xf0); 750 } 751 } 752 753 for (i = 0; i < pdata->num_regulators; i++) { 754 const struct sec_voltage_desc *desc; 755 int id = pdata->regulators[i].id; 756 757 desc = reg_voltage_map[id]; 758 if (desc) { 759 regulators[id].n_voltages = 760 (desc->max - desc->min) / desc->step + 1; 761 regulators[id].min_uV = desc->min; 762 regulators[id].uV_step = desc->step; 763 } 764 765 config.dev = s5m8767->dev; 766 config.init_data = pdata->regulators[i].initdata; 767 config.driver_data = s5m8767; 768 769 rdev[i] = regulator_register(®ulators[id], &config); 770 if (IS_ERR(rdev[i])) { 771 ret = PTR_ERR(rdev[i]); 772 dev_err(s5m8767->dev, "regulator init failed for %d\n", 773 id); 774 rdev[i] = NULL; 775 goto err; 776 } 777 } 778 779 return 0; 780 err: 781 for (i = 0; i < s5m8767->num_regulators; i++) 782 if (rdev[i]) 783 regulator_unregister(rdev[i]); 784 785 return ret; 786 } 787 788 static int s5m8767_pmic_remove(struct platform_device *pdev) 789 { 790 struct s5m8767_info *s5m8767 = platform_get_drvdata(pdev); 791 struct regulator_dev **rdev = s5m8767->rdev; 792 int i; 793 794 for (i = 0; i < s5m8767->num_regulators; i++) 795 if (rdev[i]) 796 regulator_unregister(rdev[i]); 797 798 return 0; 799 } 800 801 static const struct platform_device_id s5m8767_pmic_id[] = { 802 { "s5m8767-pmic", 0}, 803 { }, 804 }; 805 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id); 806 807 static struct platform_driver s5m8767_pmic_driver = { 808 .driver = { 809 .name = "s5m8767-pmic", 810 .owner = THIS_MODULE, 811 }, 812 .probe = s5m8767_pmic_probe, 813 .remove = s5m8767_pmic_remove, 814 .id_table = s5m8767_pmic_id, 815 }; 816 817 static int __init s5m8767_pmic_init(void) 818 { 819 return platform_driver_register(&s5m8767_pmic_driver); 820 } 821 subsys_initcall(s5m8767_pmic_init); 822 823 static void __exit s5m8767_pmic_exit(void) 824 { 825 platform_driver_unregister(&s5m8767_pmic_driver); 826 } 827 module_exit(s5m8767_pmic_exit); 828 829 /* Module information */ 830 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); 831 MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver"); 832 MODULE_LICENSE("GPL"); 833