1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // Copyright (c) 2011 Samsung Electronics Co., Ltd 4 // http://www.samsung.com 5 6 #include <linux/err.h> 7 #include <linux/of_gpio.h> 8 #include <linux/gpio/consumer.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/regulator/driver.h> 12 #include <linux/regulator/machine.h> 13 #include <linux/mfd/samsung/core.h> 14 #include <linux/mfd/samsung/s5m8767.h> 15 #include <linux/regulator/of_regulator.h> 16 #include <linux/regmap.h> 17 18 #define S5M8767_OPMODE_NORMAL_MODE 0x1 19 20 struct s5m8767_info { 21 struct device *dev; 22 struct sec_pmic_dev *iodev; 23 int num_regulators; 24 struct sec_opmode_data *opmode; 25 26 int ramp_delay; 27 bool buck2_ramp; 28 bool buck3_ramp; 29 bool buck4_ramp; 30 31 bool buck2_gpiodvs; 32 bool buck3_gpiodvs; 33 bool buck4_gpiodvs; 34 u8 buck2_vol[8]; 35 u8 buck3_vol[8]; 36 u8 buck4_vol[8]; 37 int buck_gpios[3]; 38 int buck_ds[3]; 39 int buck_gpioindex; 40 }; 41 42 struct sec_voltage_desc { 43 int max; 44 int min; 45 int step; 46 }; 47 48 static const struct sec_voltage_desc buck_voltage_val1 = { 49 .max = 2225000, 50 .min = 650000, 51 .step = 6250, 52 }; 53 54 static const struct sec_voltage_desc buck_voltage_val2 = { 55 .max = 1600000, 56 .min = 600000, 57 .step = 6250, 58 }; 59 60 static const struct sec_voltage_desc buck_voltage_val3 = { 61 .max = 3000000, 62 .min = 750000, 63 .step = 12500, 64 }; 65 66 static const struct sec_voltage_desc ldo_voltage_val1 = { 67 .max = 3950000, 68 .min = 800000, 69 .step = 50000, 70 }; 71 72 static const struct sec_voltage_desc ldo_voltage_val2 = { 73 .max = 2375000, 74 .min = 800000, 75 .step = 25000, 76 }; 77 78 static const struct sec_voltage_desc *reg_voltage_map[] = { 79 [S5M8767_LDO1] = &ldo_voltage_val2, 80 [S5M8767_LDO2] = &ldo_voltage_val2, 81 [S5M8767_LDO3] = &ldo_voltage_val1, 82 [S5M8767_LDO4] = &ldo_voltage_val1, 83 [S5M8767_LDO5] = &ldo_voltage_val1, 84 [S5M8767_LDO6] = &ldo_voltage_val2, 85 [S5M8767_LDO7] = &ldo_voltage_val2, 86 [S5M8767_LDO8] = &ldo_voltage_val2, 87 [S5M8767_LDO9] = &ldo_voltage_val1, 88 [S5M8767_LDO10] = &ldo_voltage_val1, 89 [S5M8767_LDO11] = &ldo_voltage_val1, 90 [S5M8767_LDO12] = &ldo_voltage_val1, 91 [S5M8767_LDO13] = &ldo_voltage_val1, 92 [S5M8767_LDO14] = &ldo_voltage_val1, 93 [S5M8767_LDO15] = &ldo_voltage_val2, 94 [S5M8767_LDO16] = &ldo_voltage_val1, 95 [S5M8767_LDO17] = &ldo_voltage_val1, 96 [S5M8767_LDO18] = &ldo_voltage_val1, 97 [S5M8767_LDO19] = &ldo_voltage_val1, 98 [S5M8767_LDO20] = &ldo_voltage_val1, 99 [S5M8767_LDO21] = &ldo_voltage_val1, 100 [S5M8767_LDO22] = &ldo_voltage_val1, 101 [S5M8767_LDO23] = &ldo_voltage_val1, 102 [S5M8767_LDO24] = &ldo_voltage_val1, 103 [S5M8767_LDO25] = &ldo_voltage_val1, 104 [S5M8767_LDO26] = &ldo_voltage_val1, 105 [S5M8767_LDO27] = &ldo_voltage_val1, 106 [S5M8767_LDO28] = &ldo_voltage_val1, 107 [S5M8767_BUCK1] = &buck_voltage_val1, 108 [S5M8767_BUCK2] = &buck_voltage_val2, 109 [S5M8767_BUCK3] = &buck_voltage_val2, 110 [S5M8767_BUCK4] = &buck_voltage_val2, 111 [S5M8767_BUCK5] = &buck_voltage_val1, 112 [S5M8767_BUCK6] = &buck_voltage_val1, 113 [S5M8767_BUCK7] = &buck_voltage_val3, 114 [S5M8767_BUCK8] = &buck_voltage_val3, 115 [S5M8767_BUCK9] = &buck_voltage_val3, 116 }; 117 118 static unsigned int s5m8767_opmode_reg[][4] = { 119 /* {OFF, ON, LOWPOWER, SUSPEND} */ 120 /* LDO1 ... LDO28 */ 121 {0x0, 0x3, 0x2, 0x1}, /* LDO1 */ 122 {0x0, 0x3, 0x2, 0x1}, 123 {0x0, 0x3, 0x2, 0x1}, 124 {0x0, 0x0, 0x0, 0x0}, 125 {0x0, 0x3, 0x2, 0x1}, /* LDO5 */ 126 {0x0, 0x3, 0x2, 0x1}, 127 {0x0, 0x3, 0x2, 0x1}, 128 {0x0, 0x3, 0x2, 0x1}, 129 {0x0, 0x3, 0x2, 0x1}, 130 {0x0, 0x3, 0x2, 0x1}, /* LDO10 */ 131 {0x0, 0x3, 0x2, 0x1}, 132 {0x0, 0x3, 0x2, 0x1}, 133 {0x0, 0x3, 0x2, 0x1}, 134 {0x0, 0x3, 0x2, 0x1}, 135 {0x0, 0x3, 0x2, 0x1}, /* LDO15 */ 136 {0x0, 0x3, 0x2, 0x1}, 137 {0x0, 0x3, 0x2, 0x1}, 138 {0x0, 0x0, 0x0, 0x0}, 139 {0x0, 0x3, 0x2, 0x1}, 140 {0x0, 0x3, 0x2, 0x1}, /* LDO20 */ 141 {0x0, 0x3, 0x2, 0x1}, 142 {0x0, 0x3, 0x2, 0x1}, 143 {0x0, 0x0, 0x0, 0x0}, 144 {0x0, 0x3, 0x2, 0x1}, 145 {0x0, 0x3, 0x2, 0x1}, /* LDO25 */ 146 {0x0, 0x3, 0x2, 0x1}, 147 {0x0, 0x3, 0x2, 0x1}, 148 {0x0, 0x3, 0x2, 0x1}, /* LDO28 */ 149 150 /* BUCK1 ... BUCK9 */ 151 {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */ 152 {0x0, 0x3, 0x1, 0x1}, 153 {0x0, 0x3, 0x1, 0x1}, 154 {0x0, 0x3, 0x1, 0x1}, 155 {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */ 156 {0x0, 0x3, 0x1, 0x1}, 157 {0x0, 0x3, 0x1, 0x1}, 158 {0x0, 0x3, 0x1, 0x1}, 159 {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */ 160 }; 161 162 static int s5m8767_get_register(struct s5m8767_info *s5m8767, int reg_id, 163 int *reg, int *enable_ctrl) 164 { 165 int i; 166 unsigned int mode; 167 168 switch (reg_id) { 169 case S5M8767_LDO1 ... S5M8767_LDO2: 170 *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); 171 break; 172 case S5M8767_LDO3 ... S5M8767_LDO28: 173 *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); 174 break; 175 case S5M8767_BUCK1: 176 *reg = S5M8767_REG_BUCK1CTRL1; 177 break; 178 case S5M8767_BUCK2 ... S5M8767_BUCK4: 179 *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9; 180 break; 181 case S5M8767_BUCK5: 182 *reg = S5M8767_REG_BUCK5CTRL1; 183 break; 184 case S5M8767_BUCK6 ... S5M8767_BUCK9: 185 *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2; 186 break; 187 default: 188 return -EINVAL; 189 } 190 191 for (i = 0; i < s5m8767->num_regulators; i++) { 192 if (s5m8767->opmode[i].id == reg_id) { 193 mode = s5m8767->opmode[i].mode; 194 break; 195 } 196 } 197 198 if (i >= s5m8767->num_regulators) 199 return -EINVAL; 200 201 *enable_ctrl = s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT; 202 203 return 0; 204 } 205 206 static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767) 207 { 208 int reg; 209 210 switch (reg_id) { 211 case S5M8767_LDO1 ... S5M8767_LDO2: 212 reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1); 213 break; 214 case S5M8767_LDO3 ... S5M8767_LDO28: 215 reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3); 216 break; 217 case S5M8767_BUCK1: 218 reg = S5M8767_REG_BUCK1CTRL2; 219 break; 220 case S5M8767_BUCK2: 221 reg = S5M8767_REG_BUCK2DVS1; 222 if (s5m8767->buck2_gpiodvs) 223 reg += s5m8767->buck_gpioindex; 224 break; 225 case S5M8767_BUCK3: 226 reg = S5M8767_REG_BUCK3DVS1; 227 if (s5m8767->buck3_gpiodvs) 228 reg += s5m8767->buck_gpioindex; 229 break; 230 case S5M8767_BUCK4: 231 reg = S5M8767_REG_BUCK4DVS1; 232 if (s5m8767->buck4_gpiodvs) 233 reg += s5m8767->buck_gpioindex; 234 break; 235 case S5M8767_BUCK5: 236 reg = S5M8767_REG_BUCK5CTRL2; 237 break; 238 case S5M8767_BUCK6 ... S5M8767_BUCK9: 239 reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2; 240 break; 241 default: 242 return -EINVAL; 243 } 244 245 return reg; 246 } 247 248 static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc, 249 int min_vol) 250 { 251 int selector = 0; 252 253 if (desc == NULL) 254 return -EINVAL; 255 256 if (min_vol > desc->max) 257 return -EINVAL; 258 259 if (min_vol < desc->min) 260 min_vol = desc->min; 261 262 selector = DIV_ROUND_UP(min_vol - desc->min, desc->step); 263 264 if (desc->min + desc->step * selector > desc->max) 265 return -EINVAL; 266 267 return selector; 268 } 269 270 static inline int s5m8767_set_high(struct s5m8767_info *s5m8767) 271 { 272 int temp_index = s5m8767->buck_gpioindex; 273 274 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1); 275 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1); 276 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1); 277 278 return 0; 279 } 280 281 static inline int s5m8767_set_low(struct s5m8767_info *s5m8767) 282 { 283 int temp_index = s5m8767->buck_gpioindex; 284 285 gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1); 286 gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1); 287 gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1); 288 289 return 0; 290 } 291 292 static int s5m8767_set_voltage_sel(struct regulator_dev *rdev, 293 unsigned selector) 294 { 295 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 296 int reg_id = rdev_get_id(rdev); 297 int old_index, index = 0; 298 u8 *buck234_vol = NULL; 299 300 switch (reg_id) { 301 case S5M8767_LDO1 ... S5M8767_LDO28: 302 break; 303 case S5M8767_BUCK1 ... S5M8767_BUCK6: 304 if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs) 305 buck234_vol = &s5m8767->buck2_vol[0]; 306 else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs) 307 buck234_vol = &s5m8767->buck3_vol[0]; 308 else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs) 309 buck234_vol = &s5m8767->buck4_vol[0]; 310 break; 311 case S5M8767_BUCK7 ... S5M8767_BUCK8: 312 return -EINVAL; 313 case S5M8767_BUCK9: 314 break; 315 default: 316 return -EINVAL; 317 } 318 319 /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */ 320 if (buck234_vol) { 321 while (*buck234_vol != selector) { 322 buck234_vol++; 323 index++; 324 } 325 old_index = s5m8767->buck_gpioindex; 326 s5m8767->buck_gpioindex = index; 327 328 if (index > old_index) 329 return s5m8767_set_high(s5m8767); 330 else 331 return s5m8767_set_low(s5m8767); 332 } else { 333 return regulator_set_voltage_sel_regmap(rdev, selector); 334 } 335 } 336 337 static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev, 338 unsigned int old_sel, 339 unsigned int new_sel) 340 { 341 struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev); 342 const struct sec_voltage_desc *desc; 343 int reg_id = rdev_get_id(rdev); 344 345 desc = reg_voltage_map[reg_id]; 346 347 if ((old_sel < new_sel) && s5m8767->ramp_delay) 348 return DIV_ROUND_UP(desc->step * (new_sel - old_sel), 349 s5m8767->ramp_delay * 1000); 350 return 0; 351 } 352 353 static const struct regulator_ops s5m8767_ops = { 354 .list_voltage = regulator_list_voltage_linear, 355 .is_enabled = regulator_is_enabled_regmap, 356 .enable = regulator_enable_regmap, 357 .disable = regulator_disable_regmap, 358 .get_voltage_sel = regulator_get_voltage_sel_regmap, 359 .set_voltage_sel = s5m8767_set_voltage_sel, 360 .set_voltage_time_sel = s5m8767_set_voltage_time_sel, 361 }; 362 363 static const struct regulator_ops s5m8767_buck78_ops = { 364 .list_voltage = regulator_list_voltage_linear, 365 .is_enabled = regulator_is_enabled_regmap, 366 .enable = regulator_enable_regmap, 367 .disable = regulator_disable_regmap, 368 .get_voltage_sel = regulator_get_voltage_sel_regmap, 369 .set_voltage_sel = regulator_set_voltage_sel_regmap, 370 }; 371 372 #define s5m8767_regulator_desc(_name) { \ 373 .name = #_name, \ 374 .id = S5M8767_##_name, \ 375 .ops = &s5m8767_ops, \ 376 .type = REGULATOR_VOLTAGE, \ 377 .owner = THIS_MODULE, \ 378 } 379 380 #define s5m8767_regulator_buck78_desc(_name) { \ 381 .name = #_name, \ 382 .id = S5M8767_##_name, \ 383 .ops = &s5m8767_buck78_ops, \ 384 .type = REGULATOR_VOLTAGE, \ 385 .owner = THIS_MODULE, \ 386 } 387 388 static struct regulator_desc regulators[] = { 389 s5m8767_regulator_desc(LDO1), 390 s5m8767_regulator_desc(LDO2), 391 s5m8767_regulator_desc(LDO3), 392 s5m8767_regulator_desc(LDO4), 393 s5m8767_regulator_desc(LDO5), 394 s5m8767_regulator_desc(LDO6), 395 s5m8767_regulator_desc(LDO7), 396 s5m8767_regulator_desc(LDO8), 397 s5m8767_regulator_desc(LDO9), 398 s5m8767_regulator_desc(LDO10), 399 s5m8767_regulator_desc(LDO11), 400 s5m8767_regulator_desc(LDO12), 401 s5m8767_regulator_desc(LDO13), 402 s5m8767_regulator_desc(LDO14), 403 s5m8767_regulator_desc(LDO15), 404 s5m8767_regulator_desc(LDO16), 405 s5m8767_regulator_desc(LDO17), 406 s5m8767_regulator_desc(LDO18), 407 s5m8767_regulator_desc(LDO19), 408 s5m8767_regulator_desc(LDO20), 409 s5m8767_regulator_desc(LDO21), 410 s5m8767_regulator_desc(LDO22), 411 s5m8767_regulator_desc(LDO23), 412 s5m8767_regulator_desc(LDO24), 413 s5m8767_regulator_desc(LDO25), 414 s5m8767_regulator_desc(LDO26), 415 s5m8767_regulator_desc(LDO27), 416 s5m8767_regulator_desc(LDO28), 417 s5m8767_regulator_desc(BUCK1), 418 s5m8767_regulator_desc(BUCK2), 419 s5m8767_regulator_desc(BUCK3), 420 s5m8767_regulator_desc(BUCK4), 421 s5m8767_regulator_desc(BUCK5), 422 s5m8767_regulator_desc(BUCK6), 423 s5m8767_regulator_buck78_desc(BUCK7), 424 s5m8767_regulator_buck78_desc(BUCK8), 425 s5m8767_regulator_desc(BUCK9), 426 }; 427 428 /* 429 * Enable GPIO control over BUCK9 in regulator_config for that regulator. 430 */ 431 static void s5m8767_regulator_config_ext_control(struct s5m8767_info *s5m8767, 432 struct sec_regulator_data *rdata, 433 struct regulator_config *config) 434 { 435 int i, mode = 0; 436 437 if (rdata->id != S5M8767_BUCK9) 438 return; 439 440 /* Check if opmode for regulator matches S5M8767_ENCTRL_USE_GPIO */ 441 for (i = 0; i < s5m8767->num_regulators; i++) { 442 const struct sec_opmode_data *opmode = &s5m8767->opmode[i]; 443 if (opmode->id == rdata->id) { 444 mode = s5m8767_opmode_reg[rdata->id][opmode->mode]; 445 break; 446 } 447 } 448 if (mode != S5M8767_ENCTRL_USE_GPIO) { 449 dev_warn(s5m8767->dev, 450 "ext-control for %pOFn: mismatched op_mode (%x), ignoring\n", 451 rdata->reg_node, mode); 452 return; 453 } 454 455 if (!rdata->ext_control_gpiod) { 456 dev_warn(s5m8767->dev, 457 "ext-control for %pOFn: GPIO not valid, ignoring\n", 458 rdata->reg_node); 459 return; 460 } 461 462 config->ena_gpiod = rdata->ext_control_gpiod; 463 } 464 465 /* 466 * Turn on GPIO control over BUCK9. 467 */ 468 static int s5m8767_enable_ext_control(struct s5m8767_info *s5m8767, 469 struct regulator_dev *rdev) 470 { 471 int id = rdev_get_id(rdev); 472 int ret, reg, enable_ctrl; 473 474 if (id != S5M8767_BUCK9) 475 return -EINVAL; 476 477 ret = s5m8767_get_register(s5m8767, id, ®, &enable_ctrl); 478 if (ret) 479 return ret; 480 481 return regmap_update_bits(s5m8767->iodev->regmap_pmic, 482 reg, S5M8767_ENCTRL_MASK, 483 S5M8767_ENCTRL_USE_GPIO << S5M8767_ENCTRL_SHIFT); 484 } 485 486 487 #ifdef CONFIG_OF 488 static int s5m8767_pmic_dt_parse_dvs_gpio(struct sec_pmic_dev *iodev, 489 struct sec_platform_data *pdata, 490 struct device_node *pmic_np) 491 { 492 int i, gpio; 493 494 for (i = 0; i < 3; i++) { 495 gpio = of_get_named_gpio(pmic_np, 496 "s5m8767,pmic-buck-dvs-gpios", i); 497 if (!gpio_is_valid(gpio)) { 498 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio); 499 return -EINVAL; 500 } 501 pdata->buck_gpios[i] = gpio; 502 } 503 return 0; 504 } 505 506 static int s5m8767_pmic_dt_parse_ds_gpio(struct sec_pmic_dev *iodev, 507 struct sec_platform_data *pdata, 508 struct device_node *pmic_np) 509 { 510 int i, gpio; 511 512 for (i = 0; i < 3; i++) { 513 gpio = of_get_named_gpio(pmic_np, 514 "s5m8767,pmic-buck-ds-gpios", i); 515 if (!gpio_is_valid(gpio)) { 516 dev_err(iodev->dev, "invalid gpio[%d]: %d\n", i, gpio); 517 return -EINVAL; 518 } 519 pdata->buck_ds[i] = gpio; 520 } 521 return 0; 522 } 523 524 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, 525 struct sec_platform_data *pdata) 526 { 527 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 528 struct device_node *pmic_np, *regulators_np, *reg_np; 529 struct sec_regulator_data *rdata; 530 struct sec_opmode_data *rmode; 531 unsigned int i, dvs_voltage_nr = 8, ret; 532 533 pmic_np = iodev->dev->of_node; 534 if (!pmic_np) { 535 dev_err(iodev->dev, "could not find pmic sub-node\n"); 536 return -ENODEV; 537 } 538 539 regulators_np = of_get_child_by_name(pmic_np, "regulators"); 540 if (!regulators_np) { 541 dev_err(iodev->dev, "could not find regulators sub-node\n"); 542 return -EINVAL; 543 } 544 545 /* count the number of regulators to be supported in pmic */ 546 pdata->num_regulators = of_get_child_count(regulators_np); 547 548 rdata = devm_kcalloc(&pdev->dev, 549 pdata->num_regulators, sizeof(*rdata), 550 GFP_KERNEL); 551 if (!rdata) 552 return -ENOMEM; 553 554 rmode = devm_kcalloc(&pdev->dev, 555 pdata->num_regulators, sizeof(*rmode), 556 GFP_KERNEL); 557 if (!rmode) 558 return -ENOMEM; 559 560 pdata->regulators = rdata; 561 pdata->opmode = rmode; 562 for_each_child_of_node(regulators_np, reg_np) { 563 for (i = 0; i < ARRAY_SIZE(regulators); i++) 564 if (!of_node_cmp(reg_np->name, regulators[i].name)) 565 break; 566 567 if (i == ARRAY_SIZE(regulators)) { 568 dev_warn(iodev->dev, 569 "don't know how to configure regulator %pOFn\n", 570 reg_np); 571 continue; 572 } 573 574 rdata->ext_control_gpiod = devm_gpiod_get_from_of_node( 575 &pdev->dev, 576 reg_np, 577 "s5m8767,pmic-ext-control-gpios", 578 0, 579 GPIOD_OUT_HIGH | GPIOD_FLAGS_BIT_NONEXCLUSIVE, 580 "s5m8767"); 581 if (IS_ERR(rdata->ext_control_gpiod)) 582 return PTR_ERR(rdata->ext_control_gpiod); 583 584 rdata->id = i; 585 rdata->initdata = of_get_regulator_init_data( 586 &pdev->dev, reg_np, 587 ®ulators[i]); 588 rdata->reg_node = reg_np; 589 rdata++; 590 rmode->id = i; 591 if (of_property_read_u32(reg_np, "op_mode", 592 &rmode->mode)) { 593 dev_warn(iodev->dev, 594 "no op_mode property property at %pOF\n", 595 reg_np); 596 597 rmode->mode = S5M8767_OPMODE_NORMAL_MODE; 598 } 599 rmode++; 600 } 601 602 of_node_put(regulators_np); 603 604 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-uses-gpio-dvs", NULL)) { 605 pdata->buck2_gpiodvs = true; 606 607 if (of_property_read_u32_array(pmic_np, 608 "s5m8767,pmic-buck2-dvs-voltage", 609 pdata->buck2_voltage, dvs_voltage_nr)) { 610 dev_err(iodev->dev, "buck2 voltages not specified\n"); 611 return -EINVAL; 612 } 613 } 614 615 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-uses-gpio-dvs", NULL)) { 616 pdata->buck3_gpiodvs = true; 617 618 if (of_property_read_u32_array(pmic_np, 619 "s5m8767,pmic-buck3-dvs-voltage", 620 pdata->buck3_voltage, dvs_voltage_nr)) { 621 dev_err(iodev->dev, "buck3 voltages not specified\n"); 622 return -EINVAL; 623 } 624 } 625 626 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-uses-gpio-dvs", NULL)) { 627 pdata->buck4_gpiodvs = true; 628 629 if (of_property_read_u32_array(pmic_np, 630 "s5m8767,pmic-buck4-dvs-voltage", 631 pdata->buck4_voltage, dvs_voltage_nr)) { 632 dev_err(iodev->dev, "buck4 voltages not specified\n"); 633 return -EINVAL; 634 } 635 } 636 637 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 638 pdata->buck4_gpiodvs) { 639 ret = s5m8767_pmic_dt_parse_dvs_gpio(iodev, pdata, pmic_np); 640 if (ret) 641 return -EINVAL; 642 643 if (of_property_read_u32(pmic_np, 644 "s5m8767,pmic-buck-default-dvs-idx", 645 &pdata->buck_default_idx)) { 646 pdata->buck_default_idx = 0; 647 } else { 648 if (pdata->buck_default_idx >= 8) { 649 pdata->buck_default_idx = 0; 650 dev_info(iodev->dev, 651 "invalid value for default dvs index, use 0\n"); 652 } 653 } 654 } 655 656 ret = s5m8767_pmic_dt_parse_ds_gpio(iodev, pdata, pmic_np); 657 if (ret) 658 return -EINVAL; 659 660 if (of_get_property(pmic_np, "s5m8767,pmic-buck2-ramp-enable", NULL)) 661 pdata->buck2_ramp_enable = true; 662 663 if (of_get_property(pmic_np, "s5m8767,pmic-buck3-ramp-enable", NULL)) 664 pdata->buck3_ramp_enable = true; 665 666 if (of_get_property(pmic_np, "s5m8767,pmic-buck4-ramp-enable", NULL)) 667 pdata->buck4_ramp_enable = true; 668 669 if (pdata->buck2_ramp_enable || pdata->buck3_ramp_enable 670 || pdata->buck4_ramp_enable) { 671 if (of_property_read_u32(pmic_np, "s5m8767,pmic-buck-ramp-delay", 672 &pdata->buck_ramp_delay)) 673 pdata->buck_ramp_delay = 0; 674 } 675 676 return 0; 677 } 678 #else 679 static int s5m8767_pmic_dt_parse_pdata(struct platform_device *pdev, 680 struct sec_platform_data *pdata) 681 { 682 return 0; 683 } 684 #endif /* CONFIG_OF */ 685 686 static int s5m8767_pmic_probe(struct platform_device *pdev) 687 { 688 struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent); 689 struct sec_platform_data *pdata = iodev->pdata; 690 struct regulator_config config = { }; 691 struct s5m8767_info *s5m8767; 692 int i, ret, buck_init; 693 694 if (!pdata) { 695 dev_err(pdev->dev.parent, "Platform data not supplied\n"); 696 return -ENODEV; 697 } 698 699 if (iodev->dev->of_node) { 700 ret = s5m8767_pmic_dt_parse_pdata(pdev, pdata); 701 if (ret) 702 return ret; 703 } 704 705 if (pdata->buck2_gpiodvs) { 706 if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) { 707 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 708 return -EINVAL; 709 } 710 } 711 712 if (pdata->buck3_gpiodvs) { 713 if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) { 714 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 715 return -EINVAL; 716 } 717 } 718 719 if (pdata->buck4_gpiodvs) { 720 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) { 721 dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n"); 722 return -EINVAL; 723 } 724 } 725 726 s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info), 727 GFP_KERNEL); 728 if (!s5m8767) 729 return -ENOMEM; 730 731 s5m8767->dev = &pdev->dev; 732 s5m8767->iodev = iodev; 733 s5m8767->num_regulators = pdata->num_regulators; 734 platform_set_drvdata(pdev, s5m8767); 735 736 s5m8767->buck_gpioindex = pdata->buck_default_idx; 737 s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs; 738 s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs; 739 s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs; 740 s5m8767->buck_gpios[0] = pdata->buck_gpios[0]; 741 s5m8767->buck_gpios[1] = pdata->buck_gpios[1]; 742 s5m8767->buck_gpios[2] = pdata->buck_gpios[2]; 743 s5m8767->buck_ds[0] = pdata->buck_ds[0]; 744 s5m8767->buck_ds[1] = pdata->buck_ds[1]; 745 s5m8767->buck_ds[2] = pdata->buck_ds[2]; 746 747 s5m8767->ramp_delay = pdata->buck_ramp_delay; 748 s5m8767->buck2_ramp = pdata->buck2_ramp_enable; 749 s5m8767->buck3_ramp = pdata->buck3_ramp_enable; 750 s5m8767->buck4_ramp = pdata->buck4_ramp_enable; 751 s5m8767->opmode = pdata->opmode; 752 753 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 754 pdata->buck2_init); 755 756 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2, 757 buck_init); 758 759 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 760 pdata->buck3_init); 761 762 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2, 763 buck_init); 764 765 buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2, 766 pdata->buck4_init); 767 768 regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2, 769 buck_init); 770 771 for (i = 0; i < 8; i++) { 772 if (s5m8767->buck2_gpiodvs) { 773 s5m8767->buck2_vol[i] = 774 s5m8767_convert_voltage_to_sel( 775 &buck_voltage_val2, 776 pdata->buck2_voltage[i]); 777 } 778 779 if (s5m8767->buck3_gpiodvs) { 780 s5m8767->buck3_vol[i] = 781 s5m8767_convert_voltage_to_sel( 782 &buck_voltage_val2, 783 pdata->buck3_voltage[i]); 784 } 785 786 if (s5m8767->buck4_gpiodvs) { 787 s5m8767->buck4_vol[i] = 788 s5m8767_convert_voltage_to_sel( 789 &buck_voltage_val2, 790 pdata->buck4_voltage[i]); 791 } 792 } 793 794 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 795 pdata->buck4_gpiodvs) { 796 797 if (!gpio_is_valid(pdata->buck_gpios[0]) || 798 !gpio_is_valid(pdata->buck_gpios[1]) || 799 !gpio_is_valid(pdata->buck_gpios[2])) { 800 dev_err(&pdev->dev, "GPIO NOT VALID\n"); 801 return -EINVAL; 802 } 803 804 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0], 805 "S5M8767 SET1"); 806 if (ret) 807 return ret; 808 809 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1], 810 "S5M8767 SET2"); 811 if (ret) 812 return ret; 813 814 ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2], 815 "S5M8767 SET3"); 816 if (ret) 817 return ret; 818 819 /* SET1 GPIO */ 820 gpio_direction_output(pdata->buck_gpios[0], 821 (s5m8767->buck_gpioindex >> 2) & 0x1); 822 /* SET2 GPIO */ 823 gpio_direction_output(pdata->buck_gpios[1], 824 (s5m8767->buck_gpioindex >> 1) & 0x1); 825 /* SET3 GPIO */ 826 gpio_direction_output(pdata->buck_gpios[2], 827 (s5m8767->buck_gpioindex >> 0) & 0x1); 828 } 829 830 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2"); 831 if (ret) 832 return ret; 833 834 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3"); 835 if (ret) 836 return ret; 837 838 ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4"); 839 if (ret) 840 return ret; 841 842 /* DS2 GPIO */ 843 gpio_direction_output(pdata->buck_ds[0], 0x0); 844 /* DS3 GPIO */ 845 gpio_direction_output(pdata->buck_ds[1], 0x0); 846 /* DS4 GPIO */ 847 gpio_direction_output(pdata->buck_ds[2], 0x0); 848 849 if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs || 850 pdata->buck4_gpiodvs) { 851 regmap_update_bits(s5m8767->iodev->regmap_pmic, 852 S5M8767_REG_BUCK2CTRL, 1 << 1, 853 (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1)); 854 regmap_update_bits(s5m8767->iodev->regmap_pmic, 855 S5M8767_REG_BUCK3CTRL, 1 << 1, 856 (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1)); 857 regmap_update_bits(s5m8767->iodev->regmap_pmic, 858 S5M8767_REG_BUCK4CTRL, 1 << 1, 859 (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1)); 860 } 861 862 /* Initialize GPIO DVS registers */ 863 for (i = 0; i < 8; i++) { 864 if (s5m8767->buck2_gpiodvs) { 865 regmap_write(s5m8767->iodev->regmap_pmic, 866 S5M8767_REG_BUCK2DVS1 + i, 867 s5m8767->buck2_vol[i]); 868 } 869 870 if (s5m8767->buck3_gpiodvs) { 871 regmap_write(s5m8767->iodev->regmap_pmic, 872 S5M8767_REG_BUCK3DVS1 + i, 873 s5m8767->buck3_vol[i]); 874 } 875 876 if (s5m8767->buck4_gpiodvs) { 877 regmap_write(s5m8767->iodev->regmap_pmic, 878 S5M8767_REG_BUCK4DVS1 + i, 879 s5m8767->buck4_vol[i]); 880 } 881 } 882 883 if (s5m8767->buck2_ramp) 884 regmap_update_bits(s5m8767->iodev->regmap_pmic, 885 S5M8767_REG_DVSRAMP, 0x08, 0x08); 886 887 if (s5m8767->buck3_ramp) 888 regmap_update_bits(s5m8767->iodev->regmap_pmic, 889 S5M8767_REG_DVSRAMP, 0x04, 0x04); 890 891 if (s5m8767->buck4_ramp) 892 regmap_update_bits(s5m8767->iodev->regmap_pmic, 893 S5M8767_REG_DVSRAMP, 0x02, 0x02); 894 895 if (s5m8767->buck2_ramp || s5m8767->buck3_ramp 896 || s5m8767->buck4_ramp) { 897 unsigned int val; 898 switch (s5m8767->ramp_delay) { 899 case 5: 900 val = S5M8767_DVS_BUCK_RAMP_5; 901 break; 902 case 10: 903 val = S5M8767_DVS_BUCK_RAMP_10; 904 break; 905 case 25: 906 val = S5M8767_DVS_BUCK_RAMP_25; 907 break; 908 case 50: 909 val = S5M8767_DVS_BUCK_RAMP_50; 910 break; 911 case 100: 912 val = S5M8767_DVS_BUCK_RAMP_100; 913 break; 914 default: 915 val = S5M8767_DVS_BUCK_RAMP_10; 916 } 917 regmap_update_bits(s5m8767->iodev->regmap_pmic, 918 S5M8767_REG_DVSRAMP, 919 S5M8767_DVS_BUCK_RAMP_MASK, 920 val << S5M8767_DVS_BUCK_RAMP_SHIFT); 921 } 922 923 for (i = 0; i < pdata->num_regulators; i++) { 924 const struct sec_voltage_desc *desc; 925 int id = pdata->regulators[i].id; 926 int enable_reg, enable_val; 927 struct regulator_dev *rdev; 928 929 desc = reg_voltage_map[id]; 930 if (desc) { 931 regulators[id].n_voltages = 932 (desc->max - desc->min) / desc->step + 1; 933 regulators[id].min_uV = desc->min; 934 regulators[id].uV_step = desc->step; 935 regulators[id].vsel_reg = 936 s5m8767_get_vsel_reg(id, s5m8767); 937 if (id < S5M8767_BUCK1) 938 regulators[id].vsel_mask = 0x3f; 939 else 940 regulators[id].vsel_mask = 0xff; 941 942 ret = s5m8767_get_register(s5m8767, id, &enable_reg, 943 &enable_val); 944 if (ret) { 945 dev_err(s5m8767->dev, "error reading registers\n"); 946 return ret; 947 } 948 regulators[id].enable_reg = enable_reg; 949 regulators[id].enable_mask = S5M8767_ENCTRL_MASK; 950 regulators[id].enable_val = enable_val; 951 } 952 953 config.dev = s5m8767->dev; 954 config.init_data = pdata->regulators[i].initdata; 955 config.driver_data = s5m8767; 956 config.regmap = iodev->regmap_pmic; 957 config.of_node = pdata->regulators[i].reg_node; 958 config.ena_gpiod = NULL; 959 if (pdata->regulators[i].ext_control_gpiod) 960 s5m8767_regulator_config_ext_control(s5m8767, 961 &pdata->regulators[i], &config); 962 963 rdev = devm_regulator_register(&pdev->dev, ®ulators[id], 964 &config); 965 if (IS_ERR(rdev)) { 966 ret = PTR_ERR(rdev); 967 dev_err(s5m8767->dev, "regulator init failed for %d\n", 968 id); 969 return ret; 970 } 971 972 if (pdata->regulators[i].ext_control_gpiod) { 973 ret = s5m8767_enable_ext_control(s5m8767, rdev); 974 if (ret < 0) { 975 dev_err(s5m8767->dev, 976 "failed to enable gpio control over %s: %d\n", 977 rdev->desc->name, ret); 978 return ret; 979 } 980 } 981 } 982 983 return 0; 984 } 985 986 static const struct platform_device_id s5m8767_pmic_id[] = { 987 { "s5m8767-pmic", 0}, 988 { }, 989 }; 990 MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id); 991 992 static struct platform_driver s5m8767_pmic_driver = { 993 .driver = { 994 .name = "s5m8767-pmic", 995 }, 996 .probe = s5m8767_pmic_probe, 997 .id_table = s5m8767_pmic_id, 998 }; 999 1000 static int __init s5m8767_pmic_init(void) 1001 { 1002 return platform_driver_register(&s5m8767_pmic_driver); 1003 } 1004 subsys_initcall(s5m8767_pmic_init); 1005 1006 static void __exit s5m8767_pmic_exit(void) 1007 { 1008 platform_driver_unregister(&s5m8767_pmic_driver); 1009 } 1010 module_exit(s5m8767_pmic_exit); 1011 1012 /* Module information */ 1013 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); 1014 MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver"); 1015 MODULE_LICENSE("GPL"); 1016