1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2012-2015, The Linux Foundation. All rights reserved. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/delay.h> 8 #include <linux/err.h> 9 #include <linux/kernel.h> 10 #include <linux/interrupt.h> 11 #include <linux/bitops.h> 12 #include <linux/slab.h> 13 #include <linux/of.h> 14 #include <linux/of_device.h> 15 #include <linux/platform_device.h> 16 #include <linux/ktime.h> 17 #include <linux/regulator/driver.h> 18 #include <linux/regmap.h> 19 #include <linux/list.h> 20 #include <linux/mfd/syscon.h> 21 #include <linux/io.h> 22 23 /* Pin control enable input pins. */ 24 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x00 25 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x01 26 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x02 27 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x04 28 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x08 29 #define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x10 30 31 /* Pin control high power mode input pins. */ 32 #define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x00 33 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x01 34 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x02 35 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x04 36 #define SPMI_REGULATOR_PIN_CTRL_HPM_EN3 0x08 37 #define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x10 38 #define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x20 39 40 /* 41 * Used with enable parameters to specify that hardware default register values 42 * should be left unaltered. 43 */ 44 #define SPMI_REGULATOR_USE_HW_DEFAULT 2 45 46 /* Soft start strength of a voltage switch type regulator */ 47 enum spmi_vs_soft_start_str { 48 SPMI_VS_SOFT_START_STR_0P05_UA = 0, 49 SPMI_VS_SOFT_START_STR_0P25_UA, 50 SPMI_VS_SOFT_START_STR_0P55_UA, 51 SPMI_VS_SOFT_START_STR_0P75_UA, 52 SPMI_VS_SOFT_START_STR_HW_DEFAULT, 53 }; 54 55 /** 56 * struct spmi_regulator_init_data - spmi-regulator initialization data 57 * @pin_ctrl_enable: Bit mask specifying which hardware pins should be 58 * used to enable the regulator, if any 59 * Value should be an ORing of 60 * SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants. If 61 * the bit specified by 62 * SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is 63 * set, then pin control enable hardware registers 64 * will not be modified. 65 * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be 66 * used to force the regulator into high power 67 * mode, if any 68 * Value should be an ORing of 69 * SPMI_REGULATOR_PIN_CTRL_HPM_* constants. If 70 * the bit specified by 71 * SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is 72 * set, then pin control mode hardware registers 73 * will not be modified. 74 * @vs_soft_start_strength: This parameter sets the soft start strength for 75 * voltage switch type regulators. Its value 76 * should be one of SPMI_VS_SOFT_START_STR_*. If 77 * its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT, 78 * then the soft start strength will be left at its 79 * default hardware value. 80 */ 81 struct spmi_regulator_init_data { 82 unsigned pin_ctrl_enable; 83 unsigned pin_ctrl_hpm; 84 enum spmi_vs_soft_start_str vs_soft_start_strength; 85 }; 86 87 /* These types correspond to unique register layouts. */ 88 enum spmi_regulator_logical_type { 89 SPMI_REGULATOR_LOGICAL_TYPE_SMPS, 90 SPMI_REGULATOR_LOGICAL_TYPE_LDO, 91 SPMI_REGULATOR_LOGICAL_TYPE_VS, 92 SPMI_REGULATOR_LOGICAL_TYPE_BOOST, 93 SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS, 94 SPMI_REGULATOR_LOGICAL_TYPE_BOOST_BYP, 95 SPMI_REGULATOR_LOGICAL_TYPE_LN_LDO, 96 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS, 97 SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS, 98 SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO, 99 }; 100 101 enum spmi_regulator_type { 102 SPMI_REGULATOR_TYPE_BUCK = 0x03, 103 SPMI_REGULATOR_TYPE_LDO = 0x04, 104 SPMI_REGULATOR_TYPE_VS = 0x05, 105 SPMI_REGULATOR_TYPE_BOOST = 0x1b, 106 SPMI_REGULATOR_TYPE_FTS = 0x1c, 107 SPMI_REGULATOR_TYPE_BOOST_BYP = 0x1f, 108 SPMI_REGULATOR_TYPE_ULT_LDO = 0x21, 109 SPMI_REGULATOR_TYPE_ULT_BUCK = 0x22, 110 }; 111 112 enum spmi_regulator_subtype { 113 SPMI_REGULATOR_SUBTYPE_GP_CTL = 0x08, 114 SPMI_REGULATOR_SUBTYPE_RF_CTL = 0x09, 115 SPMI_REGULATOR_SUBTYPE_N50 = 0x01, 116 SPMI_REGULATOR_SUBTYPE_N150 = 0x02, 117 SPMI_REGULATOR_SUBTYPE_N300 = 0x03, 118 SPMI_REGULATOR_SUBTYPE_N600 = 0x04, 119 SPMI_REGULATOR_SUBTYPE_N1200 = 0x05, 120 SPMI_REGULATOR_SUBTYPE_N600_ST = 0x06, 121 SPMI_REGULATOR_SUBTYPE_N1200_ST = 0x07, 122 SPMI_REGULATOR_SUBTYPE_N900_ST = 0x14, 123 SPMI_REGULATOR_SUBTYPE_N300_ST = 0x15, 124 SPMI_REGULATOR_SUBTYPE_P50 = 0x08, 125 SPMI_REGULATOR_SUBTYPE_P150 = 0x09, 126 SPMI_REGULATOR_SUBTYPE_P300 = 0x0a, 127 SPMI_REGULATOR_SUBTYPE_P600 = 0x0b, 128 SPMI_REGULATOR_SUBTYPE_P1200 = 0x0c, 129 SPMI_REGULATOR_SUBTYPE_LN = 0x10, 130 SPMI_REGULATOR_SUBTYPE_LV_P50 = 0x28, 131 SPMI_REGULATOR_SUBTYPE_LV_P150 = 0x29, 132 SPMI_REGULATOR_SUBTYPE_LV_P300 = 0x2a, 133 SPMI_REGULATOR_SUBTYPE_LV_P600 = 0x2b, 134 SPMI_REGULATOR_SUBTYPE_LV_P1200 = 0x2c, 135 SPMI_REGULATOR_SUBTYPE_LV_P450 = 0x2d, 136 SPMI_REGULATOR_SUBTYPE_LV100 = 0x01, 137 SPMI_REGULATOR_SUBTYPE_LV300 = 0x02, 138 SPMI_REGULATOR_SUBTYPE_MV300 = 0x08, 139 SPMI_REGULATOR_SUBTYPE_MV500 = 0x09, 140 SPMI_REGULATOR_SUBTYPE_HDMI = 0x10, 141 SPMI_REGULATOR_SUBTYPE_OTG = 0x11, 142 SPMI_REGULATOR_SUBTYPE_5V_BOOST = 0x01, 143 SPMI_REGULATOR_SUBTYPE_FTS_CTL = 0x08, 144 SPMI_REGULATOR_SUBTYPE_FTS2p5_CTL = 0x09, 145 SPMI_REGULATOR_SUBTYPE_BB_2A = 0x01, 146 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL1 = 0x0d, 147 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL2 = 0x0e, 148 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL3 = 0x0f, 149 SPMI_REGULATOR_SUBTYPE_ULT_HF_CTL4 = 0x10, 150 }; 151 152 enum spmi_common_regulator_registers { 153 SPMI_COMMON_REG_DIG_MAJOR_REV = 0x01, 154 SPMI_COMMON_REG_TYPE = 0x04, 155 SPMI_COMMON_REG_SUBTYPE = 0x05, 156 SPMI_COMMON_REG_VOLTAGE_RANGE = 0x40, 157 SPMI_COMMON_REG_VOLTAGE_SET = 0x41, 158 SPMI_COMMON_REG_MODE = 0x45, 159 SPMI_COMMON_REG_ENABLE = 0x46, 160 SPMI_COMMON_REG_PULL_DOWN = 0x48, 161 SPMI_COMMON_REG_SOFT_START = 0x4c, 162 SPMI_COMMON_REG_STEP_CTRL = 0x61, 163 }; 164 165 enum spmi_vs_registers { 166 SPMI_VS_REG_OCP = 0x4a, 167 SPMI_VS_REG_SOFT_START = 0x4c, 168 }; 169 170 enum spmi_boost_registers { 171 SPMI_BOOST_REG_CURRENT_LIMIT = 0x4a, 172 }; 173 174 enum spmi_boost_byp_registers { 175 SPMI_BOOST_BYP_REG_CURRENT_LIMIT = 0x4b, 176 }; 177 178 enum spmi_saw3_registers { 179 SAW3_SECURE = 0x00, 180 SAW3_ID = 0x04, 181 SAW3_SPM_STS = 0x0C, 182 SAW3_AVS_STS = 0x10, 183 SAW3_PMIC_STS = 0x14, 184 SAW3_RST = 0x18, 185 SAW3_VCTL = 0x1C, 186 SAW3_AVS_CTL = 0x20, 187 SAW3_AVS_LIMIT = 0x24, 188 SAW3_AVS_DLY = 0x28, 189 SAW3_AVS_HYSTERESIS = 0x2C, 190 SAW3_SPM_STS2 = 0x38, 191 SAW3_SPM_PMIC_DATA_3 = 0x4C, 192 SAW3_VERSION = 0xFD0, 193 }; 194 195 /* Used for indexing into ctrl_reg. These are offets from 0x40 */ 196 enum spmi_common_control_register_index { 197 SPMI_COMMON_IDX_VOLTAGE_RANGE = 0, 198 SPMI_COMMON_IDX_VOLTAGE_SET = 1, 199 SPMI_COMMON_IDX_MODE = 5, 200 SPMI_COMMON_IDX_ENABLE = 6, 201 }; 202 203 /* Common regulator control register layout */ 204 #define SPMI_COMMON_ENABLE_MASK 0x80 205 #define SPMI_COMMON_ENABLE 0x80 206 #define SPMI_COMMON_DISABLE 0x00 207 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN3_MASK 0x08 208 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN2_MASK 0x04 209 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN1_MASK 0x02 210 #define SPMI_COMMON_ENABLE_FOLLOW_HW_EN0_MASK 0x01 211 #define SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK 0x0f 212 213 /* Common regulator mode register layout */ 214 #define SPMI_COMMON_MODE_HPM_MASK 0x80 215 #define SPMI_COMMON_MODE_AUTO_MASK 0x40 216 #define SPMI_COMMON_MODE_BYPASS_MASK 0x20 217 #define SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK 0x10 218 #define SPMI_COMMON_MODE_FOLLOW_HW_EN3_MASK 0x08 219 #define SPMI_COMMON_MODE_FOLLOW_HW_EN2_MASK 0x04 220 #define SPMI_COMMON_MODE_FOLLOW_HW_EN1_MASK 0x02 221 #define SPMI_COMMON_MODE_FOLLOW_HW_EN0_MASK 0x01 222 #define SPMI_COMMON_MODE_FOLLOW_ALL_MASK 0x1f 223 224 /* Common regulator pull down control register layout */ 225 #define SPMI_COMMON_PULL_DOWN_ENABLE_MASK 0x80 226 227 /* LDO regulator current limit control register layout */ 228 #define SPMI_LDO_CURRENT_LIMIT_ENABLE_MASK 0x80 229 230 /* LDO regulator soft start control register layout */ 231 #define SPMI_LDO_SOFT_START_ENABLE_MASK 0x80 232 233 /* VS regulator over current protection control register layout */ 234 #define SPMI_VS_OCP_OVERRIDE 0x01 235 #define SPMI_VS_OCP_NO_OVERRIDE 0x00 236 237 /* VS regulator soft start control register layout */ 238 #define SPMI_VS_SOFT_START_ENABLE_MASK 0x80 239 #define SPMI_VS_SOFT_START_SEL_MASK 0x03 240 241 /* Boost regulator current limit control register layout */ 242 #define SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK 0x80 243 #define SPMI_BOOST_CURRENT_LIMIT_MASK 0x07 244 245 #define SPMI_VS_OCP_DEFAULT_MAX_RETRIES 10 246 #define SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS 30 247 #define SPMI_VS_OCP_FALL_DELAY_US 90 248 #define SPMI_VS_OCP_FAULT_DELAY_US 20000 249 250 #define SPMI_FTSMPS_STEP_CTRL_STEP_MASK 0x18 251 #define SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT 3 252 #define SPMI_FTSMPS_STEP_CTRL_DELAY_MASK 0x07 253 #define SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT 0 254 255 /* Clock rate in kHz of the FTSMPS regulator reference clock. */ 256 #define SPMI_FTSMPS_CLOCK_RATE 19200 257 258 /* Minimum voltage stepper delay for each step. */ 259 #define SPMI_FTSMPS_STEP_DELAY 8 260 #define SPMI_DEFAULT_STEP_DELAY 20 261 262 /* 263 * The ratio SPMI_FTSMPS_STEP_MARGIN_NUM/SPMI_FTSMPS_STEP_MARGIN_DEN is used to 264 * adjust the step rate in order to account for oscillator variance. 265 */ 266 #define SPMI_FTSMPS_STEP_MARGIN_NUM 4 267 #define SPMI_FTSMPS_STEP_MARGIN_DEN 5 268 269 /* VSET value to decide the range of ULT SMPS */ 270 #define ULT_SMPS_RANGE_SPLIT 0x60 271 272 /** 273 * struct spmi_voltage_range - regulator set point voltage mapping description 274 * @min_uV: Minimum programmable output voltage resulting from 275 * set point register value 0x00 276 * @max_uV: Maximum programmable output voltage 277 * @step_uV: Output voltage increase resulting from the set point 278 * register value increasing by 1 279 * @set_point_min_uV: Minimum allowed voltage 280 * @set_point_max_uV: Maximum allowed voltage. This may be tweaked in order 281 * to pick which range should be used in the case of 282 * overlapping set points. 283 * @n_voltages: Number of preferred voltage set points present in this 284 * range 285 * @range_sel: Voltage range register value corresponding to this range 286 * 287 * The following relationships must be true for the values used in this struct: 288 * (max_uV - min_uV) % step_uV == 0 289 * (set_point_min_uV - min_uV) % step_uV == 0* 290 * (set_point_max_uV - min_uV) % step_uV == 0* 291 * n_voltages = (set_point_max_uV - set_point_min_uV) / step_uV + 1 292 * 293 * *Note, set_point_min_uV == set_point_max_uV == 0 is allowed in order to 294 * specify that the voltage range has meaning, but is not preferred. 295 */ 296 struct spmi_voltage_range { 297 int min_uV; 298 int max_uV; 299 int step_uV; 300 int set_point_min_uV; 301 int set_point_max_uV; 302 unsigned n_voltages; 303 u8 range_sel; 304 }; 305 306 /* 307 * The ranges specified in the spmi_voltage_set_points struct must be listed 308 * so that range[i].set_point_max_uV < range[i+1].set_point_min_uV. 309 */ 310 struct spmi_voltage_set_points { 311 struct spmi_voltage_range *range; 312 int count; 313 unsigned n_voltages; 314 }; 315 316 struct spmi_regulator { 317 struct regulator_desc desc; 318 struct device *dev; 319 struct delayed_work ocp_work; 320 struct regmap *regmap; 321 struct spmi_voltage_set_points *set_points; 322 enum spmi_regulator_logical_type logical_type; 323 int ocp_irq; 324 int ocp_count; 325 int ocp_max_retries; 326 int ocp_retry_delay_ms; 327 int hpm_min_load; 328 int slew_rate; 329 ktime_t vs_enable_time; 330 u16 base; 331 struct list_head node; 332 }; 333 334 struct spmi_regulator_mapping { 335 enum spmi_regulator_type type; 336 enum spmi_regulator_subtype subtype; 337 enum spmi_regulator_logical_type logical_type; 338 u32 revision_min; 339 u32 revision_max; 340 struct regulator_ops *ops; 341 struct spmi_voltage_set_points *set_points; 342 int hpm_min_load; 343 }; 344 345 struct spmi_regulator_data { 346 const char *name; 347 u16 base; 348 const char *supply; 349 const char *ocp; 350 u16 force_type; 351 }; 352 353 #define SPMI_VREG(_type, _subtype, _dig_major_min, _dig_major_max, \ 354 _logical_type, _ops_val, _set_points_val, _hpm_min_load) \ 355 { \ 356 .type = SPMI_REGULATOR_TYPE_##_type, \ 357 .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ 358 .revision_min = _dig_major_min, \ 359 .revision_max = _dig_major_max, \ 360 .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_##_logical_type, \ 361 .ops = &spmi_##_ops_val##_ops, \ 362 .set_points = &_set_points_val##_set_points, \ 363 .hpm_min_load = _hpm_min_load, \ 364 } 365 366 #define SPMI_VREG_VS(_subtype, _dig_major_min, _dig_major_max) \ 367 { \ 368 .type = SPMI_REGULATOR_TYPE_VS, \ 369 .subtype = SPMI_REGULATOR_SUBTYPE_##_subtype, \ 370 .revision_min = _dig_major_min, \ 371 .revision_max = _dig_major_max, \ 372 .logical_type = SPMI_REGULATOR_LOGICAL_TYPE_VS, \ 373 .ops = &spmi_vs_ops, \ 374 } 375 376 #define SPMI_VOLTAGE_RANGE(_range_sel, _min_uV, _set_point_min_uV, \ 377 _set_point_max_uV, _max_uV, _step_uV) \ 378 { \ 379 .min_uV = _min_uV, \ 380 .max_uV = _max_uV, \ 381 .set_point_min_uV = _set_point_min_uV, \ 382 .set_point_max_uV = _set_point_max_uV, \ 383 .step_uV = _step_uV, \ 384 .range_sel = _range_sel, \ 385 } 386 387 #define DEFINE_SPMI_SET_POINTS(name) \ 388 struct spmi_voltage_set_points name##_set_points = { \ 389 .range = name##_ranges, \ 390 .count = ARRAY_SIZE(name##_ranges), \ 391 } 392 393 /* 394 * These tables contain the physically available PMIC regulator voltage setpoint 395 * ranges. Where two ranges overlap in hardware, one of the ranges is trimmed 396 * to ensure that the setpoints available to software are monotonically 397 * increasing and unique. The set_voltage callback functions expect these 398 * properties to hold. 399 */ 400 static struct spmi_voltage_range pldo_ranges[] = { 401 SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), 402 SPMI_VOLTAGE_RANGE(3, 1500000, 1550000, 3075000, 3075000, 25000), 403 SPMI_VOLTAGE_RANGE(4, 1750000, 3100000, 4900000, 4900000, 50000), 404 }; 405 406 static struct spmi_voltage_range nldo1_ranges[] = { 407 SPMI_VOLTAGE_RANGE(2, 750000, 750000, 1537500, 1537500, 12500), 408 }; 409 410 static struct spmi_voltage_range nldo2_ranges[] = { 411 SPMI_VOLTAGE_RANGE(0, 375000, 0, 0, 1537500, 12500), 412 SPMI_VOLTAGE_RANGE(1, 375000, 375000, 768750, 768750, 6250), 413 SPMI_VOLTAGE_RANGE(2, 750000, 775000, 1537500, 1537500, 12500), 414 }; 415 416 static struct spmi_voltage_range nldo3_ranges[] = { 417 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), 418 SPMI_VOLTAGE_RANGE(1, 375000, 0, 0, 1537500, 12500), 419 SPMI_VOLTAGE_RANGE(2, 750000, 0, 0, 1537500, 12500), 420 }; 421 422 static struct spmi_voltage_range ln_ldo_ranges[] = { 423 SPMI_VOLTAGE_RANGE(1, 690000, 690000, 1110000, 1110000, 60000), 424 SPMI_VOLTAGE_RANGE(0, 1380000, 1380000, 2220000, 2220000, 120000), 425 }; 426 427 static struct spmi_voltage_range smps_ranges[] = { 428 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), 429 SPMI_VOLTAGE_RANGE(1, 1550000, 1575000, 3125000, 3125000, 25000), 430 }; 431 432 static struct spmi_voltage_range ftsmps_ranges[] = { 433 SPMI_VOLTAGE_RANGE(0, 0, 350000, 1275000, 1275000, 5000), 434 SPMI_VOLTAGE_RANGE(1, 0, 1280000, 2040000, 2040000, 10000), 435 }; 436 437 static struct spmi_voltage_range ftsmps2p5_ranges[] = { 438 SPMI_VOLTAGE_RANGE(0, 80000, 350000, 1355000, 1355000, 5000), 439 SPMI_VOLTAGE_RANGE(1, 160000, 1360000, 2200000, 2200000, 10000), 440 }; 441 442 static struct spmi_voltage_range boost_ranges[] = { 443 SPMI_VOLTAGE_RANGE(0, 4000000, 4000000, 5550000, 5550000, 50000), 444 }; 445 446 static struct spmi_voltage_range boost_byp_ranges[] = { 447 SPMI_VOLTAGE_RANGE(0, 2500000, 2500000, 5200000, 5650000, 50000), 448 }; 449 450 static struct spmi_voltage_range ult_lo_smps_ranges[] = { 451 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1562500, 1562500, 12500), 452 SPMI_VOLTAGE_RANGE(1, 750000, 0, 0, 1525000, 25000), 453 }; 454 455 static struct spmi_voltage_range ult_ho_smps_ranges[] = { 456 SPMI_VOLTAGE_RANGE(0, 1550000, 1550000, 2325000, 2325000, 25000), 457 }; 458 459 static struct spmi_voltage_range ult_nldo_ranges[] = { 460 SPMI_VOLTAGE_RANGE(0, 375000, 375000, 1537500, 1537500, 12500), 461 }; 462 463 static struct spmi_voltage_range ult_pldo_ranges[] = { 464 SPMI_VOLTAGE_RANGE(0, 1750000, 1750000, 3337500, 3337500, 12500), 465 }; 466 467 static DEFINE_SPMI_SET_POINTS(pldo); 468 static DEFINE_SPMI_SET_POINTS(nldo1); 469 static DEFINE_SPMI_SET_POINTS(nldo2); 470 static DEFINE_SPMI_SET_POINTS(nldo3); 471 static DEFINE_SPMI_SET_POINTS(ln_ldo); 472 static DEFINE_SPMI_SET_POINTS(smps); 473 static DEFINE_SPMI_SET_POINTS(ftsmps); 474 static DEFINE_SPMI_SET_POINTS(ftsmps2p5); 475 static DEFINE_SPMI_SET_POINTS(boost); 476 static DEFINE_SPMI_SET_POINTS(boost_byp); 477 static DEFINE_SPMI_SET_POINTS(ult_lo_smps); 478 static DEFINE_SPMI_SET_POINTS(ult_ho_smps); 479 static DEFINE_SPMI_SET_POINTS(ult_nldo); 480 static DEFINE_SPMI_SET_POINTS(ult_pldo); 481 482 static inline int spmi_vreg_read(struct spmi_regulator *vreg, u16 addr, u8 *buf, 483 int len) 484 { 485 return regmap_bulk_read(vreg->regmap, vreg->base + addr, buf, len); 486 } 487 488 static inline int spmi_vreg_write(struct spmi_regulator *vreg, u16 addr, 489 u8 *buf, int len) 490 { 491 return regmap_bulk_write(vreg->regmap, vreg->base + addr, buf, len); 492 } 493 494 static int spmi_vreg_update_bits(struct spmi_regulator *vreg, u16 addr, u8 val, 495 u8 mask) 496 { 497 return regmap_update_bits(vreg->regmap, vreg->base + addr, mask, val); 498 } 499 500 static int spmi_regulator_vs_enable(struct regulator_dev *rdev) 501 { 502 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 503 504 if (vreg->ocp_irq) { 505 vreg->ocp_count = 0; 506 vreg->vs_enable_time = ktime_get(); 507 } 508 509 return regulator_enable_regmap(rdev); 510 } 511 512 static int spmi_regulator_vs_ocp(struct regulator_dev *rdev) 513 { 514 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 515 u8 reg = SPMI_VS_OCP_OVERRIDE; 516 517 return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, ®, 1); 518 } 519 520 static int spmi_regulator_select_voltage(struct spmi_regulator *vreg, 521 int min_uV, int max_uV) 522 { 523 const struct spmi_voltage_range *range; 524 int uV = min_uV; 525 int lim_min_uV, lim_max_uV, i, range_id, range_max_uV; 526 int selector, voltage_sel; 527 528 /* Check if request voltage is outside of physically settable range. */ 529 lim_min_uV = vreg->set_points->range[0].set_point_min_uV; 530 lim_max_uV = 531 vreg->set_points->range[vreg->set_points->count - 1].set_point_max_uV; 532 533 if (uV < lim_min_uV && max_uV >= lim_min_uV) 534 uV = lim_min_uV; 535 536 if (uV < lim_min_uV || uV > lim_max_uV) { 537 dev_err(vreg->dev, 538 "request v=[%d, %d] is outside possible v=[%d, %d]\n", 539 min_uV, max_uV, lim_min_uV, lim_max_uV); 540 return -EINVAL; 541 } 542 543 /* Find the range which uV is inside of. */ 544 for (i = vreg->set_points->count - 1; i > 0; i--) { 545 range_max_uV = vreg->set_points->range[i - 1].set_point_max_uV; 546 if (uV > range_max_uV && range_max_uV > 0) 547 break; 548 } 549 550 range_id = i; 551 range = &vreg->set_points->range[range_id]; 552 553 /* 554 * Force uV to be an allowed set point by applying a ceiling function to 555 * the uV value. 556 */ 557 voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); 558 uV = voltage_sel * range->step_uV + range->min_uV; 559 560 if (uV > max_uV) { 561 dev_err(vreg->dev, 562 "request v=[%d, %d] cannot be met by any set point; " 563 "next set point: %d\n", 564 min_uV, max_uV, uV); 565 return -EINVAL; 566 } 567 568 selector = 0; 569 for (i = 0; i < range_id; i++) 570 selector += vreg->set_points->range[i].n_voltages; 571 selector += (uV - range->set_point_min_uV) / range->step_uV; 572 573 return selector; 574 } 575 576 static int spmi_sw_selector_to_hw(struct spmi_regulator *vreg, 577 unsigned selector, u8 *range_sel, 578 u8 *voltage_sel) 579 { 580 const struct spmi_voltage_range *range, *end; 581 unsigned offset; 582 583 range = vreg->set_points->range; 584 end = range + vreg->set_points->count; 585 586 for (; range < end; range++) { 587 if (selector < range->n_voltages) { 588 /* 589 * hardware selectors between set point min and real 590 * min are invalid so we ignore them 591 */ 592 offset = range->set_point_min_uV - range->min_uV; 593 offset /= range->step_uV; 594 *voltage_sel = selector + offset; 595 *range_sel = range->range_sel; 596 return 0; 597 } 598 599 selector -= range->n_voltages; 600 } 601 602 return -EINVAL; 603 } 604 605 static int spmi_hw_selector_to_sw(struct spmi_regulator *vreg, u8 hw_sel, 606 const struct spmi_voltage_range *range) 607 { 608 unsigned sw_sel = 0; 609 unsigned offset, max_hw_sel; 610 const struct spmi_voltage_range *r = vreg->set_points->range; 611 const struct spmi_voltage_range *end = r + vreg->set_points->count; 612 613 for (; r < end; r++) { 614 if (r == range && range->n_voltages) { 615 /* 616 * hardware selectors between set point min and real 617 * min and between set point max and real max are 618 * invalid so we return an error if they're 619 * programmed into the hardware 620 */ 621 offset = range->set_point_min_uV - range->min_uV; 622 offset /= range->step_uV; 623 if (hw_sel < offset) 624 return -EINVAL; 625 626 max_hw_sel = range->set_point_max_uV - range->min_uV; 627 max_hw_sel /= range->step_uV; 628 if (hw_sel > max_hw_sel) 629 return -EINVAL; 630 631 return sw_sel + hw_sel - offset; 632 } 633 sw_sel += r->n_voltages; 634 } 635 636 return -EINVAL; 637 } 638 639 static const struct spmi_voltage_range * 640 spmi_regulator_find_range(struct spmi_regulator *vreg) 641 { 642 u8 range_sel; 643 const struct spmi_voltage_range *range, *end; 644 645 range = vreg->set_points->range; 646 end = range + vreg->set_points->count; 647 648 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, &range_sel, 1); 649 650 for (; range < end; range++) 651 if (range->range_sel == range_sel) 652 return range; 653 654 return NULL; 655 } 656 657 static int spmi_regulator_select_voltage_same_range(struct spmi_regulator *vreg, 658 int min_uV, int max_uV) 659 { 660 const struct spmi_voltage_range *range; 661 int uV = min_uV; 662 int i, selector; 663 664 range = spmi_regulator_find_range(vreg); 665 if (!range) 666 goto different_range; 667 668 if (uV < range->min_uV && max_uV >= range->min_uV) 669 uV = range->min_uV; 670 671 if (uV < range->min_uV || uV > range->max_uV) { 672 /* Current range doesn't support the requested voltage. */ 673 goto different_range; 674 } 675 676 /* 677 * Force uV to be an allowed set point by applying a ceiling function to 678 * the uV value. 679 */ 680 uV = DIV_ROUND_UP(uV - range->min_uV, range->step_uV); 681 uV = uV * range->step_uV + range->min_uV; 682 683 if (uV > max_uV) { 684 /* 685 * No set point in the current voltage range is within the 686 * requested min_uV to max_uV range. 687 */ 688 goto different_range; 689 } 690 691 selector = 0; 692 for (i = 0; i < vreg->set_points->count; i++) { 693 if (uV >= vreg->set_points->range[i].set_point_min_uV 694 && uV <= vreg->set_points->range[i].set_point_max_uV) { 695 selector += 696 (uV - vreg->set_points->range[i].set_point_min_uV) 697 / vreg->set_points->range[i].step_uV; 698 break; 699 } 700 701 selector += vreg->set_points->range[i].n_voltages; 702 } 703 704 if (selector >= vreg->set_points->n_voltages) 705 goto different_range; 706 707 return selector; 708 709 different_range: 710 return spmi_regulator_select_voltage(vreg, min_uV, max_uV); 711 } 712 713 static int spmi_regulator_common_map_voltage(struct regulator_dev *rdev, 714 int min_uV, int max_uV) 715 { 716 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 717 718 /* 719 * Favor staying in the current voltage range if possible. This avoids 720 * voltage spikes that occur when changing the voltage range. 721 */ 722 return spmi_regulator_select_voltage_same_range(vreg, min_uV, max_uV); 723 } 724 725 static int 726 spmi_regulator_common_set_voltage(struct regulator_dev *rdev, unsigned selector) 727 { 728 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 729 int ret; 730 u8 buf[2]; 731 u8 range_sel, voltage_sel; 732 733 ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); 734 if (ret) 735 return ret; 736 737 buf[0] = range_sel; 738 buf[1] = voltage_sel; 739 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, buf, 2); 740 } 741 742 static int spmi_regulator_set_voltage_time_sel(struct regulator_dev *rdev, 743 unsigned int old_selector, unsigned int new_selector) 744 { 745 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 746 const struct spmi_voltage_range *range; 747 int diff_uV; 748 749 range = spmi_regulator_find_range(vreg); 750 if (!range) 751 return -EINVAL; 752 753 diff_uV = abs(new_selector - old_selector) * range->step_uV; 754 755 return DIV_ROUND_UP(diff_uV, vreg->slew_rate); 756 } 757 758 static int spmi_regulator_common_get_voltage(struct regulator_dev *rdev) 759 { 760 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 761 const struct spmi_voltage_range *range; 762 u8 voltage_sel; 763 764 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); 765 766 range = spmi_regulator_find_range(vreg); 767 if (!range) 768 return -EINVAL; 769 770 return spmi_hw_selector_to_sw(vreg, voltage_sel, range); 771 } 772 773 static int spmi_regulator_single_map_voltage(struct regulator_dev *rdev, 774 int min_uV, int max_uV) 775 { 776 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 777 778 return spmi_regulator_select_voltage(vreg, min_uV, max_uV); 779 } 780 781 static int spmi_regulator_single_range_set_voltage(struct regulator_dev *rdev, 782 unsigned selector) 783 { 784 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 785 u8 sel = selector; 786 787 /* 788 * Certain types of regulators do not have a range select register so 789 * only voltage set register needs to be written. 790 */ 791 return spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &sel, 1); 792 } 793 794 static int spmi_regulator_single_range_get_voltage(struct regulator_dev *rdev) 795 { 796 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 797 u8 selector; 798 int ret; 799 800 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &selector, 1); 801 if (ret) 802 return ret; 803 804 return selector; 805 } 806 807 static int spmi_regulator_ult_lo_smps_set_voltage(struct regulator_dev *rdev, 808 unsigned selector) 809 { 810 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 811 int ret; 812 u8 range_sel, voltage_sel; 813 814 ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); 815 if (ret) 816 return ret; 817 818 /* 819 * Calculate VSET based on range 820 * In case of range 0: voltage_sel is a 7 bit value, can be written 821 * witout any modification. 822 * In case of range 1: voltage_sel is a 5 bit value, bits[7-5] set to 823 * [011]. 824 */ 825 if (range_sel == 1) 826 voltage_sel |= ULT_SMPS_RANGE_SPLIT; 827 828 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_VOLTAGE_SET, 829 voltage_sel, 0xff); 830 } 831 832 static int spmi_regulator_ult_lo_smps_get_voltage(struct regulator_dev *rdev) 833 { 834 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 835 const struct spmi_voltage_range *range; 836 u8 voltage_sel; 837 838 spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_SET, &voltage_sel, 1); 839 840 range = spmi_regulator_find_range(vreg); 841 if (!range) 842 return -EINVAL; 843 844 if (range->range_sel == 1) 845 voltage_sel &= ~ULT_SMPS_RANGE_SPLIT; 846 847 return spmi_hw_selector_to_sw(vreg, voltage_sel, range); 848 } 849 850 static int spmi_regulator_common_list_voltage(struct regulator_dev *rdev, 851 unsigned selector) 852 { 853 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 854 int uV = 0; 855 int i; 856 857 if (selector >= vreg->set_points->n_voltages) 858 return 0; 859 860 for (i = 0; i < vreg->set_points->count; i++) { 861 if (selector < vreg->set_points->range[i].n_voltages) { 862 uV = selector * vreg->set_points->range[i].step_uV 863 + vreg->set_points->range[i].set_point_min_uV; 864 break; 865 } 866 867 selector -= vreg->set_points->range[i].n_voltages; 868 } 869 870 return uV; 871 } 872 873 static int 874 spmi_regulator_common_set_bypass(struct regulator_dev *rdev, bool enable) 875 { 876 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 877 u8 mask = SPMI_COMMON_MODE_BYPASS_MASK; 878 u8 val = 0; 879 880 if (enable) 881 val = mask; 882 883 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); 884 } 885 886 static int 887 spmi_regulator_common_get_bypass(struct regulator_dev *rdev, bool *enable) 888 { 889 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 890 u8 val; 891 int ret; 892 893 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, &val, 1); 894 *enable = val & SPMI_COMMON_MODE_BYPASS_MASK; 895 896 return ret; 897 } 898 899 static unsigned int spmi_regulator_common_get_mode(struct regulator_dev *rdev) 900 { 901 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 902 u8 reg; 903 904 spmi_vreg_read(vreg, SPMI_COMMON_REG_MODE, ®, 1); 905 906 if (reg & SPMI_COMMON_MODE_HPM_MASK) 907 return REGULATOR_MODE_NORMAL; 908 909 if (reg & SPMI_COMMON_MODE_AUTO_MASK) 910 return REGULATOR_MODE_FAST; 911 912 return REGULATOR_MODE_IDLE; 913 } 914 915 static int 916 spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode) 917 { 918 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 919 u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK; 920 u8 val = 0; 921 922 if (mode == REGULATOR_MODE_NORMAL) 923 val = SPMI_COMMON_MODE_HPM_MASK; 924 else if (mode == REGULATOR_MODE_FAST) 925 val = SPMI_COMMON_MODE_AUTO_MASK; 926 927 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask); 928 } 929 930 static int 931 spmi_regulator_common_set_load(struct regulator_dev *rdev, int load_uA) 932 { 933 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 934 unsigned int mode; 935 936 if (load_uA >= vreg->hpm_min_load) 937 mode = REGULATOR_MODE_NORMAL; 938 else 939 mode = REGULATOR_MODE_IDLE; 940 941 return spmi_regulator_common_set_mode(rdev, mode); 942 } 943 944 static int spmi_regulator_common_set_pull_down(struct regulator_dev *rdev) 945 { 946 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 947 unsigned int mask = SPMI_COMMON_PULL_DOWN_ENABLE_MASK; 948 949 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_PULL_DOWN, 950 mask, mask); 951 } 952 953 static int spmi_regulator_common_set_soft_start(struct regulator_dev *rdev) 954 { 955 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 956 unsigned int mask = SPMI_LDO_SOFT_START_ENABLE_MASK; 957 958 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_SOFT_START, 959 mask, mask); 960 } 961 962 static int spmi_regulator_set_ilim(struct regulator_dev *rdev, int ilim_uA) 963 { 964 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 965 enum spmi_regulator_logical_type type = vreg->logical_type; 966 unsigned int current_reg; 967 u8 reg; 968 u8 mask = SPMI_BOOST_CURRENT_LIMIT_MASK | 969 SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; 970 int max = (SPMI_BOOST_CURRENT_LIMIT_MASK + 1) * 500; 971 972 if (type == SPMI_REGULATOR_LOGICAL_TYPE_BOOST) 973 current_reg = SPMI_BOOST_REG_CURRENT_LIMIT; 974 else 975 current_reg = SPMI_BOOST_BYP_REG_CURRENT_LIMIT; 976 977 if (ilim_uA > max || ilim_uA <= 0) 978 return -EINVAL; 979 980 reg = (ilim_uA - 1) / 500; 981 reg |= SPMI_BOOST_CURRENT_LIMIT_ENABLE_MASK; 982 983 return spmi_vreg_update_bits(vreg, current_reg, reg, mask); 984 } 985 986 static int spmi_regulator_vs_clear_ocp(struct spmi_regulator *vreg) 987 { 988 int ret; 989 990 ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, 991 SPMI_COMMON_DISABLE, SPMI_COMMON_ENABLE_MASK); 992 993 vreg->vs_enable_time = ktime_get(); 994 995 ret = spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_ENABLE, 996 SPMI_COMMON_ENABLE, SPMI_COMMON_ENABLE_MASK); 997 998 return ret; 999 } 1000 1001 static void spmi_regulator_vs_ocp_work(struct work_struct *work) 1002 { 1003 struct delayed_work *dwork = to_delayed_work(work); 1004 struct spmi_regulator *vreg 1005 = container_of(dwork, struct spmi_regulator, ocp_work); 1006 1007 spmi_regulator_vs_clear_ocp(vreg); 1008 } 1009 1010 static irqreturn_t spmi_regulator_vs_ocp_isr(int irq, void *data) 1011 { 1012 struct spmi_regulator *vreg = data; 1013 ktime_t ocp_irq_time; 1014 s64 ocp_trigger_delay_us; 1015 1016 ocp_irq_time = ktime_get(); 1017 ocp_trigger_delay_us = ktime_us_delta(ocp_irq_time, 1018 vreg->vs_enable_time); 1019 1020 /* 1021 * Reset the OCP count if there is a large delay between switch enable 1022 * and when OCP triggers. This is indicative of a hotplug event as 1023 * opposed to a fault. 1024 */ 1025 if (ocp_trigger_delay_us > SPMI_VS_OCP_FAULT_DELAY_US) 1026 vreg->ocp_count = 0; 1027 1028 /* Wait for switch output to settle back to 0 V after OCP triggered. */ 1029 udelay(SPMI_VS_OCP_FALL_DELAY_US); 1030 1031 vreg->ocp_count++; 1032 1033 if (vreg->ocp_count == 1) { 1034 /* Immediately clear the over current condition. */ 1035 spmi_regulator_vs_clear_ocp(vreg); 1036 } else if (vreg->ocp_count <= vreg->ocp_max_retries) { 1037 /* Schedule the over current clear task to run later. */ 1038 schedule_delayed_work(&vreg->ocp_work, 1039 msecs_to_jiffies(vreg->ocp_retry_delay_ms) + 1); 1040 } else { 1041 dev_err(vreg->dev, 1042 "OCP triggered %d times; no further retries\n", 1043 vreg->ocp_count); 1044 } 1045 1046 return IRQ_HANDLED; 1047 } 1048 1049 #define SAW3_VCTL_DATA_MASK 0xFF 1050 #define SAW3_VCTL_CLEAR_MASK 0x700FF 1051 #define SAW3_AVS_CTL_EN_MASK 0x1 1052 #define SAW3_AVS_CTL_TGGL_MASK 0x8000000 1053 #define SAW3_AVS_CTL_CLEAR_MASK 0x7efc00 1054 1055 static struct regmap *saw_regmap; 1056 1057 static void spmi_saw_set_vdd(void *data) 1058 { 1059 u32 vctl, data3, avs_ctl, pmic_sts; 1060 bool avs_enabled = false; 1061 unsigned long timeout; 1062 u8 voltage_sel = *(u8 *)data; 1063 1064 regmap_read(saw_regmap, SAW3_AVS_CTL, &avs_ctl); 1065 regmap_read(saw_regmap, SAW3_VCTL, &vctl); 1066 regmap_read(saw_regmap, SAW3_SPM_PMIC_DATA_3, &data3); 1067 1068 /* select the band */ 1069 vctl &= ~SAW3_VCTL_CLEAR_MASK; 1070 vctl |= (u32)voltage_sel; 1071 1072 data3 &= ~SAW3_VCTL_CLEAR_MASK; 1073 data3 |= (u32)voltage_sel; 1074 1075 /* If AVS is enabled, switch it off during the voltage change */ 1076 avs_enabled = SAW3_AVS_CTL_EN_MASK & avs_ctl; 1077 if (avs_enabled) { 1078 avs_ctl &= ~SAW3_AVS_CTL_TGGL_MASK; 1079 regmap_write(saw_regmap, SAW3_AVS_CTL, avs_ctl); 1080 } 1081 1082 regmap_write(saw_regmap, SAW3_RST, 1); 1083 regmap_write(saw_regmap, SAW3_VCTL, vctl); 1084 regmap_write(saw_regmap, SAW3_SPM_PMIC_DATA_3, data3); 1085 1086 timeout = jiffies + usecs_to_jiffies(100); 1087 do { 1088 regmap_read(saw_regmap, SAW3_PMIC_STS, &pmic_sts); 1089 pmic_sts &= SAW3_VCTL_DATA_MASK; 1090 if (pmic_sts == (u32)voltage_sel) 1091 break; 1092 1093 cpu_relax(); 1094 1095 } while (time_before(jiffies, timeout)); 1096 1097 /* After successful voltage change, switch the AVS back on */ 1098 if (avs_enabled) { 1099 pmic_sts &= 0x3f; 1100 avs_ctl &= ~SAW3_AVS_CTL_CLEAR_MASK; 1101 avs_ctl |= ((pmic_sts - 4) << 10); 1102 avs_ctl |= (pmic_sts << 17); 1103 avs_ctl |= SAW3_AVS_CTL_TGGL_MASK; 1104 regmap_write(saw_regmap, SAW3_AVS_CTL, avs_ctl); 1105 } 1106 } 1107 1108 static int 1109 spmi_regulator_saw_set_voltage(struct regulator_dev *rdev, unsigned selector) 1110 { 1111 struct spmi_regulator *vreg = rdev_get_drvdata(rdev); 1112 int ret; 1113 u8 range_sel, voltage_sel; 1114 1115 ret = spmi_sw_selector_to_hw(vreg, selector, &range_sel, &voltage_sel); 1116 if (ret) 1117 return ret; 1118 1119 if (0 != range_sel) { 1120 dev_dbg(&rdev->dev, "range_sel = %02X voltage_sel = %02X", \ 1121 range_sel, voltage_sel); 1122 return -EINVAL; 1123 } 1124 1125 /* Always do the SAW register writes on the first CPU */ 1126 return smp_call_function_single(0, spmi_saw_set_vdd, \ 1127 &voltage_sel, true); 1128 } 1129 1130 static struct regulator_ops spmi_saw_ops = {}; 1131 1132 static struct regulator_ops spmi_smps_ops = { 1133 .enable = regulator_enable_regmap, 1134 .disable = regulator_disable_regmap, 1135 .is_enabled = regulator_is_enabled_regmap, 1136 .set_voltage_sel = spmi_regulator_common_set_voltage, 1137 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1138 .get_voltage_sel = spmi_regulator_common_get_voltage, 1139 .map_voltage = spmi_regulator_common_map_voltage, 1140 .list_voltage = spmi_regulator_common_list_voltage, 1141 .set_mode = spmi_regulator_common_set_mode, 1142 .get_mode = spmi_regulator_common_get_mode, 1143 .set_load = spmi_regulator_common_set_load, 1144 .set_pull_down = spmi_regulator_common_set_pull_down, 1145 }; 1146 1147 static struct regulator_ops spmi_ldo_ops = { 1148 .enable = regulator_enable_regmap, 1149 .disable = regulator_disable_regmap, 1150 .is_enabled = regulator_is_enabled_regmap, 1151 .set_voltage_sel = spmi_regulator_common_set_voltage, 1152 .get_voltage_sel = spmi_regulator_common_get_voltage, 1153 .map_voltage = spmi_regulator_common_map_voltage, 1154 .list_voltage = spmi_regulator_common_list_voltage, 1155 .set_mode = spmi_regulator_common_set_mode, 1156 .get_mode = spmi_regulator_common_get_mode, 1157 .set_load = spmi_regulator_common_set_load, 1158 .set_bypass = spmi_regulator_common_set_bypass, 1159 .get_bypass = spmi_regulator_common_get_bypass, 1160 .set_pull_down = spmi_regulator_common_set_pull_down, 1161 .set_soft_start = spmi_regulator_common_set_soft_start, 1162 }; 1163 1164 static struct regulator_ops spmi_ln_ldo_ops = { 1165 .enable = regulator_enable_regmap, 1166 .disable = regulator_disable_regmap, 1167 .is_enabled = regulator_is_enabled_regmap, 1168 .set_voltage_sel = spmi_regulator_common_set_voltage, 1169 .get_voltage_sel = spmi_regulator_common_get_voltage, 1170 .map_voltage = spmi_regulator_common_map_voltage, 1171 .list_voltage = spmi_regulator_common_list_voltage, 1172 .set_bypass = spmi_regulator_common_set_bypass, 1173 .get_bypass = spmi_regulator_common_get_bypass, 1174 }; 1175 1176 static struct regulator_ops spmi_vs_ops = { 1177 .enable = spmi_regulator_vs_enable, 1178 .disable = regulator_disable_regmap, 1179 .is_enabled = regulator_is_enabled_regmap, 1180 .set_pull_down = spmi_regulator_common_set_pull_down, 1181 .set_soft_start = spmi_regulator_common_set_soft_start, 1182 .set_over_current_protection = spmi_regulator_vs_ocp, 1183 .set_mode = spmi_regulator_common_set_mode, 1184 .get_mode = spmi_regulator_common_get_mode, 1185 }; 1186 1187 static struct regulator_ops spmi_boost_ops = { 1188 .enable = regulator_enable_regmap, 1189 .disable = regulator_disable_regmap, 1190 .is_enabled = regulator_is_enabled_regmap, 1191 .set_voltage_sel = spmi_regulator_single_range_set_voltage, 1192 .get_voltage_sel = spmi_regulator_single_range_get_voltage, 1193 .map_voltage = spmi_regulator_single_map_voltage, 1194 .list_voltage = spmi_regulator_common_list_voltage, 1195 .set_input_current_limit = spmi_regulator_set_ilim, 1196 }; 1197 1198 static struct regulator_ops spmi_ftsmps_ops = { 1199 .enable = regulator_enable_regmap, 1200 .disable = regulator_disable_regmap, 1201 .is_enabled = regulator_is_enabled_regmap, 1202 .set_voltage_sel = spmi_regulator_common_set_voltage, 1203 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1204 .get_voltage_sel = spmi_regulator_common_get_voltage, 1205 .map_voltage = spmi_regulator_common_map_voltage, 1206 .list_voltage = spmi_regulator_common_list_voltage, 1207 .set_mode = spmi_regulator_common_set_mode, 1208 .get_mode = spmi_regulator_common_get_mode, 1209 .set_load = spmi_regulator_common_set_load, 1210 .set_pull_down = spmi_regulator_common_set_pull_down, 1211 }; 1212 1213 static struct regulator_ops spmi_ult_lo_smps_ops = { 1214 .enable = regulator_enable_regmap, 1215 .disable = regulator_disable_regmap, 1216 .is_enabled = regulator_is_enabled_regmap, 1217 .set_voltage_sel = spmi_regulator_ult_lo_smps_set_voltage, 1218 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1219 .get_voltage_sel = spmi_regulator_ult_lo_smps_get_voltage, 1220 .list_voltage = spmi_regulator_common_list_voltage, 1221 .set_mode = spmi_regulator_common_set_mode, 1222 .get_mode = spmi_regulator_common_get_mode, 1223 .set_load = spmi_regulator_common_set_load, 1224 .set_pull_down = spmi_regulator_common_set_pull_down, 1225 }; 1226 1227 static struct regulator_ops spmi_ult_ho_smps_ops = { 1228 .enable = regulator_enable_regmap, 1229 .disable = regulator_disable_regmap, 1230 .is_enabled = regulator_is_enabled_regmap, 1231 .set_voltage_sel = spmi_regulator_single_range_set_voltage, 1232 .set_voltage_time_sel = spmi_regulator_set_voltage_time_sel, 1233 .get_voltage_sel = spmi_regulator_single_range_get_voltage, 1234 .map_voltage = spmi_regulator_single_map_voltage, 1235 .list_voltage = spmi_regulator_common_list_voltage, 1236 .set_mode = spmi_regulator_common_set_mode, 1237 .get_mode = spmi_regulator_common_get_mode, 1238 .set_load = spmi_regulator_common_set_load, 1239 .set_pull_down = spmi_regulator_common_set_pull_down, 1240 }; 1241 1242 static struct regulator_ops spmi_ult_ldo_ops = { 1243 .enable = regulator_enable_regmap, 1244 .disable = regulator_disable_regmap, 1245 .is_enabled = regulator_is_enabled_regmap, 1246 .set_voltage_sel = spmi_regulator_single_range_set_voltage, 1247 .get_voltage_sel = spmi_regulator_single_range_get_voltage, 1248 .map_voltage = spmi_regulator_single_map_voltage, 1249 .list_voltage = spmi_regulator_common_list_voltage, 1250 .set_mode = spmi_regulator_common_set_mode, 1251 .get_mode = spmi_regulator_common_get_mode, 1252 .set_load = spmi_regulator_common_set_load, 1253 .set_bypass = spmi_regulator_common_set_bypass, 1254 .get_bypass = spmi_regulator_common_get_bypass, 1255 .set_pull_down = spmi_regulator_common_set_pull_down, 1256 .set_soft_start = spmi_regulator_common_set_soft_start, 1257 }; 1258 1259 /* Maximum possible digital major revision value */ 1260 #define INF 0xFF 1261 1262 static const struct spmi_regulator_mapping supported_regulators[] = { 1263 /* type subtype dig_min dig_max ltype ops setpoints hpm_min */ 1264 SPMI_VREG(BUCK, GP_CTL, 0, INF, SMPS, smps, smps, 100000), 1265 SPMI_VREG(LDO, N300, 0, INF, LDO, ldo, nldo1, 10000), 1266 SPMI_VREG(LDO, N600, 0, 0, LDO, ldo, nldo2, 10000), 1267 SPMI_VREG(LDO, N1200, 0, 0, LDO, ldo, nldo2, 10000), 1268 SPMI_VREG(LDO, N600, 1, INF, LDO, ldo, nldo3, 10000), 1269 SPMI_VREG(LDO, N1200, 1, INF, LDO, ldo, nldo3, 10000), 1270 SPMI_VREG(LDO, N600_ST, 0, 0, LDO, ldo, nldo2, 10000), 1271 SPMI_VREG(LDO, N1200_ST, 0, 0, LDO, ldo, nldo2, 10000), 1272 SPMI_VREG(LDO, N600_ST, 1, INF, LDO, ldo, nldo3, 10000), 1273 SPMI_VREG(LDO, N1200_ST, 1, INF, LDO, ldo, nldo3, 10000), 1274 SPMI_VREG(LDO, P50, 0, INF, LDO, ldo, pldo, 5000), 1275 SPMI_VREG(LDO, P150, 0, INF, LDO, ldo, pldo, 10000), 1276 SPMI_VREG(LDO, P300, 0, INF, LDO, ldo, pldo, 10000), 1277 SPMI_VREG(LDO, P600, 0, INF, LDO, ldo, pldo, 10000), 1278 SPMI_VREG(LDO, P1200, 0, INF, LDO, ldo, pldo, 10000), 1279 SPMI_VREG(LDO, LN, 0, INF, LN_LDO, ln_ldo, ln_ldo, 0), 1280 SPMI_VREG(LDO, LV_P50, 0, INF, LDO, ldo, pldo, 5000), 1281 SPMI_VREG(LDO, LV_P150, 0, INF, LDO, ldo, pldo, 10000), 1282 SPMI_VREG(LDO, LV_P300, 0, INF, LDO, ldo, pldo, 10000), 1283 SPMI_VREG(LDO, LV_P600, 0, INF, LDO, ldo, pldo, 10000), 1284 SPMI_VREG(LDO, LV_P1200, 0, INF, LDO, ldo, pldo, 10000), 1285 SPMI_VREG_VS(LV100, 0, INF), 1286 SPMI_VREG_VS(LV300, 0, INF), 1287 SPMI_VREG_VS(MV300, 0, INF), 1288 SPMI_VREG_VS(MV500, 0, INF), 1289 SPMI_VREG_VS(HDMI, 0, INF), 1290 SPMI_VREG_VS(OTG, 0, INF), 1291 SPMI_VREG(BOOST, 5V_BOOST, 0, INF, BOOST, boost, boost, 0), 1292 SPMI_VREG(FTS, FTS_CTL, 0, INF, FTSMPS, ftsmps, ftsmps, 100000), 1293 SPMI_VREG(FTS, FTS2p5_CTL, 0, INF, FTSMPS, ftsmps, ftsmps2p5, 100000), 1294 SPMI_VREG(BOOST_BYP, BB_2A, 0, INF, BOOST_BYP, boost, boost_byp, 0), 1295 SPMI_VREG(ULT_BUCK, ULT_HF_CTL1, 0, INF, ULT_LO_SMPS, ult_lo_smps, 1296 ult_lo_smps, 100000), 1297 SPMI_VREG(ULT_BUCK, ULT_HF_CTL2, 0, INF, ULT_LO_SMPS, ult_lo_smps, 1298 ult_lo_smps, 100000), 1299 SPMI_VREG(ULT_BUCK, ULT_HF_CTL3, 0, INF, ULT_LO_SMPS, ult_lo_smps, 1300 ult_lo_smps, 100000), 1301 SPMI_VREG(ULT_BUCK, ULT_HF_CTL4, 0, INF, ULT_HO_SMPS, ult_ho_smps, 1302 ult_ho_smps, 100000), 1303 SPMI_VREG(ULT_LDO, N300_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), 1304 SPMI_VREG(ULT_LDO, N600_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), 1305 SPMI_VREG(ULT_LDO, N900_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), 1306 SPMI_VREG(ULT_LDO, N1200_ST, 0, INF, ULT_LDO, ult_ldo, ult_nldo, 10000), 1307 SPMI_VREG(ULT_LDO, LV_P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1308 SPMI_VREG(ULT_LDO, LV_P300, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1309 SPMI_VREG(ULT_LDO, LV_P450, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1310 SPMI_VREG(ULT_LDO, P600, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1311 SPMI_VREG(ULT_LDO, P150, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 10000), 1312 SPMI_VREG(ULT_LDO, P50, 0, INF, ULT_LDO, ult_ldo, ult_pldo, 5000), 1313 }; 1314 1315 static void spmi_calculate_num_voltages(struct spmi_voltage_set_points *points) 1316 { 1317 unsigned int n; 1318 struct spmi_voltage_range *range = points->range; 1319 1320 for (; range < points->range + points->count; range++) { 1321 n = 0; 1322 if (range->set_point_max_uV) { 1323 n = range->set_point_max_uV - range->set_point_min_uV; 1324 n = (n / range->step_uV) + 1; 1325 } 1326 range->n_voltages = n; 1327 points->n_voltages += n; 1328 } 1329 } 1330 1331 static int spmi_regulator_match(struct spmi_regulator *vreg, u16 force_type) 1332 { 1333 const struct spmi_regulator_mapping *mapping; 1334 int ret, i; 1335 u32 dig_major_rev; 1336 u8 version[SPMI_COMMON_REG_SUBTYPE - SPMI_COMMON_REG_DIG_MAJOR_REV + 1]; 1337 u8 type, subtype; 1338 1339 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_DIG_MAJOR_REV, version, 1340 ARRAY_SIZE(version)); 1341 if (ret) { 1342 dev_dbg(vreg->dev, "could not read version registers\n"); 1343 return ret; 1344 } 1345 dig_major_rev = version[SPMI_COMMON_REG_DIG_MAJOR_REV 1346 - SPMI_COMMON_REG_DIG_MAJOR_REV]; 1347 1348 if (!force_type) { 1349 type = version[SPMI_COMMON_REG_TYPE - 1350 SPMI_COMMON_REG_DIG_MAJOR_REV]; 1351 subtype = version[SPMI_COMMON_REG_SUBTYPE - 1352 SPMI_COMMON_REG_DIG_MAJOR_REV]; 1353 } else { 1354 type = force_type >> 8; 1355 subtype = force_type; 1356 } 1357 1358 for (i = 0; i < ARRAY_SIZE(supported_regulators); i++) { 1359 mapping = &supported_regulators[i]; 1360 if (mapping->type == type && mapping->subtype == subtype 1361 && mapping->revision_min <= dig_major_rev 1362 && mapping->revision_max >= dig_major_rev) 1363 goto found; 1364 } 1365 1366 dev_err(vreg->dev, 1367 "unsupported regulator: name=%s type=0x%02X, subtype=0x%02X, dig major rev=0x%02X\n", 1368 vreg->desc.name, type, subtype, dig_major_rev); 1369 1370 return -ENODEV; 1371 1372 found: 1373 vreg->logical_type = mapping->logical_type; 1374 vreg->set_points = mapping->set_points; 1375 vreg->hpm_min_load = mapping->hpm_min_load; 1376 vreg->desc.ops = mapping->ops; 1377 1378 if (mapping->set_points) { 1379 if (!mapping->set_points->n_voltages) 1380 spmi_calculate_num_voltages(mapping->set_points); 1381 vreg->desc.n_voltages = mapping->set_points->n_voltages; 1382 } 1383 1384 return 0; 1385 } 1386 1387 static int spmi_regulator_init_slew_rate(struct spmi_regulator *vreg) 1388 { 1389 int ret; 1390 u8 reg = 0; 1391 int step, delay, slew_rate, step_delay; 1392 const struct spmi_voltage_range *range; 1393 1394 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_STEP_CTRL, ®, 1); 1395 if (ret) { 1396 dev_err(vreg->dev, "spmi read failed, ret=%d\n", ret); 1397 return ret; 1398 } 1399 1400 range = spmi_regulator_find_range(vreg); 1401 if (!range) 1402 return -EINVAL; 1403 1404 switch (vreg->logical_type) { 1405 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS: 1406 step_delay = SPMI_FTSMPS_STEP_DELAY; 1407 break; 1408 default: 1409 step_delay = SPMI_DEFAULT_STEP_DELAY; 1410 break; 1411 } 1412 1413 step = reg & SPMI_FTSMPS_STEP_CTRL_STEP_MASK; 1414 step >>= SPMI_FTSMPS_STEP_CTRL_STEP_SHIFT; 1415 1416 delay = reg & SPMI_FTSMPS_STEP_CTRL_DELAY_MASK; 1417 delay >>= SPMI_FTSMPS_STEP_CTRL_DELAY_SHIFT; 1418 1419 /* slew_rate has units of uV/us */ 1420 slew_rate = SPMI_FTSMPS_CLOCK_RATE * range->step_uV * (1 << step); 1421 slew_rate /= 1000 * (step_delay << delay); 1422 slew_rate *= SPMI_FTSMPS_STEP_MARGIN_NUM; 1423 slew_rate /= SPMI_FTSMPS_STEP_MARGIN_DEN; 1424 1425 /* Ensure that the slew rate is greater than 0 */ 1426 vreg->slew_rate = max(slew_rate, 1); 1427 1428 return ret; 1429 } 1430 1431 static int spmi_regulator_init_registers(struct spmi_regulator *vreg, 1432 const struct spmi_regulator_init_data *data) 1433 { 1434 int ret; 1435 enum spmi_regulator_logical_type type; 1436 u8 ctrl_reg[8], reg, mask; 1437 1438 type = vreg->logical_type; 1439 1440 ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); 1441 if (ret) 1442 return ret; 1443 1444 /* Set up enable pin control. */ 1445 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS 1446 || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO 1447 || type == SPMI_REGULATOR_LOGICAL_TYPE_VS) 1448 && !(data->pin_ctrl_enable 1449 & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) { 1450 ctrl_reg[SPMI_COMMON_IDX_ENABLE] &= 1451 ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; 1452 ctrl_reg[SPMI_COMMON_IDX_ENABLE] |= 1453 data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK; 1454 } 1455 1456 /* Set up mode pin control. */ 1457 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS 1458 || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO) 1459 && !(data->pin_ctrl_hpm 1460 & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { 1461 ctrl_reg[SPMI_COMMON_IDX_MODE] &= 1462 ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK; 1463 ctrl_reg[SPMI_COMMON_IDX_MODE] |= 1464 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK; 1465 } 1466 1467 if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS 1468 && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { 1469 ctrl_reg[SPMI_COMMON_IDX_MODE] &= 1470 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; 1471 ctrl_reg[SPMI_COMMON_IDX_MODE] |= 1472 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; 1473 } 1474 1475 if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS 1476 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS 1477 || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO) 1478 && !(data->pin_ctrl_hpm 1479 & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) { 1480 ctrl_reg[SPMI_COMMON_IDX_MODE] &= 1481 ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; 1482 ctrl_reg[SPMI_COMMON_IDX_MODE] |= 1483 data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK; 1484 } 1485 1486 /* Write back any control register values that were modified. */ 1487 ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8); 1488 if (ret) 1489 return ret; 1490 1491 /* Set soft start strength and over current protection for VS. */ 1492 if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) { 1493 if (data->vs_soft_start_strength 1494 != SPMI_VS_SOFT_START_STR_HW_DEFAULT) { 1495 reg = data->vs_soft_start_strength 1496 & SPMI_VS_SOFT_START_SEL_MASK; 1497 mask = SPMI_VS_SOFT_START_SEL_MASK; 1498 return spmi_vreg_update_bits(vreg, 1499 SPMI_VS_REG_SOFT_START, 1500 reg, mask); 1501 } 1502 } 1503 1504 return 0; 1505 } 1506 1507 static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg, 1508 struct device_node *node, struct spmi_regulator_init_data *data) 1509 { 1510 /* 1511 * Initialize configuration parameters to use hardware default in case 1512 * no value is specified via device tree. 1513 */ 1514 data->pin_ctrl_enable = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT; 1515 data->pin_ctrl_hpm = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT; 1516 data->vs_soft_start_strength = SPMI_VS_SOFT_START_STR_HW_DEFAULT; 1517 1518 /* These bindings are optional, so it is okay if they aren't found. */ 1519 of_property_read_u32(node, "qcom,ocp-max-retries", 1520 &vreg->ocp_max_retries); 1521 of_property_read_u32(node, "qcom,ocp-retry-delay", 1522 &vreg->ocp_retry_delay_ms); 1523 of_property_read_u32(node, "qcom,pin-ctrl-enable", 1524 &data->pin_ctrl_enable); 1525 of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm); 1526 of_property_read_u32(node, "qcom,vs-soft-start-strength", 1527 &data->vs_soft_start_strength); 1528 } 1529 1530 static unsigned int spmi_regulator_of_map_mode(unsigned int mode) 1531 { 1532 if (mode == 1) 1533 return REGULATOR_MODE_NORMAL; 1534 if (mode == 2) 1535 return REGULATOR_MODE_FAST; 1536 1537 return REGULATOR_MODE_IDLE; 1538 } 1539 1540 static int spmi_regulator_of_parse(struct device_node *node, 1541 const struct regulator_desc *desc, 1542 struct regulator_config *config) 1543 { 1544 struct spmi_regulator_init_data data = { }; 1545 struct spmi_regulator *vreg = config->driver_data; 1546 struct device *dev = config->dev; 1547 int ret; 1548 1549 spmi_regulator_get_dt_config(vreg, node, &data); 1550 1551 if (!vreg->ocp_max_retries) 1552 vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES; 1553 if (!vreg->ocp_retry_delay_ms) 1554 vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS; 1555 1556 ret = spmi_regulator_init_registers(vreg, &data); 1557 if (ret) { 1558 dev_err(dev, "common initialization failed, ret=%d\n", ret); 1559 return ret; 1560 } 1561 1562 switch (vreg->logical_type) { 1563 case SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS: 1564 case SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS: 1565 case SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS: 1566 case SPMI_REGULATOR_LOGICAL_TYPE_SMPS: 1567 ret = spmi_regulator_init_slew_rate(vreg); 1568 if (ret) 1569 return ret; 1570 default: 1571 break; 1572 } 1573 1574 if (vreg->logical_type != SPMI_REGULATOR_LOGICAL_TYPE_VS) 1575 vreg->ocp_irq = 0; 1576 1577 if (vreg->ocp_irq) { 1578 ret = devm_request_irq(dev, vreg->ocp_irq, 1579 spmi_regulator_vs_ocp_isr, IRQF_TRIGGER_RISING, "ocp", 1580 vreg); 1581 if (ret < 0) { 1582 dev_err(dev, "failed to request irq %d, ret=%d\n", 1583 vreg->ocp_irq, ret); 1584 return ret; 1585 } 1586 1587 INIT_DELAYED_WORK(&vreg->ocp_work, spmi_regulator_vs_ocp_work); 1588 } 1589 1590 return 0; 1591 } 1592 1593 static const struct spmi_regulator_data pm8941_regulators[] = { 1594 { "s1", 0x1400, "vdd_s1", }, 1595 { "s2", 0x1700, "vdd_s2", }, 1596 { "s3", 0x1a00, "vdd_s3", }, 1597 { "s4", 0xa000, }, 1598 { "l1", 0x4000, "vdd_l1_l3", }, 1599 { "l2", 0x4100, "vdd_l2_lvs_1_2_3", }, 1600 { "l3", 0x4200, "vdd_l1_l3", }, 1601 { "l4", 0x4300, "vdd_l4_l11", }, 1602 { "l5", 0x4400, "vdd_l5_l7", NULL, 0x0410 }, 1603 { "l6", 0x4500, "vdd_l6_l12_l14_l15", }, 1604 { "l7", 0x4600, "vdd_l5_l7", NULL, 0x0410 }, 1605 { "l8", 0x4700, "vdd_l8_l16_l18_19", }, 1606 { "l9", 0x4800, "vdd_l9_l10_l17_l22", }, 1607 { "l10", 0x4900, "vdd_l9_l10_l17_l22", }, 1608 { "l11", 0x4a00, "vdd_l4_l11", }, 1609 { "l12", 0x4b00, "vdd_l6_l12_l14_l15", }, 1610 { "l13", 0x4c00, "vdd_l13_l20_l23_l24", }, 1611 { "l14", 0x4d00, "vdd_l6_l12_l14_l15", }, 1612 { "l15", 0x4e00, "vdd_l6_l12_l14_l15", }, 1613 { "l16", 0x4f00, "vdd_l8_l16_l18_19", }, 1614 { "l17", 0x5000, "vdd_l9_l10_l17_l22", }, 1615 { "l18", 0x5100, "vdd_l8_l16_l18_19", }, 1616 { "l19", 0x5200, "vdd_l8_l16_l18_19", }, 1617 { "l20", 0x5300, "vdd_l13_l20_l23_l24", }, 1618 { "l21", 0x5400, "vdd_l21", }, 1619 { "l22", 0x5500, "vdd_l9_l10_l17_l22", }, 1620 { "l23", 0x5600, "vdd_l13_l20_l23_l24", }, 1621 { "l24", 0x5700, "vdd_l13_l20_l23_l24", }, 1622 { "lvs1", 0x8000, "vdd_l2_lvs_1_2_3", }, 1623 { "lvs2", 0x8100, "vdd_l2_lvs_1_2_3", }, 1624 { "lvs3", 0x8200, "vdd_l2_lvs_1_2_3", }, 1625 { "5vs1", 0x8300, "vin_5vs", "ocp-5vs1", }, 1626 { "5vs2", 0x8400, "vin_5vs", "ocp-5vs2", }, 1627 { } 1628 }; 1629 1630 static const struct spmi_regulator_data pm8841_regulators[] = { 1631 { "s1", 0x1400, "vdd_s1", }, 1632 { "s2", 0x1700, "vdd_s2", NULL, 0x1c08 }, 1633 { "s3", 0x1a00, "vdd_s3", }, 1634 { "s4", 0x1d00, "vdd_s4", NULL, 0x1c08 }, 1635 { "s5", 0x2000, "vdd_s5", NULL, 0x1c08 }, 1636 { "s6", 0x2300, "vdd_s6", NULL, 0x1c08 }, 1637 { "s7", 0x2600, "vdd_s7", NULL, 0x1c08 }, 1638 { "s8", 0x2900, "vdd_s8", NULL, 0x1c08 }, 1639 { } 1640 }; 1641 1642 static const struct spmi_regulator_data pm8916_regulators[] = { 1643 { "s1", 0x1400, "vdd_s1", }, 1644 { "s2", 0x1700, "vdd_s2", }, 1645 { "s3", 0x1a00, "vdd_s3", }, 1646 { "s4", 0x1d00, "vdd_s4", }, 1647 { "l1", 0x4000, "vdd_l1_l3", }, 1648 { "l2", 0x4100, "vdd_l2", }, 1649 { "l3", 0x4200, "vdd_l1_l3", }, 1650 { "l4", 0x4300, "vdd_l4_l5_l6", }, 1651 { "l5", 0x4400, "vdd_l4_l5_l6", }, 1652 { "l6", 0x4500, "vdd_l4_l5_l6", }, 1653 { "l7", 0x4600, "vdd_l7", }, 1654 { "l8", 0x4700, "vdd_l8_l11_l14_l15_l16", }, 1655 { "l9", 0x4800, "vdd_l9_l10_l12_l13_l17_l18", }, 1656 { "l10", 0x4900, "vdd_l9_l10_l12_l13_l17_l18", }, 1657 { "l11", 0x4a00, "vdd_l8_l11_l14_l15_l16", }, 1658 { "l12", 0x4b00, "vdd_l9_l10_l12_l13_l17_l18", }, 1659 { "l13", 0x4c00, "vdd_l9_l10_l12_l13_l17_l18", }, 1660 { "l14", 0x4d00, "vdd_l8_l11_l14_l15_l16", }, 1661 { "l15", 0x4e00, "vdd_l8_l11_l14_l15_l16", }, 1662 { "l16", 0x4f00, "vdd_l8_l11_l14_l15_l16", }, 1663 { "l17", 0x5000, "vdd_l9_l10_l12_l13_l17_l18", }, 1664 { "l18", 0x5100, "vdd_l9_l10_l12_l13_l17_l18", }, 1665 { } 1666 }; 1667 1668 static const struct spmi_regulator_data pm8994_regulators[] = { 1669 { "s1", 0x1400, "vdd_s1", }, 1670 { "s2", 0x1700, "vdd_s2", }, 1671 { "s3", 0x1a00, "vdd_s3", }, 1672 { "s4", 0x1d00, "vdd_s4", }, 1673 { "s5", 0x2000, "vdd_s5", }, 1674 { "s6", 0x2300, "vdd_s6", }, 1675 { "s7", 0x2600, "vdd_s7", }, 1676 { "s8", 0x2900, "vdd_s8", }, 1677 { "s9", 0x2c00, "vdd_s9", }, 1678 { "s10", 0x2f00, "vdd_s10", }, 1679 { "s11", 0x3200, "vdd_s11", }, 1680 { "s12", 0x3500, "vdd_s12", }, 1681 { "l1", 0x4000, "vdd_l1", }, 1682 { "l2", 0x4100, "vdd_l2_l26_l28", }, 1683 { "l3", 0x4200, "vdd_l3_l11", }, 1684 { "l4", 0x4300, "vdd_l4_l27_l31", }, 1685 { "l5", 0x4400, "vdd_l5_l7", }, 1686 { "l6", 0x4500, "vdd_l6_l12_l32", }, 1687 { "l7", 0x4600, "vdd_l5_l7", }, 1688 { "l8", 0x4700, "vdd_l8_l16_l30", }, 1689 { "l9", 0x4800, "vdd_l9_l10_l18_l22", }, 1690 { "l10", 0x4900, "vdd_l9_l10_l18_l22", }, 1691 { "l11", 0x4a00, "vdd_l3_l11", }, 1692 { "l12", 0x4b00, "vdd_l6_l12_l32", }, 1693 { "l13", 0x4c00, "vdd_l13_l19_l23_l24", }, 1694 { "l14", 0x4d00, "vdd_l14_l15", }, 1695 { "l15", 0x4e00, "vdd_l14_l15", }, 1696 { "l16", 0x4f00, "vdd_l8_l16_l30", }, 1697 { "l17", 0x5000, "vdd_l17_l29", }, 1698 { "l18", 0x5100, "vdd_l9_l10_l18_l22", }, 1699 { "l19", 0x5200, "vdd_l13_l19_l23_l24", }, 1700 { "l20", 0x5300, "vdd_l20_l21", }, 1701 { "l21", 0x5400, "vdd_l20_l21", }, 1702 { "l22", 0x5500, "vdd_l9_l10_l18_l22", }, 1703 { "l23", 0x5600, "vdd_l13_l19_l23_l24", }, 1704 { "l24", 0x5700, "vdd_l13_l19_l23_l24", }, 1705 { "l25", 0x5800, "vdd_l25", }, 1706 { "l26", 0x5900, "vdd_l2_l26_l28", }, 1707 { "l27", 0x5a00, "vdd_l4_l27_l31", }, 1708 { "l28", 0x5b00, "vdd_l2_l26_l28", }, 1709 { "l29", 0x5c00, "vdd_l17_l29", }, 1710 { "l30", 0x5d00, "vdd_l8_l16_l30", }, 1711 { "l31", 0x5e00, "vdd_l4_l27_l31", }, 1712 { "l32", 0x5f00, "vdd_l6_l12_l32", }, 1713 { "lvs1", 0x8000, "vdd_lvs_1_2", }, 1714 { "lvs2", 0x8100, "vdd_lvs_1_2", }, 1715 { } 1716 }; 1717 1718 static const struct spmi_regulator_data pmi8994_regulators[] = { 1719 { "s1", 0x1400, "vdd_s1", }, 1720 { "s2", 0x1700, "vdd_s2", }, 1721 { "s3", 0x1a00, "vdd_s3", }, 1722 { "l1", 0x4000, "vdd_l1", }, 1723 { } 1724 }; 1725 1726 static const struct of_device_id qcom_spmi_regulator_match[] = { 1727 { .compatible = "qcom,pm8841-regulators", .data = &pm8841_regulators }, 1728 { .compatible = "qcom,pm8916-regulators", .data = &pm8916_regulators }, 1729 { .compatible = "qcom,pm8941-regulators", .data = &pm8941_regulators }, 1730 { .compatible = "qcom,pm8994-regulators", .data = &pm8994_regulators }, 1731 { .compatible = "qcom,pmi8994-regulators", .data = &pmi8994_regulators }, 1732 { } 1733 }; 1734 MODULE_DEVICE_TABLE(of, qcom_spmi_regulator_match); 1735 1736 static int qcom_spmi_regulator_probe(struct platform_device *pdev) 1737 { 1738 const struct spmi_regulator_data *reg; 1739 const struct of_device_id *match; 1740 struct regulator_config config = { }; 1741 struct regulator_dev *rdev; 1742 struct spmi_regulator *vreg; 1743 struct regmap *regmap; 1744 const char *name; 1745 struct device *dev = &pdev->dev; 1746 struct device_node *node = pdev->dev.of_node; 1747 struct device_node *syscon, *reg_node; 1748 struct property *reg_prop; 1749 int ret, lenp; 1750 struct list_head *vreg_list; 1751 1752 vreg_list = devm_kzalloc(dev, sizeof(*vreg_list), GFP_KERNEL); 1753 if (!vreg_list) 1754 return -ENOMEM; 1755 INIT_LIST_HEAD(vreg_list); 1756 platform_set_drvdata(pdev, vreg_list); 1757 1758 regmap = dev_get_regmap(dev->parent, NULL); 1759 if (!regmap) 1760 return -ENODEV; 1761 1762 match = of_match_device(qcom_spmi_regulator_match, &pdev->dev); 1763 if (!match) 1764 return -ENODEV; 1765 1766 if (of_find_property(node, "qcom,saw-reg", &lenp)) { 1767 syscon = of_parse_phandle(node, "qcom,saw-reg", 0); 1768 saw_regmap = syscon_node_to_regmap(syscon); 1769 of_node_put(syscon); 1770 if (IS_ERR(saw_regmap)) 1771 dev_err(dev, "ERROR reading SAW regmap\n"); 1772 } 1773 1774 for (reg = match->data; reg->name; reg++) { 1775 1776 if (saw_regmap) { 1777 reg_node = of_get_child_by_name(node, reg->name); 1778 reg_prop = of_find_property(reg_node, "qcom,saw-slave", 1779 &lenp); 1780 of_node_put(reg_node); 1781 if (reg_prop) 1782 continue; 1783 } 1784 1785 vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL); 1786 if (!vreg) 1787 return -ENOMEM; 1788 1789 vreg->dev = dev; 1790 vreg->base = reg->base; 1791 vreg->regmap = regmap; 1792 if (reg->ocp) { 1793 vreg->ocp_irq = platform_get_irq_byname(pdev, reg->ocp); 1794 if (vreg->ocp_irq < 0) { 1795 ret = vreg->ocp_irq; 1796 goto err; 1797 } 1798 } 1799 vreg->desc.id = -1; 1800 vreg->desc.owner = THIS_MODULE; 1801 vreg->desc.type = REGULATOR_VOLTAGE; 1802 vreg->desc.enable_reg = reg->base + SPMI_COMMON_REG_ENABLE; 1803 vreg->desc.enable_mask = SPMI_COMMON_ENABLE_MASK; 1804 vreg->desc.enable_val = SPMI_COMMON_ENABLE; 1805 vreg->desc.name = name = reg->name; 1806 vreg->desc.supply_name = reg->supply; 1807 vreg->desc.of_match = reg->name; 1808 vreg->desc.of_parse_cb = spmi_regulator_of_parse; 1809 vreg->desc.of_map_mode = spmi_regulator_of_map_mode; 1810 1811 ret = spmi_regulator_match(vreg, reg->force_type); 1812 if (ret) 1813 continue; 1814 1815 if (saw_regmap) { 1816 reg_node = of_get_child_by_name(node, reg->name); 1817 reg_prop = of_find_property(reg_node, "qcom,saw-leader", 1818 &lenp); 1819 of_node_put(reg_node); 1820 if (reg_prop) { 1821 spmi_saw_ops = *(vreg->desc.ops); 1822 spmi_saw_ops.set_voltage_sel = 1823 spmi_regulator_saw_set_voltage; 1824 vreg->desc.ops = &spmi_saw_ops; 1825 } 1826 } 1827 1828 config.dev = dev; 1829 config.driver_data = vreg; 1830 config.regmap = regmap; 1831 rdev = devm_regulator_register(dev, &vreg->desc, &config); 1832 if (IS_ERR(rdev)) { 1833 dev_err(dev, "failed to register %s\n", name); 1834 ret = PTR_ERR(rdev); 1835 goto err; 1836 } 1837 1838 INIT_LIST_HEAD(&vreg->node); 1839 list_add(&vreg->node, vreg_list); 1840 } 1841 1842 return 0; 1843 1844 err: 1845 list_for_each_entry(vreg, vreg_list, node) 1846 if (vreg->ocp_irq) 1847 cancel_delayed_work_sync(&vreg->ocp_work); 1848 return ret; 1849 } 1850 1851 static int qcom_spmi_regulator_remove(struct platform_device *pdev) 1852 { 1853 struct spmi_regulator *vreg; 1854 struct list_head *vreg_list = platform_get_drvdata(pdev); 1855 1856 list_for_each_entry(vreg, vreg_list, node) 1857 if (vreg->ocp_irq) 1858 cancel_delayed_work_sync(&vreg->ocp_work); 1859 1860 return 0; 1861 } 1862 1863 static struct platform_driver qcom_spmi_regulator_driver = { 1864 .driver = { 1865 .name = "qcom-spmi-regulator", 1866 .of_match_table = qcom_spmi_regulator_match, 1867 }, 1868 .probe = qcom_spmi_regulator_probe, 1869 .remove = qcom_spmi_regulator_remove, 1870 }; 1871 module_platform_driver(qcom_spmi_regulator_driver); 1872 1873 MODULE_DESCRIPTION("Qualcomm SPMI PMIC regulator driver"); 1874 MODULE_LICENSE("GPL v2"); 1875 MODULE_ALIAS("platform:qcom-spmi-regulator"); 1876