1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2015, Sony Mobile Communications AB. 4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. 5 */ 6 7 #include <linux/module.h> 8 #include <linux/of.h> 9 #include <linux/of_device.h> 10 #include <linux/platform_device.h> 11 #include <linux/regulator/driver.h> 12 #include <linux/soc/qcom/smd-rpm.h> 13 14 struct qcom_rpm_reg { 15 struct device *dev; 16 17 struct qcom_smd_rpm *rpm; 18 19 u32 type; 20 u32 id; 21 22 struct regulator_desc desc; 23 24 int is_enabled; 25 int uV; 26 u32 load; 27 28 unsigned int enabled_updated:1; 29 unsigned int uv_updated:1; 30 unsigned int load_updated:1; 31 }; 32 33 struct rpm_regulator_req { 34 __le32 key; 35 __le32 nbytes; 36 __le32 value; 37 }; 38 39 #define RPM_KEY_SWEN 0x6e657773 /* "swen" */ 40 #define RPM_KEY_UV 0x00007675 /* "uv" */ 41 #define RPM_KEY_MA 0x0000616d /* "ma" */ 42 43 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg) 44 { 45 struct rpm_regulator_req req[3]; 46 int reqlen = 0; 47 int ret; 48 49 if (vreg->enabled_updated) { 50 req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN); 51 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 52 req[reqlen].value = cpu_to_le32(vreg->is_enabled); 53 reqlen++; 54 } 55 56 if (vreg->uv_updated && vreg->is_enabled) { 57 req[reqlen].key = cpu_to_le32(RPM_KEY_UV); 58 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 59 req[reqlen].value = cpu_to_le32(vreg->uV); 60 reqlen++; 61 } 62 63 if (vreg->load_updated && vreg->is_enabled) { 64 req[reqlen].key = cpu_to_le32(RPM_KEY_MA); 65 req[reqlen].nbytes = cpu_to_le32(sizeof(u32)); 66 req[reqlen].value = cpu_to_le32(vreg->load / 1000); 67 reqlen++; 68 } 69 70 if (!reqlen) 71 return 0; 72 73 ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE, 74 vreg->type, vreg->id, 75 req, sizeof(req[0]) * reqlen); 76 if (!ret) { 77 vreg->enabled_updated = 0; 78 vreg->uv_updated = 0; 79 vreg->load_updated = 0; 80 } 81 82 return ret; 83 } 84 85 static int rpm_reg_enable(struct regulator_dev *rdev) 86 { 87 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 88 int ret; 89 90 vreg->is_enabled = 1; 91 vreg->enabled_updated = 1; 92 93 ret = rpm_reg_write_active(vreg); 94 if (ret) 95 vreg->is_enabled = 0; 96 97 return ret; 98 } 99 100 static int rpm_reg_is_enabled(struct regulator_dev *rdev) 101 { 102 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 103 104 return vreg->is_enabled; 105 } 106 107 static int rpm_reg_disable(struct regulator_dev *rdev) 108 { 109 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 110 int ret; 111 112 vreg->is_enabled = 0; 113 vreg->enabled_updated = 1; 114 115 ret = rpm_reg_write_active(vreg); 116 if (ret) 117 vreg->is_enabled = 1; 118 119 return ret; 120 } 121 122 static int rpm_reg_get_voltage(struct regulator_dev *rdev) 123 { 124 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 125 126 return vreg->uV; 127 } 128 129 static int rpm_reg_set_voltage(struct regulator_dev *rdev, 130 int min_uV, 131 int max_uV, 132 unsigned *selector) 133 { 134 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 135 int ret; 136 int old_uV = vreg->uV; 137 138 vreg->uV = min_uV; 139 vreg->uv_updated = 1; 140 141 ret = rpm_reg_write_active(vreg); 142 if (ret) 143 vreg->uV = old_uV; 144 145 return ret; 146 } 147 148 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA) 149 { 150 struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev); 151 u32 old_load = vreg->load; 152 int ret; 153 154 vreg->load = load_uA; 155 vreg->load_updated = 1; 156 ret = rpm_reg_write_active(vreg); 157 if (ret) 158 vreg->load = old_load; 159 160 return ret; 161 } 162 163 static const struct regulator_ops rpm_smps_ldo_ops = { 164 .enable = rpm_reg_enable, 165 .disable = rpm_reg_disable, 166 .is_enabled = rpm_reg_is_enabled, 167 .list_voltage = regulator_list_voltage_linear_range, 168 169 .get_voltage = rpm_reg_get_voltage, 170 .set_voltage = rpm_reg_set_voltage, 171 172 .set_load = rpm_reg_set_load, 173 }; 174 175 static const struct regulator_ops rpm_smps_ldo_ops_fixed = { 176 .enable = rpm_reg_enable, 177 .disable = rpm_reg_disable, 178 .is_enabled = rpm_reg_is_enabled, 179 180 .get_voltage = rpm_reg_get_voltage, 181 .set_voltage = rpm_reg_set_voltage, 182 183 .set_load = rpm_reg_set_load, 184 }; 185 186 static const struct regulator_ops rpm_switch_ops = { 187 .enable = rpm_reg_enable, 188 .disable = rpm_reg_disable, 189 .is_enabled = rpm_reg_is_enabled, 190 }; 191 192 static const struct regulator_ops rpm_bob_ops = { 193 .enable = rpm_reg_enable, 194 .disable = rpm_reg_disable, 195 .is_enabled = rpm_reg_is_enabled, 196 197 .get_voltage = rpm_reg_get_voltage, 198 .set_voltage = rpm_reg_set_voltage, 199 }; 200 201 static const struct regulator_ops rpm_mp5496_ops = { 202 .enable = rpm_reg_enable, 203 .disable = rpm_reg_disable, 204 .is_enabled = rpm_reg_is_enabled, 205 .list_voltage = regulator_list_voltage_linear_range, 206 207 .set_voltage = rpm_reg_set_voltage, 208 }; 209 210 static const struct regulator_desc pma8084_hfsmps = { 211 .linear_ranges = (struct linear_range[]) { 212 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 213 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), 214 }, 215 .n_linear_ranges = 2, 216 .n_voltages = 159, 217 .ops = &rpm_smps_ldo_ops, 218 }; 219 220 static const struct regulator_desc pma8084_ftsmps = { 221 .linear_ranges = (struct linear_range[]) { 222 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), 223 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), 224 }, 225 .n_linear_ranges = 2, 226 .n_voltages = 262, 227 .ops = &rpm_smps_ldo_ops, 228 }; 229 230 static const struct regulator_desc pma8084_pldo = { 231 .linear_ranges = (struct linear_range[]) { 232 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 233 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 234 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 235 }, 236 .n_linear_ranges = 3, 237 .n_voltages = 164, 238 .ops = &rpm_smps_ldo_ops, 239 }; 240 241 static const struct regulator_desc pma8084_nldo = { 242 .linear_ranges = (struct linear_range[]) { 243 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 244 }, 245 .n_linear_ranges = 1, 246 .n_voltages = 64, 247 .ops = &rpm_smps_ldo_ops, 248 }; 249 250 static const struct regulator_desc pma8084_switch = { 251 .ops = &rpm_switch_ops, 252 }; 253 254 static const struct regulator_desc pm8226_hfsmps = { 255 .linear_ranges = (struct linear_range[]) { 256 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 257 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000), 258 }, 259 .n_linear_ranges = 2, 260 .n_voltages = 159, 261 .ops = &rpm_smps_ldo_ops, 262 }; 263 264 static const struct regulator_desc pm8226_ftsmps = { 265 .linear_ranges = (struct linear_range[]) { 266 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), 267 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), 268 }, 269 .n_linear_ranges = 2, 270 .n_voltages = 262, 271 .ops = &rpm_smps_ldo_ops, 272 }; 273 274 static const struct regulator_desc pm8226_pldo = { 275 .linear_ranges = (struct linear_range[]) { 276 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 277 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 278 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 279 }, 280 .n_linear_ranges = 3, 281 .n_voltages = 164, 282 .ops = &rpm_smps_ldo_ops, 283 }; 284 285 static const struct regulator_desc pm8226_nldo = { 286 .linear_ranges = (struct linear_range[]) { 287 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 288 }, 289 .n_linear_ranges = 1, 290 .n_voltages = 64, 291 .ops = &rpm_smps_ldo_ops, 292 }; 293 294 static const struct regulator_desc pm8226_switch = { 295 .ops = &rpm_switch_ops, 296 }; 297 298 static const struct regulator_desc pm8x41_hfsmps = { 299 .linear_ranges = (struct linear_range[]) { 300 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), 301 REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000), 302 }, 303 .n_linear_ranges = 2, 304 .n_voltages = 159, 305 .ops = &rpm_smps_ldo_ops, 306 }; 307 308 static const struct regulator_desc pm8841_ftsmps = { 309 .linear_ranges = (struct linear_range[]) { 310 REGULATOR_LINEAR_RANGE(350000, 0, 184, 5000), 311 REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000), 312 }, 313 .n_linear_ranges = 2, 314 .n_voltages = 262, 315 .ops = &rpm_smps_ldo_ops, 316 }; 317 318 static const struct regulator_desc pm8941_boost = { 319 .linear_ranges = (struct linear_range[]) { 320 REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000), 321 }, 322 .n_linear_ranges = 1, 323 .n_voltages = 31, 324 .ops = &rpm_smps_ldo_ops, 325 }; 326 327 static const struct regulator_desc pm8941_pldo = { 328 .linear_ranges = (struct linear_range[]) { 329 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 330 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 331 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 332 }, 333 .n_linear_ranges = 3, 334 .n_voltages = 164, 335 .ops = &rpm_smps_ldo_ops, 336 }; 337 338 static const struct regulator_desc pm8941_nldo = { 339 .linear_ranges = (struct linear_range[]) { 340 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 341 }, 342 .n_linear_ranges = 1, 343 .n_voltages = 64, 344 .ops = &rpm_smps_ldo_ops, 345 }; 346 347 static const struct regulator_desc pm8941_lnldo = { 348 .fixed_uV = 1740000, 349 .n_voltages = 1, 350 .ops = &rpm_smps_ldo_ops_fixed, 351 }; 352 353 static const struct regulator_desc pm8941_switch = { 354 .ops = &rpm_switch_ops, 355 }; 356 357 static const struct regulator_desc pm8916_pldo = { 358 .linear_ranges = (struct linear_range[]) { 359 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500), 360 }, 361 .n_linear_ranges = 1, 362 .n_voltages = 209, 363 .ops = &rpm_smps_ldo_ops, 364 }; 365 366 static const struct regulator_desc pm8916_nldo = { 367 .linear_ranges = (struct linear_range[]) { 368 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), 369 }, 370 .n_linear_ranges = 1, 371 .n_voltages = 94, 372 .ops = &rpm_smps_ldo_ops, 373 }; 374 375 static const struct regulator_desc pm8916_buck_lvo_smps = { 376 .linear_ranges = (struct linear_range[]) { 377 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 378 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000), 379 }, 380 .n_linear_ranges = 2, 381 .n_voltages = 128, 382 .ops = &rpm_smps_ldo_ops, 383 }; 384 385 static const struct regulator_desc pm8916_buck_hvo_smps = { 386 .linear_ranges = (struct linear_range[]) { 387 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000), 388 }, 389 .n_linear_ranges = 1, 390 .n_voltages = 32, 391 .ops = &rpm_smps_ldo_ops, 392 }; 393 394 static const struct regulator_desc pm8950_hfsmps = { 395 .linear_ranges = (struct linear_range[]) { 396 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500), 397 REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000), 398 }, 399 .n_linear_ranges = 2, 400 .n_voltages = 128, 401 .ops = &rpm_smps_ldo_ops, 402 }; 403 404 static const struct regulator_desc pm8950_ftsmps2p5 = { 405 .linear_ranges = (struct linear_range[]) { 406 REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000), 407 REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000), 408 }, 409 .n_linear_ranges = 2, 410 .n_voltages = 461, 411 .ops = &rpm_smps_ldo_ops, 412 }; 413 414 static const struct regulator_desc pm8950_ult_nldo = { 415 .linear_ranges = (struct linear_range[]) { 416 REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500), 417 }, 418 .n_linear_ranges = 1, 419 .n_voltages = 203, 420 .ops = &rpm_smps_ldo_ops, 421 }; 422 423 static const struct regulator_desc pm8950_ult_pldo = { 424 .linear_ranges = (struct linear_range[]) { 425 REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500), 426 }, 427 .n_linear_ranges = 1, 428 .n_voltages = 128, 429 .ops = &rpm_smps_ldo_ops, 430 }; 431 432 static const struct regulator_desc pm8950_pldo_lv = { 433 .linear_ranges = (struct linear_range[]) { 434 REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000), 435 }, 436 .n_linear_ranges = 1, 437 .n_voltages = 17, 438 .ops = &rpm_smps_ldo_ops, 439 }; 440 441 static const struct regulator_desc pm8950_pldo = { 442 .linear_ranges = (struct linear_range[]) { 443 REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500), 444 }, 445 .n_linear_ranges = 1, 446 .n_voltages = 165, 447 .ops = &rpm_smps_ldo_ops, 448 }; 449 450 static const struct regulator_desc pm8953_lnldo = { 451 .linear_ranges = (struct linear_range[]) { 452 REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000), 453 REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000), 454 }, 455 .n_linear_ranges = 2, 456 .n_voltages = 16, 457 .ops = &rpm_smps_ldo_ops, 458 }; 459 460 static const struct regulator_desc pm8953_ult_nldo = { 461 .linear_ranges = (struct linear_range[]) { 462 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500), 463 }, 464 .n_linear_ranges = 1, 465 .n_voltages = 94, 466 .ops = &rpm_smps_ldo_ops, 467 }; 468 469 static const struct regulator_desc pm8994_hfsmps = { 470 .linear_ranges = (struct linear_range[]) { 471 REGULATOR_LINEAR_RANGE( 375000, 0, 95, 12500), 472 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000), 473 }, 474 .n_linear_ranges = 2, 475 .n_voltages = 159, 476 .ops = &rpm_smps_ldo_ops, 477 }; 478 479 static const struct regulator_desc pm8994_ftsmps = { 480 .linear_ranges = (struct linear_range[]) { 481 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), 482 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), 483 }, 484 .n_linear_ranges = 2, 485 .n_voltages = 350, 486 .ops = &rpm_smps_ldo_ops, 487 }; 488 489 static const struct regulator_desc pm8994_nldo = { 490 .linear_ranges = (struct linear_range[]) { 491 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500), 492 }, 493 .n_linear_ranges = 1, 494 .n_voltages = 64, 495 .ops = &rpm_smps_ldo_ops, 496 }; 497 498 static const struct regulator_desc pm8994_pldo = { 499 .linear_ranges = (struct linear_range[]) { 500 REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500), 501 REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000), 502 REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000), 503 }, 504 .n_linear_ranges = 3, 505 .n_voltages = 164, 506 .ops = &rpm_smps_ldo_ops, 507 }; 508 509 static const struct regulator_desc pm8994_switch = { 510 .ops = &rpm_switch_ops, 511 }; 512 513 static const struct regulator_desc pm8994_lnldo = { 514 .fixed_uV = 1740000, 515 .n_voltages = 1, 516 .ops = &rpm_smps_ldo_ops_fixed, 517 }; 518 519 static const struct regulator_desc pmi8994_ftsmps = { 520 .linear_ranges = (struct linear_range[]) { 521 REGULATOR_LINEAR_RANGE(350000, 0, 199, 5000), 522 REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000), 523 }, 524 .n_linear_ranges = 2, 525 .n_voltages = 350, 526 .ops = &rpm_smps_ldo_ops, 527 }; 528 529 static const struct regulator_desc pmi8994_hfsmps = { 530 .linear_ranges = (struct linear_range[]) { 531 REGULATOR_LINEAR_RANGE(350000, 0, 80, 12500), 532 REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000), 533 }, 534 .n_linear_ranges = 2, 535 .n_voltages = 142, 536 .ops = &rpm_smps_ldo_ops, 537 }; 538 539 static const struct regulator_desc pmi8994_bby = { 540 .linear_ranges = (struct linear_range[]) { 541 REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000), 542 }, 543 .n_linear_ranges = 1, 544 .n_voltages = 45, 545 .ops = &rpm_bob_ops, 546 }; 547 548 static const struct regulator_desc pm8998_ftsmps = { 549 .linear_ranges = (struct linear_range[]) { 550 REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000), 551 }, 552 .n_linear_ranges = 1, 553 .n_voltages = 259, 554 .ops = &rpm_smps_ldo_ops, 555 }; 556 557 static const struct regulator_desc pm8998_hfsmps = { 558 .linear_ranges = (struct linear_range[]) { 559 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 560 }, 561 .n_linear_ranges = 1, 562 .n_voltages = 216, 563 .ops = &rpm_smps_ldo_ops, 564 }; 565 566 static const struct regulator_desc pm8998_nldo = { 567 .linear_ranges = (struct linear_range[]) { 568 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 569 }, 570 .n_linear_ranges = 1, 571 .n_voltages = 128, 572 .ops = &rpm_smps_ldo_ops, 573 }; 574 575 static const struct regulator_desc pm8998_pldo = { 576 .linear_ranges = (struct linear_range[]) { 577 REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000), 578 }, 579 .n_linear_ranges = 1, 580 .n_voltages = 256, 581 .ops = &rpm_smps_ldo_ops, 582 }; 583 584 static const struct regulator_desc pm8998_pldo_lv = { 585 .linear_ranges = (struct linear_range[]) { 586 REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000), 587 }, 588 .n_linear_ranges = 1, 589 .n_voltages = 128, 590 .ops = &rpm_smps_ldo_ops, 591 }; 592 593 static const struct regulator_desc pm8998_switch = { 594 .ops = &rpm_switch_ops, 595 }; 596 597 static const struct regulator_desc pmi8998_bob = { 598 .linear_ranges = (struct linear_range[]) { 599 REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000), 600 }, 601 .n_linear_ranges = 1, 602 .n_voltages = 84, 603 .ops = &rpm_bob_ops, 604 }; 605 606 static const struct regulator_desc pm660_ftsmps = { 607 .linear_ranges = (struct linear_range[]) { 608 REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000), 609 }, 610 .n_linear_ranges = 1, 611 .n_voltages = 200, 612 .ops = &rpm_smps_ldo_ops, 613 }; 614 615 static const struct regulator_desc pm660_hfsmps = { 616 .linear_ranges = (struct linear_range[]) { 617 REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000), 618 }, 619 .n_linear_ranges = 1, 620 .n_voltages = 217, 621 .ops = &rpm_smps_ldo_ops, 622 }; 623 624 static const struct regulator_desc pm660_ht_nldo = { 625 .linear_ranges = (struct linear_range[]) { 626 REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000), 627 }, 628 .n_linear_ranges = 1, 629 .n_voltages = 125, 630 .ops = &rpm_smps_ldo_ops, 631 }; 632 633 static const struct regulator_desc pm660_ht_lvpldo = { 634 .linear_ranges = (struct linear_range[]) { 635 REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000), 636 }, 637 .n_linear_ranges = 1, 638 .n_voltages = 63, 639 .ops = &rpm_smps_ldo_ops, 640 }; 641 642 static const struct regulator_desc pm660_nldo660 = { 643 .linear_ranges = (struct linear_range[]) { 644 REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000), 645 }, 646 .n_linear_ranges = 1, 647 .n_voltages = 124, 648 .ops = &rpm_smps_ldo_ops, 649 }; 650 651 static const struct regulator_desc pm660_pldo660 = { 652 .linear_ranges = (struct linear_range[]) { 653 REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000), 654 }, 655 .n_linear_ranges = 1, 656 .n_voltages = 256, 657 .ops = &rpm_smps_ldo_ops, 658 }; 659 660 static const struct regulator_desc pm660l_bob = { 661 .linear_ranges = (struct linear_range[]) { 662 REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000), 663 }, 664 .n_linear_ranges = 1, 665 .n_voltages = 85, 666 .ops = &rpm_bob_ops, 667 }; 668 669 static const struct regulator_desc pms405_hfsmps3 = { 670 .linear_ranges = (struct linear_range[]) { 671 REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000), 672 }, 673 .n_linear_ranges = 1, 674 .n_voltages = 216, 675 .ops = &rpm_smps_ldo_ops, 676 }; 677 678 static const struct regulator_desc pms405_nldo300 = { 679 .linear_ranges = (struct linear_range[]) { 680 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 681 }, 682 .n_linear_ranges = 1, 683 .n_voltages = 128, 684 .ops = &rpm_smps_ldo_ops, 685 }; 686 687 static const struct regulator_desc pms405_nldo1200 = { 688 .linear_ranges = (struct linear_range[]) { 689 REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000), 690 }, 691 .n_linear_ranges = 1, 692 .n_voltages = 128, 693 .ops = &rpm_smps_ldo_ops, 694 }; 695 696 static const struct regulator_desc pms405_pldo50 = { 697 .linear_ranges = (struct linear_range[]) { 698 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), 699 }, 700 .n_linear_ranges = 1, 701 .n_voltages = 129, 702 .ops = &rpm_smps_ldo_ops, 703 }; 704 705 static const struct regulator_desc pms405_pldo150 = { 706 .linear_ranges = (struct linear_range[]) { 707 REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000), 708 }, 709 .n_linear_ranges = 1, 710 .n_voltages = 129, 711 .ops = &rpm_smps_ldo_ops, 712 }; 713 714 static const struct regulator_desc pms405_pldo600 = { 715 .linear_ranges = (struct linear_range[]) { 716 REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000), 717 }, 718 .n_linear_ranges = 1, 719 .n_voltages = 99, 720 .ops = &rpm_smps_ldo_ops, 721 }; 722 723 static const struct regulator_desc mp5496_smpa2 = { 724 .linear_ranges = (struct linear_range[]) { 725 REGULATOR_LINEAR_RANGE(725000, 0, 27, 12500), 726 }, 727 .n_linear_ranges = 1, 728 .n_voltages = 28, 729 .ops = &rpm_mp5496_ops, 730 }; 731 732 static const struct regulator_desc mp5496_ldoa2 = { 733 .linear_ranges = (struct linear_range[]) { 734 REGULATOR_LINEAR_RANGE(1800000, 0, 60, 25000), 735 }, 736 .n_linear_ranges = 1, 737 .n_voltages = 61, 738 .ops = &rpm_mp5496_ops, 739 }; 740 741 static const struct regulator_desc pm2250_lvftsmps = { 742 .linear_ranges = (struct linear_range[]) { 743 REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000), 744 }, 745 .n_linear_ranges = 1, 746 .n_voltages = 270, 747 .ops = &rpm_smps_ldo_ops, 748 }; 749 750 static const struct regulator_desc pm2250_ftsmps = { 751 .linear_ranges = (struct linear_range[]) { 752 REGULATOR_LINEAR_RANGE(640000, 0, 269, 8000), 753 }, 754 .n_linear_ranges = 1, 755 .n_voltages = 270, 756 .ops = &rpm_smps_ldo_ops, 757 }; 758 759 struct rpm_regulator_data { 760 const char *name; 761 u32 type; 762 u32 id; 763 const struct regulator_desc *desc; 764 const char *supply; 765 }; 766 767 static const struct rpm_regulator_data rpm_mp5496_regulators[] = { 768 { "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smpa2, "s2" }, 769 { "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" }, 770 {} 771 }; 772 773 static const struct rpm_regulator_data rpm_pm8841_regulators[] = { 774 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" }, 775 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" }, 776 { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" }, 777 { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" }, 778 { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" }, 779 { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" }, 780 { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" }, 781 { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" }, 782 {} 783 }; 784 785 static const struct rpm_regulator_data rpm_pm8916_regulators[] = { 786 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" }, 787 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" }, 788 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" }, 789 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" }, 790 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" }, 791 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" }, 792 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" }, 793 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" }, 794 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" }, 795 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" }, 796 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" }, 797 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, 798 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" }, 799 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 800 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 801 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 802 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 803 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 804 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 805 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 806 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 807 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"}, 808 {} 809 }; 810 811 static const struct rpm_regulator_data rpm_pm8226_regulators[] = { 812 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" }, 813 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" }, 814 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" }, 815 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" }, 816 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" }, 817 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 818 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 819 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" }, 820 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 821 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" }, 822 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 823 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 824 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 825 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 826 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" }, 827 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" }, 828 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" }, 829 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" }, 830 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" }, 831 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 832 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 833 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 834 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" }, 835 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 836 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 837 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 838 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 839 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 840 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" }, 841 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" }, 842 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" }, 843 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" }, 844 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" }, 845 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" }, 846 {} 847 }; 848 849 static const struct rpm_regulator_data rpm_pm8941_regulators[] = { 850 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" }, 851 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" }, 852 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" }, 853 { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost }, 854 855 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" }, 856 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" }, 857 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" }, 858 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" }, 859 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" }, 860 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 861 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" }, 862 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 863 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 864 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 865 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" }, 866 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 867 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 868 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 869 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" }, 870 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 871 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 872 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 873 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" }, 874 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 875 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" }, 876 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" }, 877 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 878 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" }, 879 880 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 881 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 882 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" }, 883 884 { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" }, 885 { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" }, 886 887 {} 888 }; 889 890 static const struct rpm_regulator_data rpm_pma8084_regulators[] = { 891 { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" }, 892 { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" }, 893 { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" }, 894 { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" }, 895 { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" }, 896 { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" }, 897 { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" }, 898 { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" }, 899 { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" }, 900 { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" }, 901 { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" }, 902 { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" }, 903 904 { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" }, 905 { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 906 { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 907 { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 908 { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" }, 909 { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 910 { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" }, 911 { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" }, 912 { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 913 { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 914 { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" }, 915 { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 916 { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 917 { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 918 { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 919 { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" }, 920 { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" }, 921 { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" }, 922 { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" }, 923 { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 924 { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" }, 925 { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" }, 926 { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 927 { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" }, 928 { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" }, 929 { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" }, 930 { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" }, 931 932 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch }, 933 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch }, 934 { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch }, 935 { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch }, 936 { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch }, 937 938 {} 939 }; 940 941 static const struct rpm_regulator_data rpm_pm8950_regulators[] = { 942 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" }, 943 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" }, 944 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" }, 945 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" }, 946 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" }, 947 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" }, 948 949 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" }, 950 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" }, 951 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" }, 952 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16" }, 953 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, 954 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, 955 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l4_l5_l6_l7_l16" }, 956 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" }, 957 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" }, 958 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"}, 959 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, 960 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, 961 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, 962 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, 963 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, 964 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16"}, 965 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22"}, 966 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18"}, 967 { "l19", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l1_l19"}, 968 { "l20", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l20"}, 969 { "l21", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l21"}, 970 { "l22", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22"}, 971 { "l23", QCOM_SMD_RPM_LDOA, 18, &pm8950_pldo, "vdd_l2_l23"}, 972 {} 973 }; 974 975 static const struct rpm_regulator_data rpm_pm8953_regulators[] = { 976 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_hfsmps, "vdd_s1" }, 977 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_hfsmps, "vdd_s2" }, 978 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, 979 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, 980 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8950_ftsmps2p5, "vdd_s5" }, 981 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_ftsmps2p5, "vdd_s6" }, 982 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" }, 983 984 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8953_ult_nldo, "vdd_l1" }, 985 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8953_ult_nldo, "vdd_l2_l3" }, 986 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8953_ult_nldo, "vdd_l2_l3" }, 987 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 988 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 989 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 990 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 991 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 992 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 993 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 994 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 995 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 996 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 997 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 998 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" }, 999 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" }, 1000 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 1001 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 1002 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" }, 1003 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo, "vdd_l20" }, 1004 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo, "vdd_l21" }, 1005 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" }, 1006 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" }, 1007 {} 1008 }; 1009 1010 static const struct rpm_regulator_data rpm_pm8994_regulators[] = { 1011 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" }, 1012 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" }, 1013 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" }, 1014 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" }, 1015 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" }, 1016 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" }, 1017 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" }, 1018 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" }, 1019 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" }, 1020 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" }, 1021 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" }, 1022 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" }, 1023 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" }, 1024 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" }, 1025 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" }, 1026 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" }, 1027 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" }, 1028 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" }, 1029 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" }, 1030 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" }, 1031 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 1032 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 1033 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" }, 1034 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" }, 1035 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 1036 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" }, 1037 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" }, 1038 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" }, 1039 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" }, 1040 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 1041 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 1042 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" }, 1043 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" }, 1044 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" }, 1045 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 1046 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" }, 1047 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" }, 1048 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" }, 1049 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" }, 1050 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" }, 1051 { "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" }, 1052 { "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" }, 1053 { "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" }, 1054 { "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" }, 1055 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" }, 1056 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" }, 1057 1058 {} 1059 }; 1060 1061 static const struct rpm_regulator_data rpm_pmi8994_regulators[] = { 1062 { "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" }, 1063 { "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" }, 1064 { "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" }, 1065 { "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" }, 1066 {} 1067 }; 1068 1069 static const struct rpm_regulator_data rpm_pm8998_regulators[] = { 1070 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" }, 1071 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" }, 1072 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" }, 1073 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" }, 1074 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" }, 1075 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" }, 1076 { "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" }, 1077 { "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" }, 1078 { "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" }, 1079 { "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" }, 1080 { "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" }, 1081 { "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" }, 1082 { "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" }, 1083 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" }, 1084 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" }, 1085 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" }, 1086 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" }, 1087 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" }, 1088 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" }, 1089 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 1090 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" }, 1091 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" }, 1092 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" }, 1093 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" }, 1094 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 1095 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" }, 1096 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 1097 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" }, 1098 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" }, 1099 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" }, 1100 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" }, 1101 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" }, 1102 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" }, 1103 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" }, 1104 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" }, 1105 { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" }, 1106 { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" }, 1107 { "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" }, 1108 { "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" }, 1109 { "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" }, 1110 { "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" }, 1111 { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" }, 1112 { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" }, 1113 {} 1114 }; 1115 1116 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = { 1117 { "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" }, 1118 {} 1119 }; 1120 1121 static const struct rpm_regulator_data rpm_pm660_regulators[] = { 1122 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" }, 1123 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" }, 1124 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" }, 1125 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" }, 1126 { "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" }, 1127 { "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" }, 1128 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" }, 1129 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" }, 1130 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" }, 1131 /* l4 is unaccessible on PM660 */ 1132 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" }, 1133 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" }, 1134 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" }, 1135 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1136 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1137 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1138 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1139 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1140 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1141 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" }, 1142 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1143 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1144 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1145 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1146 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" }, 1147 { } 1148 }; 1149 1150 static const struct rpm_regulator_data rpm_pm660l_regulators[] = { 1151 { "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" }, 1152 { "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" }, 1153 { "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" }, 1154 { "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" }, 1155 { "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" }, 1156 { "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" }, 1157 { "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 1158 { "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" }, 1159 { "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 1160 { "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" }, 1161 { "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 1162 { "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" }, 1163 { "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, 1164 { "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" }, 1165 { "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", }, 1166 { } 1167 }; 1168 1169 static const struct rpm_regulator_data rpm_pms405_regulators[] = { 1170 { "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" }, 1171 { "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" }, 1172 { "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" }, 1173 { "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" }, 1174 { "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" }, 1175 { "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" }, 1176 { "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" }, 1177 { "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" }, 1178 { "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" }, 1179 { "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" }, 1180 { "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" }, 1181 { "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" }, 1182 { "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" }, 1183 { "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" }, 1184 { "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" }, 1185 { "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 1186 { "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 1187 { "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" }, 1188 {} 1189 }; 1190 1191 static const struct rpm_regulator_data rpm_pm2250_regulators[] = { 1192 { "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" }, 1193 { "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" }, 1194 { "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" }, 1195 { "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" }, 1196 { "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1197 { "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1198 { "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1199 { "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1200 { "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1201 { "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1202 { "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1203 { "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1204 { "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1205 { "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1206 { "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1207 { "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" }, 1208 { "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 1209 { "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 1210 { "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 1211 { "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" }, 1212 { "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1213 { "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1214 { "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1215 { "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1216 { "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1217 { "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" }, 1218 {} 1219 }; 1220 1221 static const struct of_device_id rpm_of_match[] = { 1222 { .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators }, 1223 { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators }, 1224 { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators }, 1225 { .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators }, 1226 { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators }, 1227 { .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators }, 1228 { .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators }, 1229 { .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators }, 1230 { .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators }, 1231 { .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators }, 1232 { .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators }, 1233 { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators }, 1234 { .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators }, 1235 { .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators }, 1236 { .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators }, 1237 { .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators }, 1238 {} 1239 }; 1240 MODULE_DEVICE_TABLE(of, rpm_of_match); 1241 1242 static int rpm_reg_probe(struct platform_device *pdev) 1243 { 1244 const struct rpm_regulator_data *reg; 1245 const struct of_device_id *match; 1246 struct regulator_config config = { }; 1247 struct regulator_dev *rdev; 1248 struct qcom_rpm_reg *vreg; 1249 struct qcom_smd_rpm *rpm; 1250 1251 rpm = dev_get_drvdata(pdev->dev.parent); 1252 if (!rpm) { 1253 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n"); 1254 return -ENODEV; 1255 } 1256 1257 match = of_match_device(rpm_of_match, &pdev->dev); 1258 if (!match) { 1259 dev_err(&pdev->dev, "failed to match device\n"); 1260 return -ENODEV; 1261 } 1262 1263 for (reg = match->data; reg->name; reg++) { 1264 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL); 1265 if (!vreg) 1266 return -ENOMEM; 1267 1268 vreg->dev = &pdev->dev; 1269 vreg->type = reg->type; 1270 vreg->id = reg->id; 1271 vreg->rpm = rpm; 1272 1273 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc)); 1274 1275 vreg->desc.id = -1; 1276 vreg->desc.owner = THIS_MODULE; 1277 vreg->desc.type = REGULATOR_VOLTAGE; 1278 vreg->desc.name = reg->name; 1279 vreg->desc.supply_name = reg->supply; 1280 vreg->desc.of_match = reg->name; 1281 1282 config.dev = &pdev->dev; 1283 config.driver_data = vreg; 1284 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config); 1285 if (IS_ERR(rdev)) { 1286 dev_err(&pdev->dev, "failed to register %s\n", reg->name); 1287 return PTR_ERR(rdev); 1288 } 1289 } 1290 1291 return 0; 1292 } 1293 1294 static struct platform_driver rpm_reg_driver = { 1295 .probe = rpm_reg_probe, 1296 .driver = { 1297 .name = "qcom_rpm_smd_regulator", 1298 .of_match_table = rpm_of_match, 1299 }, 1300 }; 1301 1302 static int __init rpm_reg_init(void) 1303 { 1304 return platform_driver_register(&rpm_reg_driver); 1305 } 1306 subsys_initcall(rpm_reg_init); 1307 1308 static void __exit rpm_reg_exit(void) 1309 { 1310 platform_driver_unregister(&rpm_reg_driver); 1311 } 1312 module_exit(rpm_reg_exit) 1313 1314 MODULE_DESCRIPTION("Qualcomm RPM regulator driver"); 1315 MODULE_LICENSE("GPL v2"); 1316