1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2015, Sony Mobile Communications AB.
4  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
5  */
6 
7 #include <linux/module.h>
8 #include <linux/of.h>
9 #include <linux/of_device.h>
10 #include <linux/platform_device.h>
11 #include <linux/regulator/driver.h>
12 #include <linux/regulator/of_regulator.h>
13 #include <linux/soc/qcom/smd-rpm.h>
14 
15 struct qcom_rpm_reg {
16 	struct device *dev;
17 
18 	struct qcom_smd_rpm *rpm;
19 
20 	u32 type;
21 	u32 id;
22 
23 	struct regulator_desc desc;
24 
25 	int is_enabled;
26 	int uV;
27 	u32 load;
28 
29 	unsigned int enabled_updated:1;
30 	unsigned int uv_updated:1;
31 	unsigned int load_updated:1;
32 };
33 
34 struct rpm_regulator_req {
35 	__le32 key;
36 	__le32 nbytes;
37 	__le32 value;
38 };
39 
40 #define RPM_KEY_SWEN	0x6e657773 /* "swen" */
41 #define RPM_KEY_UV	0x00007675 /* "uv" */
42 #define RPM_KEY_MA	0x0000616d /* "ma" */
43 
44 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg)
45 {
46 	struct rpm_regulator_req req[3];
47 	int reqlen = 0;
48 	int ret;
49 
50 	if (vreg->enabled_updated) {
51 		req[reqlen].key = cpu_to_le32(RPM_KEY_SWEN);
52 		req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
53 		req[reqlen].value = cpu_to_le32(vreg->is_enabled);
54 		reqlen++;
55 	}
56 
57 	if (vreg->uv_updated && vreg->is_enabled) {
58 		req[reqlen].key = cpu_to_le32(RPM_KEY_UV);
59 		req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
60 		req[reqlen].value = cpu_to_le32(vreg->uV);
61 		reqlen++;
62 	}
63 
64 	if (vreg->load_updated && vreg->is_enabled) {
65 		req[reqlen].key = cpu_to_le32(RPM_KEY_MA);
66 		req[reqlen].nbytes = cpu_to_le32(sizeof(u32));
67 		req[reqlen].value = cpu_to_le32(vreg->load / 1000);
68 		reqlen++;
69 	}
70 
71 	if (!reqlen)
72 		return 0;
73 
74 	ret = qcom_rpm_smd_write(vreg->rpm, QCOM_SMD_RPM_ACTIVE_STATE,
75 				 vreg->type, vreg->id,
76 				 req, sizeof(req[0]) * reqlen);
77 	if (!ret) {
78 		vreg->enabled_updated = 0;
79 		vreg->uv_updated = 0;
80 		vreg->load_updated = 0;
81 	}
82 
83 	return ret;
84 }
85 
86 static int rpm_reg_enable(struct regulator_dev *rdev)
87 {
88 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
89 	int ret;
90 
91 	vreg->is_enabled = 1;
92 	vreg->enabled_updated = 1;
93 
94 	ret = rpm_reg_write_active(vreg);
95 	if (ret)
96 		vreg->is_enabled = 0;
97 
98 	return ret;
99 }
100 
101 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
102 {
103 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
104 
105 	return vreg->is_enabled;
106 }
107 
108 static int rpm_reg_disable(struct regulator_dev *rdev)
109 {
110 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
111 	int ret;
112 
113 	vreg->is_enabled = 0;
114 	vreg->enabled_updated = 1;
115 
116 	ret = rpm_reg_write_active(vreg);
117 	if (ret)
118 		vreg->is_enabled = 1;
119 
120 	return ret;
121 }
122 
123 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
124 {
125 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
126 
127 	return vreg->uV;
128 }
129 
130 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
131 			       int min_uV,
132 			       int max_uV,
133 			       unsigned *selector)
134 {
135 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
136 	int ret;
137 	int old_uV = vreg->uV;
138 
139 	vreg->uV = min_uV;
140 	vreg->uv_updated = 1;
141 
142 	ret = rpm_reg_write_active(vreg);
143 	if (ret)
144 		vreg->uV = old_uV;
145 
146 	return ret;
147 }
148 
149 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
150 {
151 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
152 	u32 old_load = vreg->load;
153 	int ret;
154 
155 	vreg->load = load_uA;
156 	vreg->load_updated = 1;
157 	ret = rpm_reg_write_active(vreg);
158 	if (ret)
159 		vreg->load = old_load;
160 
161 	return ret;
162 }
163 
164 static const struct regulator_ops rpm_smps_ldo_ops = {
165 	.enable = rpm_reg_enable,
166 	.disable = rpm_reg_disable,
167 	.is_enabled = rpm_reg_is_enabled,
168 	.list_voltage = regulator_list_voltage_linear_range,
169 
170 	.get_voltage = rpm_reg_get_voltage,
171 	.set_voltage = rpm_reg_set_voltage,
172 
173 	.set_load = rpm_reg_set_load,
174 };
175 
176 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
177 	.enable = rpm_reg_enable,
178 	.disable = rpm_reg_disable,
179 	.is_enabled = rpm_reg_is_enabled,
180 
181 	.get_voltage = rpm_reg_get_voltage,
182 	.set_voltage = rpm_reg_set_voltage,
183 
184 	.set_load = rpm_reg_set_load,
185 };
186 
187 static const struct regulator_ops rpm_switch_ops = {
188 	.enable = rpm_reg_enable,
189 	.disable = rpm_reg_disable,
190 	.is_enabled = rpm_reg_is_enabled,
191 };
192 
193 static const struct regulator_ops rpm_bob_ops = {
194 	.enable = rpm_reg_enable,
195 	.disable = rpm_reg_disable,
196 	.is_enabled = rpm_reg_is_enabled,
197 
198 	.get_voltage = rpm_reg_get_voltage,
199 	.set_voltage = rpm_reg_set_voltage,
200 };
201 
202 static const struct regulator_ops rpm_mp5496_ops = {
203 	.enable = rpm_reg_enable,
204 	.disable = rpm_reg_disable,
205 	.is_enabled = rpm_reg_is_enabled,
206 	.list_voltage = regulator_list_voltage_linear_range,
207 
208 	.get_voltage = rpm_reg_get_voltage,
209 	.set_voltage = rpm_reg_set_voltage,
210 };
211 
212 static const struct regulator_desc pma8084_hfsmps = {
213 	.linear_ranges = (struct linear_range[]) {
214 		REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
215 		REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
216 	},
217 	.n_linear_ranges = 2,
218 	.n_voltages = 159,
219 	.ops = &rpm_smps_ldo_ops,
220 };
221 
222 static const struct regulator_desc pma8084_ftsmps = {
223 	.linear_ranges = (struct linear_range[]) {
224 		REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
225 		REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
226 	},
227 	.n_linear_ranges = 2,
228 	.n_voltages = 262,
229 	.ops = &rpm_smps_ldo_ops,
230 };
231 
232 static const struct regulator_desc pma8084_pldo = {
233 	.linear_ranges = (struct linear_range[]) {
234 		REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
235 		REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
236 		REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
237 	},
238 	.n_linear_ranges = 3,
239 	.n_voltages = 164,
240 	.ops = &rpm_smps_ldo_ops,
241 };
242 
243 static const struct regulator_desc pma8084_nldo = {
244 	.linear_ranges = (struct linear_range[]) {
245 		REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
246 	},
247 	.n_linear_ranges = 1,
248 	.n_voltages = 64,
249 	.ops = &rpm_smps_ldo_ops,
250 };
251 
252 static const struct regulator_desc pma8084_switch = {
253 	.ops = &rpm_switch_ops,
254 };
255 
256 static const struct regulator_desc pm8226_hfsmps = {
257 	.linear_ranges = (struct linear_range[]) {
258 		REGULATOR_LINEAR_RANGE(375000,   0,  95, 12500),
259 		REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
260 	},
261 	.n_linear_ranges = 2,
262 	.n_voltages = 159,
263 	.ops = &rpm_smps_ldo_ops,
264 };
265 
266 static const struct regulator_desc pm8226_ftsmps = {
267 	.linear_ranges = (struct linear_range[]) {
268 		REGULATOR_LINEAR_RANGE(350000,    0, 184,  5000),
269 		REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
270 	},
271 	.n_linear_ranges = 2,
272 	.n_voltages = 262,
273 	.ops = &rpm_smps_ldo_ops,
274 };
275 
276 static const struct regulator_desc pm8226_pldo = {
277 	.linear_ranges = (struct linear_range[]) {
278 		REGULATOR_LINEAR_RANGE(750000,    0,  63, 12500),
279 		REGULATOR_LINEAR_RANGE(1550000,  64, 126, 25000),
280 		REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
281 	},
282 	.n_linear_ranges = 3,
283 	.n_voltages = 164,
284 	.ops = &rpm_smps_ldo_ops,
285 };
286 
287 static const struct regulator_desc pm8226_nldo = {
288 	.linear_ranges = (struct linear_range[]) {
289 		REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
290 	},
291 	.n_linear_ranges = 1,
292 	.n_voltages = 64,
293 	.ops = &rpm_smps_ldo_ops,
294 };
295 
296 static const struct regulator_desc pm8226_switch = {
297 	.ops = &rpm_switch_ops,
298 };
299 
300 static const struct regulator_desc pm8x41_hfsmps = {
301 	.linear_ranges = (struct linear_range[]) {
302 		REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
303 		REGULATOR_LINEAR_RANGE(1575000, 96, 158, 25000),
304 	},
305 	.n_linear_ranges = 2,
306 	.n_voltages = 159,
307 	.ops = &rpm_smps_ldo_ops,
308 };
309 
310 static const struct regulator_desc pm8841_ftsmps = {
311 	.linear_ranges = (struct linear_range[]) {
312 		REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
313 		REGULATOR_LINEAR_RANGE(1280000, 185, 261, 10000),
314 	},
315 	.n_linear_ranges = 2,
316 	.n_voltages = 262,
317 	.ops = &rpm_smps_ldo_ops,
318 };
319 
320 static const struct regulator_desc pm8941_boost = {
321 	.linear_ranges = (struct linear_range[]) {
322 		REGULATOR_LINEAR_RANGE(4000000, 0, 30, 50000),
323 	},
324 	.n_linear_ranges = 1,
325 	.n_voltages = 31,
326 	.ops = &rpm_smps_ldo_ops,
327 };
328 
329 static const struct regulator_desc pm8941_pldo = {
330 	.linear_ranges = (struct linear_range[]) {
331 		REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
332 		REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
333 		REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
334 	},
335 	.n_linear_ranges = 3,
336 	.n_voltages = 164,
337 	.ops = &rpm_smps_ldo_ops,
338 };
339 
340 static const struct regulator_desc pm8941_nldo = {
341 	.linear_ranges = (struct linear_range[]) {
342 		REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
343 	},
344 	.n_linear_ranges = 1,
345 	.n_voltages = 64,
346 	.ops = &rpm_smps_ldo_ops,
347 };
348 
349 static const struct regulator_desc pm8941_lnldo = {
350 	.fixed_uV = 1740000,
351 	.n_voltages = 1,
352 	.ops = &rpm_smps_ldo_ops_fixed,
353 };
354 
355 static const struct regulator_desc pm8941_switch = {
356 	.ops = &rpm_switch_ops,
357 };
358 
359 static const struct regulator_desc pm8916_pldo = {
360 	.linear_ranges = (struct linear_range[]) {
361 		REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
362 	},
363 	.n_linear_ranges = 1,
364 	.n_voltages = 128,
365 	.ops = &rpm_smps_ldo_ops,
366 };
367 
368 static const struct regulator_desc pm8916_nldo = {
369 	.linear_ranges = (struct linear_range[]) {
370 		REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
371 	},
372 	.n_linear_ranges = 1,
373 	.n_voltages = 94,
374 	.ops = &rpm_smps_ldo_ops,
375 };
376 
377 static const struct regulator_desc pm8916_buck_lvo_smps = {
378 	.linear_ranges = (struct linear_range[]) {
379 		REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
380 		REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
381 	},
382 	.n_linear_ranges = 2,
383 	.n_voltages = 128,
384 	.ops = &rpm_smps_ldo_ops,
385 };
386 
387 static const struct regulator_desc pm8916_buck_hvo_smps = {
388 	.linear_ranges = (struct linear_range[]) {
389 		REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
390 	},
391 	.n_linear_ranges = 1,
392 	.n_voltages = 32,
393 	.ops = &rpm_smps_ldo_ops,
394 };
395 
396 static const struct regulator_desc pm8950_hfsmps = {
397 	.linear_ranges = (struct linear_range[]) {
398 		REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
399 		REGULATOR_LINEAR_RANGE(1550000, 96, 127, 25000),
400 	},
401 	.n_linear_ranges = 2,
402 	.n_voltages = 128,
403 	.ops = &rpm_smps_ldo_ops,
404 };
405 
406 static const struct regulator_desc pm8950_ftsmps2p5 = {
407 	.linear_ranges = (struct linear_range[]) {
408 		REGULATOR_LINEAR_RANGE(80000, 0, 255, 5000),
409 		REGULATOR_LINEAR_RANGE(160000, 256, 460, 10000),
410 	},
411 	.n_linear_ranges = 2,
412 	.n_voltages = 461,
413 	.ops = &rpm_smps_ldo_ops,
414 };
415 
416 static const struct regulator_desc pm8950_ult_nldo = {
417 	.linear_ranges = (struct linear_range[]) {
418 		REGULATOR_LINEAR_RANGE(375000, 0, 202, 12500),
419 	},
420 	.n_linear_ranges = 1,
421 	.n_voltages = 203,
422 	.ops = &rpm_smps_ldo_ops,
423 };
424 
425 static const struct regulator_desc pm8950_ult_pldo = {
426 	.linear_ranges = (struct linear_range[]) {
427 		REGULATOR_LINEAR_RANGE(1750000, 0, 127, 12500),
428 	},
429 	.n_linear_ranges = 1,
430 	.n_voltages = 128,
431 	.ops = &rpm_smps_ldo_ops,
432 };
433 
434 static const struct regulator_desc pm8950_pldo_lv = {
435 	.linear_ranges = (struct linear_range[]) {
436 		REGULATOR_LINEAR_RANGE(1500000, 0, 16, 25000),
437 	},
438 	.n_linear_ranges = 1,
439 	.n_voltages = 17,
440 	.ops = &rpm_smps_ldo_ops,
441 };
442 
443 static const struct regulator_desc pm8950_pldo = {
444 	.linear_ranges = (struct linear_range[]) {
445 		REGULATOR_LINEAR_RANGE(975000, 0, 164, 12500),
446 	},
447 	.n_linear_ranges = 1,
448 	.n_voltages = 165,
449 	.ops = &rpm_smps_ldo_ops,
450 };
451 
452 static const struct regulator_desc pm8953_lnldo = {
453 	.linear_ranges = (struct linear_range[]) {
454 		REGULATOR_LINEAR_RANGE(690000, 0, 7, 60000),
455 		REGULATOR_LINEAR_RANGE(1380000, 8, 15, 120000),
456 	},
457 	.n_linear_ranges = 2,
458 	.n_voltages = 16,
459 	.ops = &rpm_smps_ldo_ops,
460 };
461 
462 static const struct regulator_desc pm8953_ult_nldo = {
463 	.linear_ranges = (struct linear_range[]) {
464 		REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
465 	},
466 	.n_linear_ranges = 1,
467 	.n_voltages = 94,
468 	.ops = &rpm_smps_ldo_ops,
469 };
470 
471 static const struct regulator_desc pm8994_hfsmps = {
472 	.linear_ranges = (struct linear_range[]) {
473 		REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
474 		REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
475 	},
476 	.n_linear_ranges = 2,
477 	.n_voltages = 159,
478 	.ops = &rpm_smps_ldo_ops,
479 };
480 
481 static const struct regulator_desc pm8994_ftsmps = {
482 	.linear_ranges = (struct linear_range[]) {
483 		REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
484 		REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
485 	},
486 	.n_linear_ranges = 2,
487 	.n_voltages = 350,
488 	.ops = &rpm_smps_ldo_ops,
489 };
490 
491 static const struct regulator_desc pm8994_nldo = {
492 	.linear_ranges = (struct linear_range[]) {
493 		REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
494 	},
495 	.n_linear_ranges = 1,
496 	.n_voltages = 64,
497 	.ops = &rpm_smps_ldo_ops,
498 };
499 
500 static const struct regulator_desc pm8994_pldo = {
501 	.linear_ranges = (struct linear_range[]) {
502 		REGULATOR_LINEAR_RANGE( 750000,  0,  63, 12500),
503 		REGULATOR_LINEAR_RANGE(1550000, 64, 126, 25000),
504 		REGULATOR_LINEAR_RANGE(3100000, 127, 163, 50000),
505 	},
506 	.n_linear_ranges = 3,
507 	.n_voltages = 164,
508 	.ops = &rpm_smps_ldo_ops,
509 };
510 
511 static const struct regulator_desc pm8994_switch = {
512 	.ops = &rpm_switch_ops,
513 };
514 
515 static const struct regulator_desc pm8994_lnldo = {
516 	.fixed_uV = 1740000,
517 	.n_voltages = 1,
518 	.ops = &rpm_smps_ldo_ops_fixed,
519 };
520 
521 static const struct regulator_desc pmi8994_ftsmps = {
522 	.linear_ranges = (struct linear_range[]) {
523 		REGULATOR_LINEAR_RANGE(350000,  0, 199, 5000),
524 		REGULATOR_LINEAR_RANGE(700000, 200, 349, 10000),
525 	},
526 	.n_linear_ranges = 2,
527 	.n_voltages = 350,
528 	.ops = &rpm_smps_ldo_ops,
529 };
530 
531 static const struct regulator_desc pmi8994_hfsmps = {
532 	.linear_ranges = (struct linear_range[]) {
533 		REGULATOR_LINEAR_RANGE(350000,  0,  80, 12500),
534 		REGULATOR_LINEAR_RANGE(700000, 81, 141, 25000),
535 	},
536 	.n_linear_ranges = 2,
537 	.n_voltages = 142,
538 	.ops = &rpm_smps_ldo_ops,
539 };
540 
541 static const struct regulator_desc pmi8994_bby = {
542 	.linear_ranges = (struct linear_range[]) {
543 		REGULATOR_LINEAR_RANGE(3000000, 0, 44, 50000),
544 	},
545 	.n_linear_ranges = 1,
546 	.n_voltages = 45,
547 	.ops = &rpm_bob_ops,
548 };
549 
550 static const struct regulator_desc pm8998_ftsmps = {
551 	.linear_ranges = (struct linear_range[]) {
552 		REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
553 	},
554 	.n_linear_ranges = 1,
555 	.n_voltages = 259,
556 	.ops = &rpm_smps_ldo_ops,
557 };
558 
559 static const struct regulator_desc pm8998_hfsmps = {
560 	.linear_ranges = (struct linear_range[]) {
561 		REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
562 	},
563 	.n_linear_ranges = 1,
564 	.n_voltages = 216,
565 	.ops = &rpm_smps_ldo_ops,
566 };
567 
568 static const struct regulator_desc pm8998_nldo = {
569 	.linear_ranges = (struct linear_range[]) {
570 		REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
571 	},
572 	.n_linear_ranges = 1,
573 	.n_voltages = 128,
574 	.ops = &rpm_smps_ldo_ops,
575 };
576 
577 static const struct regulator_desc pm8998_pldo = {
578 	.linear_ranges = (struct linear_range[]) {
579 		REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
580 	},
581 	.n_linear_ranges = 1,
582 	.n_voltages = 256,
583 	.ops = &rpm_smps_ldo_ops,
584 };
585 
586 static const struct regulator_desc pm8998_pldo_lv = {
587 	.linear_ranges = (struct linear_range[]) {
588 		REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
589 	},
590 	.n_linear_ranges = 1,
591 	.n_voltages = 128,
592 	.ops = &rpm_smps_ldo_ops,
593 };
594 
595 static const struct regulator_desc pm8998_switch = {
596 	.ops = &rpm_switch_ops,
597 };
598 
599 static const struct regulator_desc pmi8998_bob = {
600 	.linear_ranges = (struct linear_range[]) {
601 		REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
602 	},
603 	.n_linear_ranges = 1,
604 	.n_voltages = 84,
605 	.ops = &rpm_bob_ops,
606 };
607 
608 static const struct regulator_desc pm660_ftsmps = {
609 	.linear_ranges = (struct linear_range[]) {
610 		REGULATOR_LINEAR_RANGE(355000, 0, 199, 5000),
611 	},
612 	.n_linear_ranges = 1,
613 	.n_voltages = 200,
614 	.ops = &rpm_smps_ldo_ops,
615 };
616 
617 static const struct regulator_desc pm660_hfsmps = {
618 	.linear_ranges = (struct linear_range[]) {
619 		REGULATOR_LINEAR_RANGE(320000, 0, 216, 8000),
620 	},
621 	.n_linear_ranges = 1,
622 	.n_voltages = 217,
623 	.ops = &rpm_smps_ldo_ops,
624 };
625 
626 static const struct regulator_desc pm660_ht_nldo = {
627 	.linear_ranges = (struct linear_range[]) {
628 		REGULATOR_LINEAR_RANGE(312000, 0, 124, 8000),
629 	},
630 	.n_linear_ranges = 1,
631 	.n_voltages = 125,
632 	.ops = &rpm_smps_ldo_ops,
633 };
634 
635 static const struct regulator_desc pm660_ht_lvpldo = {
636 	.linear_ranges = (struct linear_range[]) {
637 		REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
638 	},
639 	.n_linear_ranges = 1,
640 	.n_voltages = 63,
641 	.ops = &rpm_smps_ldo_ops,
642 };
643 
644 static const struct regulator_desc pm660_nldo660 = {
645 	.linear_ranges = (struct linear_range[]) {
646 		REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
647 	},
648 	.n_linear_ranges = 1,
649 	.n_voltages = 124,
650 	.ops = &rpm_smps_ldo_ops,
651 };
652 
653 static const struct regulator_desc pm660_pldo660 = {
654 	.linear_ranges = (struct linear_range[]) {
655 		REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
656 	},
657 	.n_linear_ranges = 1,
658 	.n_voltages = 256,
659 	.ops = &rpm_smps_ldo_ops,
660 };
661 
662 static const struct regulator_desc pm660l_bob = {
663 	.linear_ranges = (struct linear_range[]) {
664 		REGULATOR_LINEAR_RANGE(1800000, 0, 84, 32000),
665 	},
666 	.n_linear_ranges = 1,
667 	.n_voltages = 85,
668 	.ops = &rpm_bob_ops,
669 };
670 
671 static const struct regulator_desc pm6125_ftsmps = {
672 	.linear_ranges = (struct linear_range[]) {
673 		REGULATOR_LINEAR_RANGE(300000, 0, 268, 4000),
674 	},
675 	.n_linear_ranges = 1,
676 	.n_voltages = 269,
677 	.ops = &rpm_smps_ldo_ops,
678 };
679 
680 static const struct regulator_desc pmic5_ftsmps520 = {
681 	.linear_ranges = (struct linear_range[]) {
682 		REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
683 	},
684 	.n_linear_ranges = 1,
685 	.n_voltages = 264,
686 	.ops = &rpm_smps_ldo_ops,
687 };
688 
689 static const struct regulator_desc pmic5_hfsmps515 = {
690 	.linear_ranges = (struct linear_range[]) {
691 		REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
692 	},
693 	.n_linear_ranges = 1,
694 	.n_voltages = 236,
695 	.ops = &rpm_smps_ldo_ops,
696 };
697 
698 static const struct regulator_desc pms405_hfsmps3 = {
699 	.linear_ranges = (struct linear_range[]) {
700 		REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
701 	},
702 	.n_linear_ranges = 1,
703 	.n_voltages = 216,
704 	.ops = &rpm_smps_ldo_ops,
705 };
706 
707 static const struct regulator_desc pms405_nldo300 = {
708 	.linear_ranges = (struct linear_range[]) {
709 		REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
710 	},
711 	.n_linear_ranges = 1,
712 	.n_voltages = 128,
713 	.ops = &rpm_smps_ldo_ops,
714 };
715 
716 static const struct regulator_desc pms405_nldo1200 = {
717 	.linear_ranges = (struct linear_range[]) {
718 		REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
719 	},
720 	.n_linear_ranges = 1,
721 	.n_voltages = 128,
722 	.ops = &rpm_smps_ldo_ops,
723 };
724 
725 static const struct regulator_desc pms405_pldo50 = {
726 	.linear_ranges = (struct linear_range[]) {
727 		REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
728 	},
729 	.n_linear_ranges = 1,
730 	.n_voltages = 129,
731 	.ops = &rpm_smps_ldo_ops,
732 };
733 
734 static const struct regulator_desc pms405_pldo150 = {
735 	.linear_ranges = (struct linear_range[]) {
736 		REGULATOR_LINEAR_RANGE(1664000, 0, 128, 16000),
737 	},
738 	.n_linear_ranges = 1,
739 	.n_voltages = 129,
740 	.ops = &rpm_smps_ldo_ops,
741 };
742 
743 static const struct regulator_desc pms405_pldo600 = {
744 	.linear_ranges = (struct linear_range[]) {
745 		REGULATOR_LINEAR_RANGE(1256000, 0, 98, 8000),
746 	},
747 	.n_linear_ranges = 1,
748 	.n_voltages = 99,
749 	.ops = &rpm_smps_ldo_ops,
750 };
751 
752 static const struct regulator_desc mp5496_smps = {
753 	.linear_ranges = (struct linear_range[]) {
754 		REGULATOR_LINEAR_RANGE(600000, 0, 127, 12500),
755 	},
756 	.n_linear_ranges = 1,
757 	.n_voltages = 128,
758 	.ops = &rpm_mp5496_ops,
759 };
760 
761 static const struct regulator_desc mp5496_ldoa2 = {
762 	.linear_ranges = (struct linear_range[]) {
763 		REGULATOR_LINEAR_RANGE(800000, 0, 127, 25000),
764 	},
765 	.n_linear_ranges = 1,
766 	.n_voltages = 128,
767 	.ops = &rpm_mp5496_ops,
768 };
769 
770 static const struct regulator_desc pm2250_lvftsmps = {
771 	.linear_ranges = (struct linear_range[]) {
772 		REGULATOR_LINEAR_RANGE(320000, 0, 269, 4000),
773 	},
774 	.n_linear_ranges = 1,
775 	.n_voltages = 270,
776 	.ops = &rpm_smps_ldo_ops,
777 };
778 
779 static const struct regulator_desc pm2250_ftsmps = {
780 	.linear_ranges = (struct linear_range[]) {
781 		REGULATOR_LINEAR_RANGE(640000, 0, 269, 8000),
782 	},
783 	.n_linear_ranges = 1,
784 	.n_voltages = 270,
785 	.ops = &rpm_smps_ldo_ops,
786 };
787 
788 struct rpm_regulator_data {
789 	const char *name;
790 	u32 type;
791 	u32 id;
792 	const struct regulator_desc *desc;
793 	const char *supply;
794 };
795 
796 static const struct rpm_regulator_data rpm_mp5496_regulators[] = {
797 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &mp5496_smps, "s1" },
798 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &mp5496_smps, "s2" },
799 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &mp5496_ldoa2, "l2" },
800 	{}
801 };
802 
803 static const struct rpm_regulator_data rpm_pm2250_regulators[] = {
804 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm2250_lvftsmps, "vdd_s1" },
805 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm2250_lvftsmps, "vdd_s2" },
806 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm2250_lvftsmps, "vdd_s3" },
807 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm2250_ftsmps, "vdd_s4" },
808 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
809 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
810 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
811 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
812 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
813 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
814 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
815 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
816 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
817 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
818 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
819 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_nldo660, "vdd_l1_l2_l3_l5_l6_l7_l8_l9_l10_l11_l12" },
820 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
821 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
822 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
823 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l13_l14_l15_l16" },
824 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
825 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
826 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
827 	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
828 	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
829 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l4_l17_l18_l19_l20_l21_l22" },
830 	{}
831 };
832 
833 static const struct rpm_regulator_data rpm_pm6125_regulators[] = {
834 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm6125_ftsmps, "vdd_s1" },
835 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm6125_ftsmps, "vdd_s2" },
836 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm6125_ftsmps, "vdd_s3" },
837 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm6125_ftsmps, "vdd_s4" },
838 	{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
839 	{ "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_hfsmps, "vdd_s6" },
840 	{ "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_hfsmps, "vdd_s7" },
841 	{ "s8", QCOM_SMD_RPM_SMPA, 8, &pm6125_ftsmps, "vdd_s8" },
842 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
843 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_nldo660, "vdd_l2_l3_l4" },
844 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3_l4" },
845 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm660_nldo660, "vdd_l2_l3_l4" },
846 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
847 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_nldo660, "vdd_l6_l8" },
848 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
849 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_nldo660, "vdd_l6_l8" },
850 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l9_l11" },
851 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
852 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l9_l11" },
853 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l12_l16" },
854 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
855 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l10_l13_l14" },
856 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
857 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_ht_lvpldo, "vdd_l12_l16" },
858 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
859 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_nldo660, "vdd_l1_l7_l17_l18" },
860 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
861 	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
862 	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
863 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm660_pldo660, "vdd_l5_l15_l19_l20_l21_l22" },
864 	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm660_pldo660, "vdd_l23_l24" },
865 	{ "l24", QCOM_SMD_RPM_LDOA, 24, &pm660_pldo660, "vdd_l23_l24" },
866 	{ }
867 };
868 
869 static const struct rpm_regulator_data rpm_pm660_regulators[] = {
870 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm660_ftsmps, "vdd_s1" },
871 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm660_ftsmps, "vdd_s2" },
872 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm660_ftsmps, "vdd_s3" },
873 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm660_hfsmps, "vdd_s4" },
874 	{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm660_hfsmps, "vdd_s5" },
875 	{ "s6", QCOM_SMD_RPM_SMPA, 6, &pm660_hfsmps, "vdd_s6" },
876 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm660_nldo660, "vdd_l1_l6_l7" },
877 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm660_ht_nldo, "vdd_l2_l3" },
878 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm660_nldo660, "vdd_l2_l3" },
879 	/* l4 is unaccessible on PM660 */
880 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm660_ht_nldo, "vdd_l5" },
881 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm660_ht_nldo, "vdd_l1_l6_l7" },
882 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm660_ht_nldo, "vdd_l1_l6_l7" },
883 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
884 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
885 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
886 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
887 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
888 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
889 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm660_ht_lvpldo, "vdd_l8_l9_l10_l11_l12_l13_l14" },
890 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
891 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
892 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
893 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
894 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm660_pldo660, "vdd_l15_l16_l17_l18_l19" },
895 	{ }
896 };
897 
898 static const struct rpm_regulator_data rpm_pm660l_regulators[] = {
899 	{ "s1", QCOM_SMD_RPM_SMPB, 1, &pm660_ftsmps, "vdd_s1" },
900 	{ "s2", QCOM_SMD_RPM_SMPB, 2, &pm660_ftsmps, "vdd_s2" },
901 	{ "s3", QCOM_SMD_RPM_RWCX, 0, &pm660_ftsmps, "vdd_s3_s4" },
902 	{ "s5", QCOM_SMD_RPM_RWMX, 0, &pm660_ftsmps, "vdd_s5" },
903 	{ "l1", QCOM_SMD_RPM_LDOB, 1, &pm660_nldo660, "vdd_l1_l9_l10" },
904 	{ "l2", QCOM_SMD_RPM_LDOB, 2, &pm660_pldo660, "vdd_l2" },
905 	{ "l3", QCOM_SMD_RPM_LDOB, 3, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
906 	{ "l4", QCOM_SMD_RPM_LDOB, 4, &pm660_pldo660, "vdd_l4_l6" },
907 	{ "l5", QCOM_SMD_RPM_LDOB, 5, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
908 	{ "l6", QCOM_SMD_RPM_LDOB, 6, &pm660_pldo660, "vdd_l4_l6" },
909 	{ "l7", QCOM_SMD_RPM_LDOB, 7, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
910 	{ "l8", QCOM_SMD_RPM_LDOB, 8, &pm660_pldo660, "vdd_l3_l5_l7_l8" },
911 	{ "l9", QCOM_SMD_RPM_RWLC, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
912 	{ "l10", QCOM_SMD_RPM_RWLM, 0, &pm660_ht_nldo, "vdd_l1_l9_l10" },
913 	{ "bob", QCOM_SMD_RPM_BOBB, 1, &pm660l_bob, "vdd_bob", },
914 	{ }
915 };
916 
917 static const struct rpm_regulator_data rpm_pm8226_regulators[] = {
918 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8226_hfsmps, "vdd_s1" },
919 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8226_ftsmps, "vdd_s2" },
920 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm8226_hfsmps, "vdd_s3" },
921 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm8226_hfsmps, "vdd_s4" },
922 	{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm8226_hfsmps, "vdd_s5" },
923 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
924 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
925 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8226_nldo, "vdd_l3_l24_l26" },
926 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
927 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_nldo, "vdd_l1_l2_l4_l5" },
928 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
929 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
930 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
931 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
932 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8226_pldo, "vdd_l10_l11_l13" },
933 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l10_l11_l13" },
934 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8226_pldo, "vdd_l12_l14" },
935 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8226_pldo, "vdd_l10_l11_l13" },
936 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8226_pldo, "vdd_l12_l14" },
937 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
938 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
939 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
940 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8226_pldo, "vdd_l15_l16_l17_l18" },
941 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
942 	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
943 	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
944 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
945 	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
946 	{ "l24", QCOM_SMD_RPM_LDOA, 24, &pm8226_nldo, "vdd_l3_l24_l26" },
947 	{ "l25", QCOM_SMD_RPM_LDOA, 25, &pm8226_pldo, "vdd_l25" },
948 	{ "l26", QCOM_SMD_RPM_LDOA, 26, &pm8226_nldo, "vdd_l3_l24_l26" },
949 	{ "l27", QCOM_SMD_RPM_LDOA, 27, &pm8226_pldo, "vdd_l6_l7_l8_l9_l27" },
950 	{ "l28", QCOM_SMD_RPM_LDOA, 28, &pm8226_pldo, "vdd_l19_l20_l21_l22_l23_l28" },
951 	{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8226_switch, "vdd_lvs1" },
952 	{}
953 };
954 
955 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
956 	{ "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
957 	{ "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
958 	{ "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
959 	{ "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
960 	{ "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
961 	{ "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
962 	{ "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
963 	{ "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
964 	{}
965 };
966 
967 static const struct rpm_regulator_data rpm_pm8909_regulators[] = {
968 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
969 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_hvo_smps, "vdd_s2" },
970 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1" },
971 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l2_l5" },
972 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l3_l6_l10" },
973 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l7" },
974 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8226_pldo, "vdd_l2_l5" },
975 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8226_pldo, "vdd_l3_l6_l10" },
976 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8226_pldo, "vdd_l4_l7" },
977 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
978 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
979 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_nldo, "vdd_l3_l6_l10" },
980 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8226_pldo, "vdd_l8_l11_l15_l18" },
981 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
982 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l13" },
983 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
984 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
985 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l9_l12_l14_l17" },
986 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l11_l15_l18" },
987 	{}
988 };
989 
990 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
991 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
992 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
993 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
994 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
995 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
996 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
997 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
998 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
999 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
1000 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
1001 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
1002 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
1003 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18" },
1004 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1005 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1006 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1007 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1008 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1009 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1010 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1011 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1012 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8_l9_l10_l11_l12_l13_l14_l15_l16_l17_l18"},
1013 	{}
1014 };
1015 
1016 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
1017 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
1018 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
1019 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
1020 	{ "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
1021 
1022 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
1023 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
1024 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
1025 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
1026 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
1027 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
1028 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
1029 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
1030 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
1031 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
1032 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
1033 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
1034 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
1035 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
1036 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
1037 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
1038 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
1039 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
1040 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
1041 	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
1042 	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
1043 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
1044 	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
1045 	{ "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
1046 
1047 	{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
1048 	{ "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
1049 	{ "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
1050 
1051 	{ "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
1052 	{ "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
1053 
1054 	{}
1055 };
1056 
1057 static const struct rpm_regulator_data rpm_pm8950_regulators[] = {
1058 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8950_hfsmps, "vdd_s1" },
1059 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8950_hfsmps, "vdd_s2" },
1060 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm8950_hfsmps, "vdd_s3" },
1061 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm8950_hfsmps, "vdd_s4" },
1062 	/* S5 is managed via SPMI. */
1063 	{ "s6", QCOM_SMD_RPM_SMPA, 6, &pm8950_hfsmps, "vdd_s6" },
1064 
1065 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8950_ult_nldo, "vdd_l1_l19" },
1066 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8950_ult_nldo, "vdd_l2_l23" },
1067 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8950_ult_nldo, "vdd_l3" },
1068 	/* L4 seems not to exist. */
1069 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
1070 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
1071 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8950_pldo_lv, "vdd_l5_l6_l7_l16" },
1072 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1073 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1074 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_nldo, "vdd_l9_l10_l13_l14_l15_l18"},
1075 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1076 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1077 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1078 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1079 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l9_l10_l13_l14_l15_l18" },
1080 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l5_l6_l7_l16" },
1081 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l8_l11_l12_l17_l22" },
1082 	/* L18 seems not to exist. */
1083 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm8950_pldo, "vdd_l1_l19" },
1084 	/* L20 & L21 seem not to exist. */
1085 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_pldo, "vdd_l8_l11_l12_l17_l22" },
1086 	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm8950_pldo, "vdd_l2_l23" },
1087 	{}
1088 };
1089 
1090 static const struct rpm_regulator_data rpm_pm8953_regulators[] = {
1091 	{  "s1", QCOM_SMD_RPM_SMPA,  1, &pm8998_hfsmps, "vdd_s1" },
1092 	{  "s2", QCOM_SMD_RPM_SMPA,  2, &pm8998_hfsmps, "vdd_s2" },
1093 	{  "s3", QCOM_SMD_RPM_SMPA,  3, &pm8998_hfsmps, "vdd_s3" },
1094 	{  "s4", QCOM_SMD_RPM_SMPA,  4, &pm8998_hfsmps, "vdd_s4" },
1095 	{  "s5", QCOM_SMD_RPM_SMPA,  5, &pm8950_ftsmps2p5, "vdd_s5" },
1096 	{  "s6", QCOM_SMD_RPM_SMPA,  6, &pm8950_ftsmps2p5, "vdd_s6" },
1097 	{  "s7", QCOM_SMD_RPM_SMPA,  7, &pm8998_hfsmps, "vdd_s7" },
1098 
1099 	{  "l1", QCOM_SMD_RPM_LDOA,  1, &pm8953_ult_nldo, "vdd_l1" },
1100 	{  "l2", QCOM_SMD_RPM_LDOA,  2, &pm8953_ult_nldo, "vdd_l2_l3" },
1101 	{  "l3", QCOM_SMD_RPM_LDOA,  3, &pm8953_ult_nldo, "vdd_l2_l3" },
1102 	{  "l4", QCOM_SMD_RPM_LDOA,  4, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1103 	{  "l5", QCOM_SMD_RPM_LDOA,  5, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1104 	{  "l6", QCOM_SMD_RPM_LDOA,  6, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1105 	{  "l7", QCOM_SMD_RPM_LDOA,  7, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1106 	{  "l8", QCOM_SMD_RPM_LDOA,  8, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1107 	{  "l9", QCOM_SMD_RPM_LDOA,  9, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1108 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1109 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1110 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1111 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1112 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1113 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8950_ult_pldo, "vdd_l8_l11_l12_l13_l14_l15" },
1114 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8950_ult_pldo, "vdd_l4_l5_l6_l7_l16_l19" },
1115 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1116 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1117 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm8953_ult_nldo, "vdd_l4_l5_l6_l7_l16_l19" },
1118 	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm8953_lnldo,    "vdd_l20" },
1119 	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm8953_lnldo,    "vdd_l21" },
1120 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm8950_ult_pldo, "vdd_l9_l10_l17_l18_l22" },
1121 	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm8953_ult_nldo, "vdd_l23" },
1122 	{}
1123 };
1124 
1125 static const struct rpm_regulator_data rpm_pm8994_regulators[] = {
1126 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8994_ftsmps, "vdd_s1" },
1127 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8994_ftsmps, "vdd_s2" },
1128 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm8994_hfsmps, "vdd_s3" },
1129 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm8994_hfsmps, "vdd_s4" },
1130 	{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm8994_hfsmps, "vdd_s5" },
1131 	{ "s6", QCOM_SMD_RPM_SMPA, 6, &pm8994_ftsmps, "vdd_s6" },
1132 	{ "s7", QCOM_SMD_RPM_SMPA, 7, &pm8994_hfsmps, "vdd_s7" },
1133 	{ "s8", QCOM_SMD_RPM_SMPA, 8, &pm8994_ftsmps, "vdd_s8" },
1134 	{ "s9", QCOM_SMD_RPM_SMPA, 9, &pm8994_ftsmps, "vdd_s9" },
1135 	{ "s10", QCOM_SMD_RPM_SMPA, 10, &pm8994_ftsmps, "vdd_s10" },
1136 	{ "s11", QCOM_SMD_RPM_SMPA, 11, &pm8994_ftsmps, "vdd_s11" },
1137 	{ "s12", QCOM_SMD_RPM_SMPA, 12, &pm8994_ftsmps, "vdd_s12" },
1138 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8994_nldo, "vdd_l1" },
1139 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8994_nldo, "vdd_l2_l26_l28" },
1140 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8994_nldo, "vdd_l3_l11" },
1141 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm8994_nldo, "vdd_l4_l27_l31" },
1142 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8994_lnldo, "vdd_l5_l7" },
1143 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8994_pldo, "vdd_l6_l12_l32" },
1144 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8994_lnldo, "vdd_l5_l7" },
1145 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8994_pldo, "vdd_l8_l16_l30" },
1146 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1147 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1148 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8994_nldo, "vdd_l3_l11" },
1149 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8994_pldo, "vdd_l6_l12_l32" },
1150 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1151 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8994_pldo, "vdd_l14_l15" },
1152 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8994_pldo, "vdd_l14_l15" },
1153 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8994_pldo, "vdd_l8_l16_l30" },
1154 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8994_pldo, "vdd_l17_l29" },
1155 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1156 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1157 	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm8994_pldo, "vdd_l20_l21" },
1158 	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm8994_pldo, "vdd_l20_l21" },
1159 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm8994_pldo, "vdd_l9_l10_l18_l22" },
1160 	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1161 	{ "l24", QCOM_SMD_RPM_LDOA, 24, &pm8994_pldo, "vdd_l13_l19_l23_l24" },
1162 	{ "l25", QCOM_SMD_RPM_LDOA, 25, &pm8994_pldo, "vdd_l25" },
1163 	{ "l26", QCOM_SMD_RPM_LDOA, 26, &pm8994_nldo, "vdd_l2_l26_l28" },
1164 	{ "l27", QCOM_SMD_RPM_LDOA, 27, &pm8994_nldo, "vdd_l4_l27_l31" },
1165 	{ "l28", QCOM_SMD_RPM_LDOA, 28, &pm8994_nldo, "vdd_l2_l26_l28" },
1166 	{ "l29", QCOM_SMD_RPM_LDOA, 29, &pm8994_pldo, "vdd_l17_l29" },
1167 	{ "l30", QCOM_SMD_RPM_LDOA, 30, &pm8994_pldo, "vdd_l8_l16_l30" },
1168 	{ "l31", QCOM_SMD_RPM_LDOA, 31, &pm8994_nldo, "vdd_l4_l27_l31" },
1169 	{ "l32", QCOM_SMD_RPM_LDOA, 32, &pm8994_pldo, "vdd_l6_l12_l32" },
1170 	{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8994_switch, "vdd_lvs1_2" },
1171 	{ "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8994_switch, "vdd_lvs1_2" },
1172 
1173 	{}
1174 };
1175 
1176 static const struct rpm_regulator_data rpm_pm8998_regulators[] = {
1177 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pm8998_ftsmps, "vdd_s1" },
1178 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pm8998_ftsmps, "vdd_s2" },
1179 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pm8998_hfsmps, "vdd_s3" },
1180 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pm8998_hfsmps, "vdd_s4" },
1181 	{ "s5", QCOM_SMD_RPM_SMPA, 5, &pm8998_hfsmps, "vdd_s5" },
1182 	{ "s6", QCOM_SMD_RPM_SMPA, 6, &pm8998_ftsmps, "vdd_s6" },
1183 	{ "s7", QCOM_SMD_RPM_SMPA, 7, &pm8998_ftsmps, "vdd_s7" },
1184 	{ "s8", QCOM_SMD_RPM_SMPA, 8, &pm8998_ftsmps, "vdd_s8" },
1185 	{ "s9", QCOM_SMD_RPM_SMPA, 9, &pm8998_ftsmps, "vdd_s9" },
1186 	{ "s10", QCOM_SMD_RPM_SMPA, 10, &pm8998_ftsmps, "vdd_s10" },
1187 	{ "s11", QCOM_SMD_RPM_SMPA, 11, &pm8998_ftsmps, "vdd_s11" },
1188 	{ "s12", QCOM_SMD_RPM_SMPA, 12, &pm8998_ftsmps, "vdd_s12" },
1189 	{ "s13", QCOM_SMD_RPM_SMPA, 13, &pm8998_ftsmps, "vdd_s13" },
1190 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pm8998_nldo, "vdd_l1_l27" },
1191 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pm8998_nldo, "vdd_l2_l8_l17" },
1192 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pm8998_nldo, "vdd_l3_l11" },
1193 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pm8998_nldo, "vdd_l4_l5" },
1194 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pm8998_nldo, "vdd_l4_l5" },
1195 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pm8998_pldo, "vdd_l6" },
1196 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1197 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pm8998_nldo, "vdd_l2_l8_l17" },
1198 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pm8998_pldo, "vdd_l9" },
1199 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pm8998_pldo, "vdd_l10_l23_l25" },
1200 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pm8998_nldo, "vdd_l3_l11" },
1201 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1202 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pm8998_pldo, "vdd_l13_l19_l21" },
1203 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1204 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pm8998_pldo_lv, "vdd_l7_l12_l14_l15" },
1205 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pm8998_pldo, "vdd_l16_l28" },
1206 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pm8998_nldo, "vdd_l2_l8_l17" },
1207 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pm8998_pldo, "vdd_l18_l22" },
1208 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pm8998_pldo, "vdd_l13_l19_l21" },
1209 	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pm8998_pldo, "vdd_l20_l24" },
1210 	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pm8998_pldo, "vdd_l13_l19_l21" },
1211 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pm8998_pldo, "vdd_l18_l22" },
1212 	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pm8998_pldo, "vdd_l10_l23_l25" },
1213 	{ "l24", QCOM_SMD_RPM_LDOA, 24, &pm8998_pldo, "vdd_l20_l24" },
1214 	{ "l25", QCOM_SMD_RPM_LDOA, 25, &pm8998_pldo, "vdd_l10_l23_l25" },
1215 	{ "l26", QCOM_SMD_RPM_LDOA, 26, &pm8998_nldo, "vdd_l26" },
1216 	{ "l27", QCOM_SMD_RPM_LDOA, 27, &pm8998_nldo, "vdd_l1_l27" },
1217 	{ "l28", QCOM_SMD_RPM_LDOA, 28, &pm8998_pldo, "vdd_l16_l28" },
1218 	{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8998_switch, "vdd_lvs1_lvs2" },
1219 	{ "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8998_switch, "vdd_lvs1_lvs2" },
1220 	{}
1221 };
1222 
1223 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
1224 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
1225 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
1226 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
1227 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
1228 	{ "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
1229 	{ "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
1230 	{ "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
1231 	{ "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
1232 	{ "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
1233 	{ "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
1234 	{ "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
1235 	{ "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
1236 
1237 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
1238 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
1239 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
1240 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
1241 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
1242 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1243 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
1244 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
1245 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1246 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1247 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
1248 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1249 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1250 	{ "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1251 	{ "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1252 	{ "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
1253 	{ "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
1254 	{ "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
1255 	{ "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
1256 	{ "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1257 	{ "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
1258 	{ "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
1259 	{ "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1260 	{ "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
1261 	{ "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
1262 	{ "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
1263 	{ "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
1264 
1265 	{ "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
1266 	{ "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
1267 	{ "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
1268 	{ "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
1269 	{ "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
1270 
1271 	{}
1272 };
1273 
1274 static const struct rpm_regulator_data rpm_pmi8994_regulators[] = {
1275 	{ "s1", QCOM_SMD_RPM_SMPB, 1, &pmi8994_ftsmps, "vdd_s1" },
1276 	{ "s2", QCOM_SMD_RPM_SMPB, 2, &pmi8994_hfsmps, "vdd_s2" },
1277 	{ "s3", QCOM_SMD_RPM_SMPB, 3, &pmi8994_hfsmps, "vdd_s3" },
1278 	{ "boost-bypass", QCOM_SMD_RPM_BBYB, 1, &pmi8994_bby, "vdd_bst_byp" },
1279 	{}
1280 };
1281 
1282 static const struct rpm_regulator_data rpm_pmi8998_regulators[] = {
1283 	{ "bob", QCOM_SMD_RPM_BOBB, 1, &pmi8998_bob, "vdd_bob" },
1284 	{}
1285 };
1286 
1287 static const struct rpm_regulator_data rpm_pmr735a_regulators[] = {
1288 	{ "s1", QCOM_SMD_RPM_SMPE, 1, &pmic5_ftsmps520, "vdd_s1"},
1289 	{ "s2", QCOM_SMD_RPM_SMPE, 2, &pmic5_ftsmps520, "vdd_s2"},
1290 	{ "s3", QCOM_SMD_RPM_SMPE, 3, &pmic5_hfsmps515, "vdd_s3"},
1291 	{ "l1", QCOM_SMD_RPM_LDOE, 1, &pm660_nldo660, "vdd_l1_l2"},
1292 	{ "l2", QCOM_SMD_RPM_LDOE, 2, &pm660_nldo660, "vdd_l1_l2"},
1293 	{ "l3", QCOM_SMD_RPM_LDOE, 3, &pm660_nldo660, "vdd_l3"},
1294 	{ "l4", QCOM_SMD_RPM_LDOE, 4, &pm660_ht_lvpldo, "vdd_l4"},
1295 	{ "l5", QCOM_SMD_RPM_LDOE, 5, &pm660_nldo660, "vdd_l5_l6"},
1296 	{ "l6", QCOM_SMD_RPM_LDOE, 6, &pm660_nldo660, "vdd_l5_l6"},
1297 	{ "l7", QCOM_SMD_RPM_LDOE, 7, &pm660_pldo660, "vdd_l7_bob"},
1298 	{}
1299 };
1300 
1301 static const struct rpm_regulator_data rpm_pms405_regulators[] = {
1302 	{ "s1", QCOM_SMD_RPM_SMPA, 1, &pms405_hfsmps3, "vdd_s1" },
1303 	{ "s2", QCOM_SMD_RPM_SMPA, 2, &pms405_hfsmps3, "vdd_s2" },
1304 	{ "s3", QCOM_SMD_RPM_SMPA, 3, &pms405_hfsmps3, "vdd_s3" },
1305 	{ "s4", QCOM_SMD_RPM_SMPA, 4, &pms405_hfsmps3, "vdd_s4" },
1306 	{ "s5", QCOM_SMD_RPM_SMPA, 5, &pms405_hfsmps3, "vdd_s5" },
1307 	{ "l1", QCOM_SMD_RPM_LDOA, 1, &pms405_nldo1200, "vdd_l1_l2" },
1308 	{ "l2", QCOM_SMD_RPM_LDOA, 2, &pms405_nldo1200, "vdd_l1_l2" },
1309 	{ "l3", QCOM_SMD_RPM_LDOA, 3, &pms405_nldo1200, "vdd_l3_l8" },
1310 	{ "l4", QCOM_SMD_RPM_LDOA, 4, &pms405_nldo300, "vdd_l4" },
1311 	{ "l5", QCOM_SMD_RPM_LDOA, 5, &pms405_pldo600, "vdd_l5_l6" },
1312 	{ "l6", QCOM_SMD_RPM_LDOA, 6, &pms405_pldo600, "vdd_l5_l6" },
1313 	{ "l7", QCOM_SMD_RPM_LDOA, 7, &pms405_pldo150, "vdd_l7" },
1314 	{ "l8", QCOM_SMD_RPM_LDOA, 8, &pms405_nldo1200, "vdd_l3_l8" },
1315 	{ "l9", QCOM_SMD_RPM_LDOA, 9, &pms405_nldo1200, "vdd_l9" },
1316 	{ "l10", QCOM_SMD_RPM_LDOA, 10, &pms405_pldo50, "vdd_l10_l11_l12_l13" },
1317 	{ "l11", QCOM_SMD_RPM_LDOA, 11, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1318 	{ "l12", QCOM_SMD_RPM_LDOA, 12, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1319 	{ "l13", QCOM_SMD_RPM_LDOA, 13, &pms405_pldo150, "vdd_l10_l11_l12_l13" },
1320 	{}
1321 };
1322 
1323 static const struct of_device_id rpm_of_match[] = {
1324 	{ .compatible = "qcom,rpm-mp5496-regulators", .data = &rpm_mp5496_regulators },
1325 	{ .compatible = "qcom,rpm-pm2250-regulators", .data = &rpm_pm2250_regulators },
1326 	{ .compatible = "qcom,rpm-pm6125-regulators", .data = &rpm_pm6125_regulators },
1327 	{ .compatible = "qcom,rpm-pm660-regulators", .data = &rpm_pm660_regulators },
1328 	{ .compatible = "qcom,rpm-pm660l-regulators", .data = &rpm_pm660l_regulators },
1329 	{ .compatible = "qcom,rpm-pm8226-regulators", .data = &rpm_pm8226_regulators },
1330 	{ .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
1331 	{ .compatible = "qcom,rpm-pm8909-regulators", .data = &rpm_pm8909_regulators },
1332 	{ .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
1333 	{ .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
1334 	{ .compatible = "qcom,rpm-pm8950-regulators", .data = &rpm_pm8950_regulators },
1335 	{ .compatible = "qcom,rpm-pm8953-regulators", .data = &rpm_pm8953_regulators },
1336 	{ .compatible = "qcom,rpm-pm8994-regulators", .data = &rpm_pm8994_regulators },
1337 	{ .compatible = "qcom,rpm-pm8998-regulators", .data = &rpm_pm8998_regulators },
1338 	{ .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
1339 	{ .compatible = "qcom,rpm-pmi8994-regulators", .data = &rpm_pmi8994_regulators },
1340 	{ .compatible = "qcom,rpm-pmi8998-regulators", .data = &rpm_pmi8998_regulators },
1341 	{ .compatible = "qcom,rpm-pmr735a-regulators", .data = &rpm_pmr735a_regulators },
1342 	{ .compatible = "qcom,rpm-pms405-regulators", .data = &rpm_pms405_regulators },
1343 	{}
1344 };
1345 MODULE_DEVICE_TABLE(of, rpm_of_match);
1346 
1347 /**
1348  * rpm_regulator_init_vreg() - initialize all attributes of a qcom_smd-regulator
1349  * @vreg:		Pointer to the individual qcom_smd-regulator resource
1350  * @dev:		Pointer to the top level qcom_smd-regulator PMIC device
1351  * @node:		Pointer to the individual qcom_smd-regulator resource
1352  *			device node
1353  * @rpm:		Pointer to the rpm bus node
1354  * @pmic_rpm_data:	Pointer to a null-terminated array of qcom_smd-regulator
1355  *			resources defined for the top level PMIC device
1356  *
1357  * Return: 0 on success, errno on failure
1358  */
1359 static int rpm_regulator_init_vreg(struct qcom_rpm_reg *vreg, struct device *dev,
1360 				   struct device_node *node, struct qcom_smd_rpm *rpm,
1361 				   const struct rpm_regulator_data *pmic_rpm_data)
1362 {
1363 	struct regulator_config config = {};
1364 	const struct rpm_regulator_data *rpm_data;
1365 	struct regulator_dev *rdev;
1366 	int ret;
1367 
1368 	for (rpm_data = pmic_rpm_data; rpm_data->name; rpm_data++)
1369 		if (of_node_name_eq(node, rpm_data->name))
1370 			break;
1371 
1372 	if (!rpm_data->name) {
1373 		dev_err(dev, "Unknown regulator %pOFn\n", node);
1374 		return -EINVAL;
1375 	}
1376 
1377 	vreg->dev	= dev;
1378 	vreg->rpm	= rpm;
1379 	vreg->type	= rpm_data->type;
1380 	vreg->id	= rpm_data->id;
1381 
1382 	memcpy(&vreg->desc, rpm_data->desc, sizeof(vreg->desc));
1383 	vreg->desc.name = rpm_data->name;
1384 	vreg->desc.supply_name = rpm_data->supply;
1385 	vreg->desc.owner = THIS_MODULE;
1386 	vreg->desc.type = REGULATOR_VOLTAGE;
1387 	vreg->desc.of_match = rpm_data->name;
1388 
1389 	config.dev		= dev;
1390 	config.of_node		= node;
1391 	config.driver_data	= vreg;
1392 
1393 	rdev = devm_regulator_register(dev, &vreg->desc, &config);
1394 	if (IS_ERR(rdev)) {
1395 		ret = PTR_ERR(rdev);
1396 		dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n", node, ret);
1397 		return ret;
1398 	}
1399 
1400 	return 0;
1401 }
1402 
1403 static int rpm_reg_probe(struct platform_device *pdev)
1404 {
1405 	struct device *dev = &pdev->dev;
1406 	const struct rpm_regulator_data *vreg_data;
1407 	struct device_node *node;
1408 	struct qcom_rpm_reg *vreg;
1409 	struct qcom_smd_rpm *rpm;
1410 	int ret;
1411 
1412 	rpm = dev_get_drvdata(pdev->dev.parent);
1413 	if (!rpm) {
1414 		dev_err(&pdev->dev, "Unable to retrieve handle to rpm\n");
1415 		return -ENODEV;
1416 	}
1417 
1418 	vreg_data = of_device_get_match_data(dev);
1419 	if (!vreg_data)
1420 		return -ENODEV;
1421 
1422 	for_each_available_child_of_node(dev->of_node, node) {
1423 		vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
1424 		if (!vreg) {
1425 			of_node_put(node);
1426 			return -ENOMEM;
1427 		}
1428 
1429 		ret = rpm_regulator_init_vreg(vreg, dev, node, rpm, vreg_data);
1430 
1431 		if (ret < 0) {
1432 			of_node_put(node);
1433 			return ret;
1434 		}
1435 	}
1436 
1437 	return 0;
1438 }
1439 
1440 static struct platform_driver rpm_reg_driver = {
1441 	.probe = rpm_reg_probe,
1442 	.driver = {
1443 		.name  = "qcom_rpm_smd_regulator",
1444 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
1445 		.of_match_table = rpm_of_match,
1446 	},
1447 };
1448 
1449 static int __init rpm_reg_init(void)
1450 {
1451 	return platform_driver_register(&rpm_reg_driver);
1452 }
1453 subsys_initcall(rpm_reg_init);
1454 
1455 static void __exit rpm_reg_exit(void)
1456 {
1457 	platform_driver_unregister(&rpm_reg_driver);
1458 }
1459 module_exit(rpm_reg_exit)
1460 
1461 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
1462 MODULE_LICENSE("GPL v2");
1463