1 /*
2  * Copyright (c) 2014, Sony Mobile Communications AB.
3  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License version 2 and
7  * only version 2 as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/platform_device.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/regulator/driver.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/regulator/of_regulator.h>
22 #include <linux/mfd/qcom_rpm.h>
23 
24 #include <dt-bindings/mfd/qcom-rpm.h>
25 
26 #define MAX_REQUEST_LEN 2
27 
28 struct request_member {
29 	int		word;
30 	unsigned int	mask;
31 	int		shift;
32 };
33 
34 struct rpm_reg_parts {
35 	struct request_member mV;		/* used if voltage is in mV */
36 	struct request_member uV;		/* used if voltage is in uV */
37 	struct request_member ip;		/* peak current in mA */
38 	struct request_member pd;		/* pull down enable */
39 	struct request_member ia;		/* average current in mA */
40 	struct request_member fm;		/* force mode */
41 	struct request_member pm;		/* power mode */
42 	struct request_member pc;		/* pin control */
43 	struct request_member pf;		/* pin function */
44 	struct request_member enable_state;	/* NCP and switch */
45 	struct request_member comp_mode;	/* NCP */
46 	struct request_member freq;		/* frequency: NCP and SMPS */
47 	struct request_member freq_clk_src;	/* clock source: SMPS */
48 	struct request_member hpm;		/* switch: control OCP and SS */
49 	int request_len;
50 };
51 
52 #define FORCE_MODE_IS_2_BITS(reg) \
53 	(((reg)->parts->fm.mask >> (reg)->parts->fm.shift) == 3)
54 
55 struct qcom_rpm_reg {
56 	struct qcom_rpm *rpm;
57 
58 	struct mutex lock;
59 	struct device *dev;
60 	struct regulator_desc desc;
61 	const struct rpm_reg_parts *parts;
62 
63 	int resource;
64 	u32 val[MAX_REQUEST_LEN];
65 
66 	int uV;
67 	int is_enabled;
68 
69 	bool supports_force_mode_auto;
70 	bool supports_force_mode_bypass;
71 };
72 
73 static const struct rpm_reg_parts rpm8660_ldo_parts = {
74 	.request_len    = 2,
75 	.mV             = { 0, 0x00000FFF,  0 },
76 	.ip             = { 0, 0x00FFF000, 12 },
77 	.fm             = { 0, 0x03000000, 24 },
78 	.pc             = { 0, 0x3C000000, 26 },
79 	.pf             = { 0, 0xC0000000, 30 },
80 	.pd             = { 1, 0x00000001,  0 },
81 	.ia             = { 1, 0x00001FFE,  1 },
82 };
83 
84 static const struct rpm_reg_parts rpm8660_smps_parts = {
85 	.request_len    = 2,
86 	.mV             = { 0, 0x00000FFF,  0 },
87 	.ip             = { 0, 0x00FFF000, 12 },
88 	.fm             = { 0, 0x03000000, 24 },
89 	.pc             = { 0, 0x3C000000, 26 },
90 	.pf             = { 0, 0xC0000000, 30 },
91 	.pd             = { 1, 0x00000001,  0 },
92 	.ia             = { 1, 0x00001FFE,  1 },
93 	.freq           = { 1, 0x001FE000, 13 },
94 	.freq_clk_src   = { 1, 0x00600000, 21 },
95 };
96 
97 static const struct rpm_reg_parts rpm8660_switch_parts = {
98 	.request_len    = 1,
99 	.enable_state   = { 0, 0x00000001,  0 },
100 	.pd             = { 0, 0x00000002,  1 },
101 	.pc             = { 0, 0x0000003C,  2 },
102 	.pf             = { 0, 0x000000C0,  6 },
103 	.hpm            = { 0, 0x00000300,  8 },
104 };
105 
106 static const struct rpm_reg_parts rpm8660_ncp_parts = {
107 	.request_len    = 1,
108 	.mV             = { 0, 0x00000FFF,  0 },
109 	.enable_state   = { 0, 0x00001000, 12 },
110 	.comp_mode      = { 0, 0x00002000, 13 },
111 	.freq           = { 0, 0x003FC000, 14 },
112 };
113 
114 static const struct rpm_reg_parts rpm8960_ldo_parts = {
115 	.request_len    = 2,
116 	.uV             = { 0, 0x007FFFFF,  0 },
117 	.pd             = { 0, 0x00800000, 23 },
118 	.pc             = { 0, 0x0F000000, 24 },
119 	.pf             = { 0, 0xF0000000, 28 },
120 	.ip             = { 1, 0x000003FF,  0 },
121 	.ia             = { 1, 0x000FFC00, 10 },
122 	.fm             = { 1, 0x00700000, 20 },
123 };
124 
125 static const struct rpm_reg_parts rpm8960_smps_parts = {
126 	.request_len    = 2,
127 	.uV             = { 0, 0x007FFFFF,  0 },
128 	.pd             = { 0, 0x00800000, 23 },
129 	.pc             = { 0, 0x0F000000, 24 },
130 	.pf             = { 0, 0xF0000000, 28 },
131 	.ip             = { 1, 0x000003FF,  0 },
132 	.ia             = { 1, 0x000FFC00, 10 },
133 	.fm             = { 1, 0x00700000, 20 },
134 	.pm             = { 1, 0x00800000, 23 },
135 	.freq           = { 1, 0x1F000000, 24 },
136 	.freq_clk_src   = { 1, 0x60000000, 29 },
137 };
138 
139 static const struct rpm_reg_parts rpm8960_switch_parts = {
140 	.request_len    = 1,
141 	.enable_state   = { 0, 0x00000001,  0 },
142 	.pd             = { 0, 0x00000002,  1 },
143 	.pc             = { 0, 0x0000003C,  2 },
144 	.pf             = { 0, 0x000003C0,  6 },
145 	.hpm            = { 0, 0x00000C00, 10 },
146 };
147 
148 static const struct rpm_reg_parts rpm8960_ncp_parts = {
149 	.request_len    = 1,
150 	.uV             = { 0, 0x007FFFFF,  0 },
151 	.enable_state   = { 0, 0x00800000, 23 },
152 	.comp_mode      = { 0, 0x01000000, 24 },
153 	.freq           = { 0, 0x3E000000, 25 },
154 };
155 
156 /*
157  * Physically available PMIC regulator voltage ranges
158  */
159 static const struct regulator_linear_range pldo_ranges[] = {
160 	REGULATOR_LINEAR_RANGE( 750000,   0,  59, 12500),
161 	REGULATOR_LINEAR_RANGE(1500000,  60, 123, 25000),
162 	REGULATOR_LINEAR_RANGE(3100000, 124, 160, 50000),
163 };
164 
165 static const struct regulator_linear_range nldo_ranges[] = {
166 	REGULATOR_LINEAR_RANGE( 750000,   0,  63, 12500),
167 };
168 
169 static const struct regulator_linear_range nldo1200_ranges[] = {
170 	REGULATOR_LINEAR_RANGE( 375000,   0,  59,  6250),
171 	REGULATOR_LINEAR_RANGE( 750000,  60, 123, 12500),
172 };
173 
174 static const struct regulator_linear_range smps_ranges[] = {
175 	REGULATOR_LINEAR_RANGE( 375000,   0,  29, 12500),
176 	REGULATOR_LINEAR_RANGE( 750000,  30,  89, 12500),
177 	REGULATOR_LINEAR_RANGE(1500000,  90, 153, 25000),
178 };
179 
180 static const struct regulator_linear_range ftsmps_ranges[] = {
181 	REGULATOR_LINEAR_RANGE( 350000,   0,   6, 50000),
182 	REGULATOR_LINEAR_RANGE( 700000,   7,  63, 12500),
183 	REGULATOR_LINEAR_RANGE(1500000,  64, 100, 50000),
184 };
185 
186 static const struct regulator_linear_range smb208_ranges[] = {
187 	REGULATOR_LINEAR_RANGE( 375000,   0,  29, 12500),
188 	REGULATOR_LINEAR_RANGE( 750000,  30,  89, 12500),
189 	REGULATOR_LINEAR_RANGE(1500000,  90, 153, 25000),
190 	REGULATOR_LINEAR_RANGE(3100000, 154, 234, 25000),
191 };
192 
193 static const struct regulator_linear_range ncp_ranges[] = {
194 	REGULATOR_LINEAR_RANGE(1500000,   0,  31, 50000),
195 };
196 
197 static int rpm_reg_write(struct qcom_rpm_reg *vreg,
198 			 const struct request_member *req,
199 			 const int value)
200 {
201 	if (WARN_ON((value << req->shift) & ~req->mask))
202 		return -EINVAL;
203 
204 	vreg->val[req->word] &= ~req->mask;
205 	vreg->val[req->word] |= value << req->shift;
206 
207 	return qcom_rpm_write(vreg->rpm,
208 			      QCOM_RPM_ACTIVE_STATE,
209 			      vreg->resource,
210 			      vreg->val,
211 			      vreg->parts->request_len);
212 }
213 
214 static int rpm_reg_set_mV_sel(struct regulator_dev *rdev,
215 			      unsigned selector)
216 {
217 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
218 	const struct rpm_reg_parts *parts = vreg->parts;
219 	const struct request_member *req = &parts->mV;
220 	int ret = 0;
221 	int uV;
222 
223 	if (req->mask == 0)
224 		return -EINVAL;
225 
226 	uV = regulator_list_voltage_linear_range(rdev, selector);
227 	if (uV < 0)
228 		return uV;
229 
230 	mutex_lock(&vreg->lock);
231 	if (vreg->is_enabled)
232 		ret = rpm_reg_write(vreg, req, uV / 1000);
233 
234 	if (!ret)
235 		vreg->uV = uV;
236 	mutex_unlock(&vreg->lock);
237 
238 	return ret;
239 }
240 
241 static int rpm_reg_set_uV_sel(struct regulator_dev *rdev,
242 			      unsigned selector)
243 {
244 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
245 	const struct rpm_reg_parts *parts = vreg->parts;
246 	const struct request_member *req = &parts->uV;
247 	int ret = 0;
248 	int uV;
249 
250 	if (req->mask == 0)
251 		return -EINVAL;
252 
253 	uV = regulator_list_voltage_linear_range(rdev, selector);
254 	if (uV < 0)
255 		return uV;
256 
257 	mutex_lock(&vreg->lock);
258 	if (vreg->is_enabled)
259 		ret = rpm_reg_write(vreg, req, uV);
260 
261 	if (!ret)
262 		vreg->uV = uV;
263 	mutex_unlock(&vreg->lock);
264 
265 	return ret;
266 }
267 
268 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
269 {
270 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
271 
272 	return vreg->uV;
273 }
274 
275 static int rpm_reg_mV_enable(struct regulator_dev *rdev)
276 {
277 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
278 	const struct rpm_reg_parts *parts = vreg->parts;
279 	const struct request_member *req = &parts->mV;
280 	int ret;
281 
282 	if (req->mask == 0)
283 		return -EINVAL;
284 
285 	mutex_lock(&vreg->lock);
286 	ret = rpm_reg_write(vreg, req, vreg->uV / 1000);
287 	if (!ret)
288 		vreg->is_enabled = 1;
289 	mutex_unlock(&vreg->lock);
290 
291 	return ret;
292 }
293 
294 static int rpm_reg_uV_enable(struct regulator_dev *rdev)
295 {
296 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
297 	const struct rpm_reg_parts *parts = vreg->parts;
298 	const struct request_member *req = &parts->uV;
299 	int ret;
300 
301 	if (req->mask == 0)
302 		return -EINVAL;
303 
304 	mutex_lock(&vreg->lock);
305 	ret = rpm_reg_write(vreg, req, vreg->uV);
306 	if (!ret)
307 		vreg->is_enabled = 1;
308 	mutex_unlock(&vreg->lock);
309 
310 	return ret;
311 }
312 
313 static int rpm_reg_switch_enable(struct regulator_dev *rdev)
314 {
315 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
316 	const struct rpm_reg_parts *parts = vreg->parts;
317 	const struct request_member *req = &parts->enable_state;
318 	int ret;
319 
320 	if (req->mask == 0)
321 		return -EINVAL;
322 
323 	mutex_lock(&vreg->lock);
324 	ret = rpm_reg_write(vreg, req, 1);
325 	if (!ret)
326 		vreg->is_enabled = 1;
327 	mutex_unlock(&vreg->lock);
328 
329 	return ret;
330 }
331 
332 static int rpm_reg_mV_disable(struct regulator_dev *rdev)
333 {
334 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
335 	const struct rpm_reg_parts *parts = vreg->parts;
336 	const struct request_member *req = &parts->mV;
337 	int ret;
338 
339 	if (req->mask == 0)
340 		return -EINVAL;
341 
342 	mutex_lock(&vreg->lock);
343 	ret = rpm_reg_write(vreg, req, 0);
344 	if (!ret)
345 		vreg->is_enabled = 0;
346 	mutex_unlock(&vreg->lock);
347 
348 	return ret;
349 }
350 
351 static int rpm_reg_uV_disable(struct regulator_dev *rdev)
352 {
353 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
354 	const struct rpm_reg_parts *parts = vreg->parts;
355 	const struct request_member *req = &parts->uV;
356 	int ret;
357 
358 	if (req->mask == 0)
359 		return -EINVAL;
360 
361 	mutex_lock(&vreg->lock);
362 	ret = rpm_reg_write(vreg, req, 0);
363 	if (!ret)
364 		vreg->is_enabled = 0;
365 	mutex_unlock(&vreg->lock);
366 
367 	return ret;
368 }
369 
370 static int rpm_reg_switch_disable(struct regulator_dev *rdev)
371 {
372 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
373 	const struct rpm_reg_parts *parts = vreg->parts;
374 	const struct request_member *req = &parts->enable_state;
375 	int ret;
376 
377 	if (req->mask == 0)
378 		return -EINVAL;
379 
380 	mutex_lock(&vreg->lock);
381 	ret = rpm_reg_write(vreg, req, 0);
382 	if (!ret)
383 		vreg->is_enabled = 0;
384 	mutex_unlock(&vreg->lock);
385 
386 	return ret;
387 }
388 
389 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
390 {
391 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
392 
393 	return vreg->is_enabled;
394 }
395 
396 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
397 {
398 	struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
399 	const struct rpm_reg_parts *parts = vreg->parts;
400 	const struct request_member *req = &parts->ia;
401 	int load_mA = load_uA / 1000;
402 	int max_mA = req->mask >> req->shift;
403 	int ret;
404 
405 	if (req->mask == 0)
406 		return -EINVAL;
407 
408 	if (load_mA > max_mA)
409 		load_mA = max_mA;
410 
411 	mutex_lock(&vreg->lock);
412 	ret = rpm_reg_write(vreg, req, load_mA);
413 	mutex_unlock(&vreg->lock);
414 
415 	return ret;
416 }
417 
418 static struct regulator_ops uV_ops = {
419 	.list_voltage = regulator_list_voltage_linear_range,
420 
421 	.set_voltage_sel = rpm_reg_set_uV_sel,
422 	.get_voltage = rpm_reg_get_voltage,
423 
424 	.enable = rpm_reg_uV_enable,
425 	.disable = rpm_reg_uV_disable,
426 	.is_enabled = rpm_reg_is_enabled,
427 
428 	.set_load = rpm_reg_set_load,
429 };
430 
431 static struct regulator_ops mV_ops = {
432 	.list_voltage = regulator_list_voltage_linear_range,
433 
434 	.set_voltage_sel = rpm_reg_set_mV_sel,
435 	.get_voltage = rpm_reg_get_voltage,
436 
437 	.enable = rpm_reg_mV_enable,
438 	.disable = rpm_reg_mV_disable,
439 	.is_enabled = rpm_reg_is_enabled,
440 
441 	.set_load = rpm_reg_set_load,
442 };
443 
444 static struct regulator_ops switch_ops = {
445 	.enable = rpm_reg_switch_enable,
446 	.disable = rpm_reg_switch_disable,
447 	.is_enabled = rpm_reg_is_enabled,
448 };
449 
450 /*
451  * PM8018 regulators
452  */
453 static const struct qcom_rpm_reg pm8018_pldo = {
454 	.desc.linear_ranges = pldo_ranges,
455 	.desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges),
456 	.desc.n_voltages = 161,
457 	.desc.ops = &uV_ops,
458 	.parts = &rpm8960_ldo_parts,
459 	.supports_force_mode_auto = false,
460 	.supports_force_mode_bypass = false,
461 };
462 
463 static const struct qcom_rpm_reg pm8018_nldo = {
464 	.desc.linear_ranges = nldo_ranges,
465 	.desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges),
466 	.desc.n_voltages = 64,
467 	.desc.ops = &uV_ops,
468 	.parts = &rpm8960_ldo_parts,
469 	.supports_force_mode_auto = false,
470 	.supports_force_mode_bypass = false,
471 };
472 
473 static const struct qcom_rpm_reg pm8018_smps = {
474 	.desc.linear_ranges = smps_ranges,
475 	.desc.n_linear_ranges = ARRAY_SIZE(smps_ranges),
476 	.desc.n_voltages = 154,
477 	.desc.ops = &uV_ops,
478 	.parts = &rpm8960_smps_parts,
479 	.supports_force_mode_auto = false,
480 	.supports_force_mode_bypass = false,
481 };
482 
483 static const struct qcom_rpm_reg pm8018_switch = {
484 	.desc.ops = &switch_ops,
485 	.parts = &rpm8960_switch_parts,
486 };
487 
488 /*
489  * PM8058 regulators
490  */
491 static const struct qcom_rpm_reg pm8058_pldo = {
492 	.desc.linear_ranges = pldo_ranges,
493 	.desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges),
494 	.desc.n_voltages = 161,
495 	.desc.ops = &mV_ops,
496 	.parts = &rpm8660_ldo_parts,
497 	.supports_force_mode_auto = false,
498 	.supports_force_mode_bypass = false,
499 };
500 
501 static const struct qcom_rpm_reg pm8058_nldo = {
502 	.desc.linear_ranges = nldo_ranges,
503 	.desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges),
504 	.desc.n_voltages = 64,
505 	.desc.ops = &mV_ops,
506 	.parts = &rpm8660_ldo_parts,
507 	.supports_force_mode_auto = false,
508 	.supports_force_mode_bypass = false,
509 };
510 
511 static const struct qcom_rpm_reg pm8058_smps = {
512 	.desc.linear_ranges = smps_ranges,
513 	.desc.n_linear_ranges = ARRAY_SIZE(smps_ranges),
514 	.desc.n_voltages = 154,
515 	.desc.ops = &mV_ops,
516 	.parts = &rpm8660_smps_parts,
517 	.supports_force_mode_auto = false,
518 	.supports_force_mode_bypass = false,
519 };
520 
521 static const struct qcom_rpm_reg pm8058_ncp = {
522 	.desc.linear_ranges = ncp_ranges,
523 	.desc.n_linear_ranges = ARRAY_SIZE(ncp_ranges),
524 	.desc.n_voltages = 32,
525 	.desc.ops = &mV_ops,
526 	.parts = &rpm8660_ncp_parts,
527 };
528 
529 static const struct qcom_rpm_reg pm8058_switch = {
530 	.desc.ops = &switch_ops,
531 	.parts = &rpm8660_switch_parts,
532 };
533 
534 /*
535  * PM8901 regulators
536  */
537 static const struct qcom_rpm_reg pm8901_pldo = {
538 	.desc.linear_ranges = pldo_ranges,
539 	.desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges),
540 	.desc.n_voltages = 161,
541 	.desc.ops = &mV_ops,
542 	.parts = &rpm8660_ldo_parts,
543 	.supports_force_mode_auto = false,
544 	.supports_force_mode_bypass = true,
545 };
546 
547 static const struct qcom_rpm_reg pm8901_nldo = {
548 	.desc.linear_ranges = nldo_ranges,
549 	.desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges),
550 	.desc.n_voltages = 64,
551 	.desc.ops = &mV_ops,
552 	.parts = &rpm8660_ldo_parts,
553 	.supports_force_mode_auto = false,
554 	.supports_force_mode_bypass = true,
555 };
556 
557 static const struct qcom_rpm_reg pm8901_ftsmps = {
558 	.desc.linear_ranges = ftsmps_ranges,
559 	.desc.n_linear_ranges = ARRAY_SIZE(ftsmps_ranges),
560 	.desc.n_voltages = 101,
561 	.desc.ops = &mV_ops,
562 	.parts = &rpm8660_smps_parts,
563 	.supports_force_mode_auto = true,
564 	.supports_force_mode_bypass = false,
565 };
566 
567 static const struct qcom_rpm_reg pm8901_switch = {
568 	.desc.ops = &switch_ops,
569 	.parts = &rpm8660_switch_parts,
570 };
571 
572 /*
573  * PM8921 regulators
574  */
575 static const struct qcom_rpm_reg pm8921_pldo = {
576 	.desc.linear_ranges = pldo_ranges,
577 	.desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges),
578 	.desc.n_voltages = 161,
579 	.desc.ops = &uV_ops,
580 	.parts = &rpm8960_ldo_parts,
581 	.supports_force_mode_auto = false,
582 	.supports_force_mode_bypass = true,
583 };
584 
585 static const struct qcom_rpm_reg pm8921_nldo = {
586 	.desc.linear_ranges = nldo_ranges,
587 	.desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges),
588 	.desc.n_voltages = 64,
589 	.desc.ops = &uV_ops,
590 	.parts = &rpm8960_ldo_parts,
591 	.supports_force_mode_auto = false,
592 	.supports_force_mode_bypass = true,
593 };
594 
595 static const struct qcom_rpm_reg pm8921_nldo1200 = {
596 	.desc.linear_ranges = nldo1200_ranges,
597 	.desc.n_linear_ranges = ARRAY_SIZE(nldo1200_ranges),
598 	.desc.n_voltages = 124,
599 	.desc.ops = &uV_ops,
600 	.parts = &rpm8960_ldo_parts,
601 	.supports_force_mode_auto = false,
602 	.supports_force_mode_bypass = true,
603 };
604 
605 static const struct qcom_rpm_reg pm8921_smps = {
606 	.desc.linear_ranges = smps_ranges,
607 	.desc.n_linear_ranges = ARRAY_SIZE(smps_ranges),
608 	.desc.n_voltages = 154,
609 	.desc.ops = &uV_ops,
610 	.parts = &rpm8960_smps_parts,
611 	.supports_force_mode_auto = true,
612 	.supports_force_mode_bypass = false,
613 };
614 
615 static const struct qcom_rpm_reg pm8921_ftsmps = {
616 	.desc.linear_ranges = ftsmps_ranges,
617 	.desc.n_linear_ranges = ARRAY_SIZE(ftsmps_ranges),
618 	.desc.n_voltages = 101,
619 	.desc.ops = &uV_ops,
620 	.parts = &rpm8960_smps_parts,
621 	.supports_force_mode_auto = true,
622 	.supports_force_mode_bypass = false,
623 };
624 
625 static const struct qcom_rpm_reg pm8921_ncp = {
626 	.desc.linear_ranges = ncp_ranges,
627 	.desc.n_linear_ranges = ARRAY_SIZE(ncp_ranges),
628 	.desc.n_voltages = 32,
629 	.desc.ops = &uV_ops,
630 	.parts = &rpm8960_ncp_parts,
631 };
632 
633 static const struct qcom_rpm_reg pm8921_switch = {
634 	.desc.ops = &switch_ops,
635 	.parts = &rpm8960_switch_parts,
636 };
637 
638 static const struct qcom_rpm_reg smb208_smps = {
639 	.desc.linear_ranges = smb208_ranges,
640 	.desc.n_linear_ranges = ARRAY_SIZE(smb208_ranges),
641 	.desc.n_voltages = 235,
642 	.desc.ops = &uV_ops,
643 	.parts = &rpm8960_smps_parts,
644 	.supports_force_mode_auto = false,
645 	.supports_force_mode_bypass = false,
646 };
647 
648 static int rpm_reg_set(struct qcom_rpm_reg *vreg,
649 		       const struct request_member *req,
650 		       const int value)
651 {
652 	if (req->mask == 0 || (value << req->shift) & ~req->mask)
653 		return -EINVAL;
654 
655 	vreg->val[req->word] &= ~req->mask;
656 	vreg->val[req->word] |= value << req->shift;
657 
658 	return 0;
659 }
660 
661 static int rpm_reg_of_parse_freq(struct device *dev,
662 				 struct device_node *node,
663 				 struct qcom_rpm_reg *vreg)
664 {
665 	static const int freq_table[] = {
666 		19200000, 9600000, 6400000, 4800000, 3840000, 3200000, 2740000,
667 		2400000, 2130000, 1920000, 1750000, 1600000, 1480000, 1370000,
668 		1280000, 1200000,
669 
670 	};
671 	const char *key;
672 	u32 freq;
673 	int ret;
674 	int i;
675 
676 	key = "qcom,switch-mode-frequency";
677 	ret = of_property_read_u32(node, key, &freq);
678 	if (ret) {
679 		dev_err(dev, "regulator requires %s property\n", key);
680 		return -EINVAL;
681 	}
682 
683 	for (i = 0; i < ARRAY_SIZE(freq_table); i++) {
684 		if (freq == freq_table[i]) {
685 			rpm_reg_set(vreg, &vreg->parts->freq, i + 1);
686 			return 0;
687 		}
688 	}
689 
690 	dev_err(dev, "invalid frequency %d\n", freq);
691 	return -EINVAL;
692 }
693 
694 static int rpm_reg_of_parse(struct device_node *node,
695 			    const struct regulator_desc *desc,
696 			    struct regulator_config *config)
697 {
698 	struct qcom_rpm_reg *vreg = config->driver_data;
699 	struct device *dev = config->dev;
700 	const char *key;
701 	u32 force_mode;
702 	bool pwm;
703 	u32 val;
704 	int ret;
705 
706 	key = "bias-pull-down";
707 	if (of_property_read_bool(node, key)) {
708 		ret = rpm_reg_set(vreg, &vreg->parts->pd, 1);
709 		if (ret) {
710 			dev_err(dev, "%s is invalid", key);
711 			return ret;
712 		}
713 	}
714 
715 	if (vreg->parts->freq.mask) {
716 		ret = rpm_reg_of_parse_freq(dev, node, vreg);
717 		if (ret < 0)
718 			return ret;
719 	}
720 
721 	if (vreg->parts->pm.mask) {
722 		key = "qcom,power-mode-hysteretic";
723 		pwm = !of_property_read_bool(node, key);
724 
725 		ret = rpm_reg_set(vreg, &vreg->parts->pm, pwm);
726 		if (ret) {
727 			dev_err(dev, "failed to set power mode\n");
728 			return ret;
729 		}
730 	}
731 
732 	if (vreg->parts->fm.mask) {
733 		force_mode = -1;
734 
735 		key = "qcom,force-mode";
736 		ret = of_property_read_u32(node, key, &val);
737 		if (ret == -EINVAL) {
738 			val = QCOM_RPM_FORCE_MODE_NONE;
739 		} else if (ret < 0) {
740 			dev_err(dev, "failed to read %s\n", key);
741 			return ret;
742 		}
743 
744 		/*
745 		 * If force-mode is encoded as 2 bits then the
746 		 * possible register values are:
747 		 * NONE, LPM, HPM
748 		 * otherwise:
749 		 * NONE, LPM, AUTO, HPM, BYPASS
750 		 */
751 		switch (val) {
752 		case QCOM_RPM_FORCE_MODE_NONE:
753 			force_mode = 0;
754 			break;
755 		case QCOM_RPM_FORCE_MODE_LPM:
756 			force_mode = 1;
757 			break;
758 		case QCOM_RPM_FORCE_MODE_HPM:
759 			if (FORCE_MODE_IS_2_BITS(vreg))
760 				force_mode = 2;
761 			else
762 				force_mode = 3;
763 			break;
764 		case QCOM_RPM_FORCE_MODE_AUTO:
765 			if (vreg->supports_force_mode_auto)
766 				force_mode = 2;
767 			break;
768 		case QCOM_RPM_FORCE_MODE_BYPASS:
769 			if (vreg->supports_force_mode_bypass)
770 				force_mode = 4;
771 			break;
772 		}
773 
774 		if (force_mode == -1) {
775 			dev_err(dev, "invalid force mode\n");
776 			return -EINVAL;
777 		}
778 
779 		ret = rpm_reg_set(vreg, &vreg->parts->fm, force_mode);
780 		if (ret) {
781 			dev_err(dev, "failed to set force mode\n");
782 			return ret;
783 		}
784 	}
785 
786 	return 0;
787 }
788 
789 struct rpm_regulator_data {
790 	const char *name;
791 	int resource;
792 	const struct qcom_rpm_reg *template;
793 	const char *supply;
794 };
795 
796 static const struct rpm_regulator_data rpm_pm8018_regulators[] = {
797 	{ "s1",  QCOM_RPM_PM8018_SMPS1, &pm8018_smps, "vdd_s1" },
798 	{ "s2",  QCOM_RPM_PM8018_SMPS2, &pm8018_smps, "vdd_s2" },
799 	{ "s3",  QCOM_RPM_PM8018_SMPS3, &pm8018_smps, "vdd_s3" },
800 	{ "s4",  QCOM_RPM_PM8018_SMPS4, &pm8018_smps, "vdd_s4" },
801 	{ "s5",  QCOM_RPM_PM8018_SMPS5, &pm8018_smps, "vdd_s5" },
802 
803 	{ "l2",  QCOM_RPM_PM8018_LDO2,  &pm8018_pldo, "vdd_l2" },
804 	{ "l3",  QCOM_RPM_PM8018_LDO3,  &pm8018_pldo, "vdd_l3" },
805 	{ "l4",  QCOM_RPM_PM8018_LDO4,  &pm8018_pldo, "vdd_l4" },
806 	{ "l5",  QCOM_RPM_PM8018_LDO5,  &pm8018_pldo, "vdd_l5" },
807 	{ "l6",  QCOM_RPM_PM8018_LDO6,  &pm8018_pldo, "vdd_l7" },
808 	{ "l7",  QCOM_RPM_PM8018_LDO7,  &pm8018_pldo, "vdd_l7" },
809 	{ "l8",  QCOM_RPM_PM8018_LDO8,  &pm8018_nldo, "vdd_l8" },
810 	{ "l9",  QCOM_RPM_PM8018_LDO9,  &pm8921_nldo1200,
811 						      "vdd_l9_l10_l11_l12" },
812 	{ "l10", QCOM_RPM_PM8018_LDO10, &pm8018_nldo, "vdd_l9_l10_l11_l12" },
813 	{ "l11", QCOM_RPM_PM8018_LDO11, &pm8018_nldo, "vdd_l9_l10_l11_l12" },
814 	{ "l12", QCOM_RPM_PM8018_LDO12, &pm8018_nldo, "vdd_l9_l10_l11_l12" },
815 	{ "l14", QCOM_RPM_PM8018_LDO14, &pm8018_pldo, "vdd_l14" },
816 
817 	{ "lvs1", QCOM_RPM_PM8018_LVS1, &pm8018_switch, "lvs1_in" },
818 
819 	{ }
820 };
821 
822 static const struct rpm_regulator_data rpm_pm8058_regulators[] = {
823 	{ "l0",   QCOM_RPM_PM8058_LDO0,   &pm8058_nldo, "vdd_l0_l1_lvs"	},
824 	{ "l1",   QCOM_RPM_PM8058_LDO1,   &pm8058_nldo, "vdd_l0_l1_lvs" },
825 	{ "l2",   QCOM_RPM_PM8058_LDO2,   &pm8058_pldo, "vdd_l2_l11_l12" },
826 	{ "l3",   QCOM_RPM_PM8058_LDO3,   &pm8058_pldo, "vdd_l3_l4_l5" },
827 	{ "l4",   QCOM_RPM_PM8058_LDO4,   &pm8058_pldo, "vdd_l3_l4_l5" },
828 	{ "l5",   QCOM_RPM_PM8058_LDO5,   &pm8058_pldo, "vdd_l3_l4_l5" },
829 	{ "l6",   QCOM_RPM_PM8058_LDO6,   &pm8058_pldo, "vdd_l6_l7" },
830 	{ "l7",   QCOM_RPM_PM8058_LDO7,   &pm8058_pldo, "vdd_l6_l7" },
831 	{ "l8",   QCOM_RPM_PM8058_LDO8,   &pm8058_pldo, "vdd_l8" },
832 	{ "l9",   QCOM_RPM_PM8058_LDO9,   &pm8058_pldo, "vdd_l9" },
833 	{ "l10",  QCOM_RPM_PM8058_LDO10,  &pm8058_pldo, "vdd_l10" },
834 	{ "l11",  QCOM_RPM_PM8058_LDO11,  &pm8058_pldo, "vdd_l2_l11_l12" },
835 	{ "l12",  QCOM_RPM_PM8058_LDO12,  &pm8058_pldo, "vdd_l2_l11_l12" },
836 	{ "l13",  QCOM_RPM_PM8058_LDO13,  &pm8058_pldo, "vdd_l13_l16" },
837 	{ "l14",  QCOM_RPM_PM8058_LDO14,  &pm8058_pldo, "vdd_l14_l15" },
838 	{ "l15",  QCOM_RPM_PM8058_LDO15,  &pm8058_pldo, "vdd_l14_l15" },
839 	{ "l16",  QCOM_RPM_PM8058_LDO16,  &pm8058_pldo, "vdd_l13_l16" },
840 	{ "l17",  QCOM_RPM_PM8058_LDO17,  &pm8058_pldo, "vdd_l17_l18" },
841 	{ "l18",  QCOM_RPM_PM8058_LDO18,  &pm8058_pldo, "vdd_l17_l18" },
842 	{ "l19",  QCOM_RPM_PM8058_LDO19,  &pm8058_pldo, "vdd_l19_l20" },
843 	{ "l20",  QCOM_RPM_PM8058_LDO20,  &pm8058_pldo, "vdd_l19_l20" },
844 	{ "l21",  QCOM_RPM_PM8058_LDO21,  &pm8058_nldo, "vdd_l21" },
845 	{ "l22",  QCOM_RPM_PM8058_LDO22,  &pm8058_nldo, "vdd_l22" },
846 	{ "l23",  QCOM_RPM_PM8058_LDO23,  &pm8058_nldo, "vdd_l23_l24_l25" },
847 	{ "l24",  QCOM_RPM_PM8058_LDO24,  &pm8058_nldo, "vdd_l23_l24_l25" },
848 	{ "l25",  QCOM_RPM_PM8058_LDO25,  &pm8058_nldo, "vdd_l23_l24_l25" },
849 
850 	{ "s0",   QCOM_RPM_PM8058_SMPS0,  &pm8058_smps, "vdd_s0" },
851 	{ "s1",   QCOM_RPM_PM8058_SMPS1,  &pm8058_smps, "vdd_s1" },
852 	{ "s2",   QCOM_RPM_PM8058_SMPS2,  &pm8058_smps, "vdd_s2" },
853 	{ "s3",   QCOM_RPM_PM8058_SMPS3,  &pm8058_smps, "vdd_s3" },
854 	{ "s4",   QCOM_RPM_PM8058_SMPS4,  &pm8058_smps, "vdd_s4" },
855 
856 	{ "lvs0", QCOM_RPM_PM8058_LVS0, &pm8058_switch, "vdd_l0_l1_lvs" },
857 	{ "lvs1", QCOM_RPM_PM8058_LVS1, &pm8058_switch, "vdd_l0_l1_lvs" },
858 
859 	{ "ncp",  QCOM_RPM_PM8058_NCP, &pm8058_ncp, "vdd_ncp" },
860 	{ }
861 };
862 
863 static const struct rpm_regulator_data rpm_pm8901_regulators[] = {
864 	{ "l0",   QCOM_RPM_PM8901_LDO0, &pm8901_nldo, "vdd_l0" },
865 	{ "l1",   QCOM_RPM_PM8901_LDO1, &pm8901_pldo, "vdd_l1" },
866 	{ "l2",   QCOM_RPM_PM8901_LDO2, &pm8901_pldo, "vdd_l2" },
867 	{ "l3",   QCOM_RPM_PM8901_LDO3, &pm8901_pldo, "vdd_l3" },
868 	{ "l4",   QCOM_RPM_PM8901_LDO4, &pm8901_pldo, "vdd_l4" },
869 	{ "l5",   QCOM_RPM_PM8901_LDO5, &pm8901_pldo, "vdd_l5" },
870 	{ "l6",   QCOM_RPM_PM8901_LDO6, &pm8901_pldo, "vdd_l6" },
871 
872 	{ "s0",   QCOM_RPM_PM8901_SMPS0, &pm8901_ftsmps, "vdd_s0" },
873 	{ "s1",   QCOM_RPM_PM8901_SMPS1, &pm8901_ftsmps, "vdd_s1" },
874 	{ "s2",   QCOM_RPM_PM8901_SMPS2, &pm8901_ftsmps, "vdd_s2" },
875 	{ "s3",   QCOM_RPM_PM8901_SMPS3, &pm8901_ftsmps, "vdd_s3" },
876 	{ "s4",   QCOM_RPM_PM8901_SMPS4, &pm8901_ftsmps, "vdd_s4" },
877 
878 	{ "lvs0", QCOM_RPM_PM8901_LVS0, &pm8901_switch, "lvs0_in" },
879 	{ "lvs1", QCOM_RPM_PM8901_LVS1, &pm8901_switch, "lvs1_in" },
880 	{ "lvs2", QCOM_RPM_PM8901_LVS2, &pm8901_switch, "lvs2_in" },
881 	{ "lvs3", QCOM_RPM_PM8901_LVS3, &pm8901_switch, "lvs3_in" },
882 
883 	{ "mvs", QCOM_RPM_PM8901_MVS, &pm8901_switch, "mvs_in" },
884 	{ }
885 };
886 
887 static const struct rpm_regulator_data rpm_pm8921_regulators[] = {
888 	{ "s1",  QCOM_RPM_PM8921_SMPS1, &pm8921_smps, "vdd_s1" },
889 	{ "s2",  QCOM_RPM_PM8921_SMPS2, &pm8921_smps, "vdd_s2" },
890 	{ "s3",  QCOM_RPM_PM8921_SMPS3, &pm8921_smps },
891 	{ "s4",  QCOM_RPM_PM8921_SMPS4, &pm8921_smps, "vdd_s4" },
892 	{ "s7",  QCOM_RPM_PM8921_SMPS7, &pm8921_smps, "vdd_s7" },
893 	{ "s8",  QCOM_RPM_PM8921_SMPS8, &pm8921_smps, "vdd_s8"  },
894 
895 	{ "l1",  QCOM_RPM_PM8921_LDO1, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
896 	{ "l2",  QCOM_RPM_PM8921_LDO2, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
897 	{ "l3",  QCOM_RPM_PM8921_LDO3, &pm8921_pldo, "vdd_l3_l15_l17" },
898 	{ "l4",  QCOM_RPM_PM8921_LDO4, &pm8921_pldo, "vdd_l4_l14" },
899 	{ "l5",  QCOM_RPM_PM8921_LDO5, &pm8921_pldo, "vdd_l5_l8_l16" },
900 	{ "l6",  QCOM_RPM_PM8921_LDO6, &pm8921_pldo, "vdd_l6_l7" },
901 	{ "l7",  QCOM_RPM_PM8921_LDO7, &pm8921_pldo, "vdd_l6_l7" },
902 	{ "l8",  QCOM_RPM_PM8921_LDO8, &pm8921_pldo, "vdd_l5_l8_l16" },
903 	{ "l9",  QCOM_RPM_PM8921_LDO9, &pm8921_pldo, "vdd_l9_l11" },
904 	{ "l10", QCOM_RPM_PM8921_LDO10, &pm8921_pldo, "vdd_l10_l22" },
905 	{ "l11", QCOM_RPM_PM8921_LDO11, &pm8921_pldo, "vdd_l9_l11" },
906 	{ "l12", QCOM_RPM_PM8921_LDO12, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
907 	{ "l14", QCOM_RPM_PM8921_LDO14, &pm8921_pldo, "vdd_l4_l14" },
908 	{ "l15", QCOM_RPM_PM8921_LDO15, &pm8921_pldo, "vdd_l3_l15_l17" },
909 	{ "l16", QCOM_RPM_PM8921_LDO16, &pm8921_pldo, "vdd_l5_l8_l16" },
910 	{ "l17", QCOM_RPM_PM8921_LDO17, &pm8921_pldo, "vdd_l3_l15_l17" },
911 	{ "l18", QCOM_RPM_PM8921_LDO18, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
912 	{ "l21", QCOM_RPM_PM8921_LDO21, &pm8921_pldo, "vdd_l21_l23_l29" },
913 	{ "l22", QCOM_RPM_PM8921_LDO22, &pm8921_pldo, "vdd_l10_l22" },
914 	{ "l23", QCOM_RPM_PM8921_LDO23, &pm8921_pldo, "vdd_l21_l23_l29" },
915 	{ "l24", QCOM_RPM_PM8921_LDO24, &pm8921_nldo1200, "vdd_l24" },
916 	{ "l25", QCOM_RPM_PM8921_LDO25, &pm8921_nldo1200, "vdd_l25" },
917 	{ "l26", QCOM_RPM_PM8921_LDO26, &pm8921_nldo1200, "vdd_l26" },
918 	{ "l27", QCOM_RPM_PM8921_LDO27, &pm8921_nldo1200, "vdd_l27" },
919 	{ "l28", QCOM_RPM_PM8921_LDO28, &pm8921_nldo1200, "vdd_l28" },
920 	{ "l29", QCOM_RPM_PM8921_LDO29, &pm8921_pldo, "vdd_l21_l23_l29" },
921 
922 	{ "lvs1", QCOM_RPM_PM8921_LVS1, &pm8921_switch, "vin_lvs1_3_6" },
923 	{ "lvs2", QCOM_RPM_PM8921_LVS2, &pm8921_switch, "vin_lvs2" },
924 	{ "lvs3", QCOM_RPM_PM8921_LVS3, &pm8921_switch, "vin_lvs1_3_6" },
925 	{ "lvs4", QCOM_RPM_PM8921_LVS4, &pm8921_switch, "vin_lvs4_5_7" },
926 	{ "lvs5", QCOM_RPM_PM8921_LVS5, &pm8921_switch, "vin_lvs4_5_7" },
927 	{ "lvs6", QCOM_RPM_PM8921_LVS6, &pm8921_switch, "vin_lvs1_3_6" },
928 	{ "lvs7", QCOM_RPM_PM8921_LVS7, &pm8921_switch, "vin_lvs4_5_7" },
929 
930 	{ "usb-switch", QCOM_RPM_USB_OTG_SWITCH, &pm8921_switch, "vin_5vs" },
931 	{ "hdmi-switch", QCOM_RPM_HDMI_SWITCH, &pm8921_switch, "vin_5vs" },
932 	{ "ncp", QCOM_RPM_PM8921_NCP, &pm8921_ncp, "vdd_ncp" },
933 	{ }
934 };
935 
936 static const struct of_device_id rpm_of_match[] = {
937 	{ .compatible = "qcom,rpm-pm8018-regulators",
938 		.data = &rpm_pm8018_regulators },
939 	{ .compatible = "qcom,rpm-pm8058-regulators", .data = &rpm_pm8058_regulators },
940 	{ .compatible = "qcom,rpm-pm8901-regulators", .data = &rpm_pm8901_regulators },
941 	{ .compatible = "qcom,rpm-pm8921-regulators", .data = &rpm_pm8921_regulators },
942 	{ }
943 };
944 MODULE_DEVICE_TABLE(of, rpm_of_match);
945 
946 static int rpm_reg_probe(struct platform_device *pdev)
947 {
948 	const struct rpm_regulator_data *reg;
949 	const struct of_device_id *match;
950 	struct regulator_config config = { };
951 	struct regulator_dev *rdev;
952 	struct qcom_rpm_reg *vreg;
953 	struct qcom_rpm *rpm;
954 
955 	rpm = dev_get_drvdata(pdev->dev.parent);
956 	if (!rpm) {
957 		dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
958 		return -ENODEV;
959 	}
960 
961 	match = of_match_device(rpm_of_match, &pdev->dev);
962 	if (!match) {
963 		dev_err(&pdev->dev, "failed to match device\n");
964 		return -ENODEV;
965 	}
966 
967 	for (reg = match->data; reg->name; reg++) {
968 		vreg = devm_kmalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
969 		if (!vreg)
970 			return -ENOMEM;
971 
972 		memcpy(vreg, reg->template, sizeof(*vreg));
973 		mutex_init(&vreg->lock);
974 
975 		vreg->dev = &pdev->dev;
976 		vreg->resource = reg->resource;
977 		vreg->rpm = rpm;
978 
979 		vreg->desc.id = -1;
980 		vreg->desc.owner = THIS_MODULE;
981 		vreg->desc.type = REGULATOR_VOLTAGE;
982 		vreg->desc.name = reg->name;
983 		vreg->desc.supply_name = reg->supply;
984 		vreg->desc.of_match = reg->name;
985 		vreg->desc.of_parse_cb = rpm_reg_of_parse;
986 
987 		config.dev = &pdev->dev;
988 		config.driver_data = vreg;
989 		rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
990 		if (IS_ERR(rdev)) {
991 			dev_err(&pdev->dev, "failed to register %s\n", reg->name);
992 			return PTR_ERR(rdev);
993 		}
994 	}
995 
996 	return 0;
997 }
998 
999 static struct platform_driver rpm_reg_driver = {
1000 	.probe          = rpm_reg_probe,
1001 	.driver  = {
1002 		.name  = "qcom_rpm_reg",
1003 		.of_match_table = of_match_ptr(rpm_of_match),
1004 	},
1005 };
1006 
1007 static int __init rpm_reg_init(void)
1008 {
1009 	return platform_driver_register(&rpm_reg_driver);
1010 }
1011 subsys_initcall(rpm_reg_init);
1012 
1013 static void __exit rpm_reg_exit(void)
1014 {
1015 	platform_driver_unregister(&rpm_reg_driver);
1016 }
1017 module_exit(rpm_reg_exit)
1018 
1019 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
1020 MODULE_LICENSE("GPL v2");
1021