1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
3 
4 #define pr_fmt(fmt) "%s: " fmt, __func__
5 
6 #include <linux/err.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/of.h>
10 #include <linux/of_device.h>
11 #include <linux/platform_device.h>
12 #include <linux/slab.h>
13 #include <linux/string.h>
14 #include <linux/regulator/driver.h>
15 #include <linux/regulator/machine.h>
16 #include <linux/regulator/of_regulator.h>
17 
18 #include <soc/qcom/cmd-db.h>
19 #include <soc/qcom/rpmh.h>
20 
21 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 
23 /**
24  * enum rpmh_regulator_type - supported RPMh accelerator types
25  * @VRM:	RPMh VRM accelerator which supports voting on enable, voltage,
26  *		and mode of LDO, SMPS, and BOB type PMIC regulators.
27  * @XOB:	RPMh XOB accelerator which supports voting on the enable state
28  *		of PMIC regulators.
29  */
30 enum rpmh_regulator_type {
31 	VRM,
32 	XOB,
33 };
34 
35 #define RPMH_REGULATOR_REG_VRM_VOLTAGE		0x0
36 #define RPMH_REGULATOR_REG_ENABLE		0x4
37 #define RPMH_REGULATOR_REG_VRM_MODE		0x8
38 
39 #define PMIC4_LDO_MODE_RETENTION		4
40 #define PMIC4_LDO_MODE_LPM			5
41 #define PMIC4_LDO_MODE_HPM			7
42 
43 #define PMIC4_SMPS_MODE_RETENTION		4
44 #define PMIC4_SMPS_MODE_PFM			5
45 #define PMIC4_SMPS_MODE_AUTO			6
46 #define PMIC4_SMPS_MODE_PWM			7
47 
48 #define PMIC4_BOB_MODE_PASS			0
49 #define PMIC4_BOB_MODE_PFM			1
50 #define PMIC4_BOB_MODE_AUTO			2
51 #define PMIC4_BOB_MODE_PWM			3
52 
53 #define PMIC5_LDO_MODE_RETENTION		3
54 #define PMIC5_LDO_MODE_LPM			4
55 #define PMIC5_LDO_MODE_HPM			7
56 
57 #define PMIC5_SMPS_MODE_RETENTION		3
58 #define PMIC5_SMPS_MODE_PFM			4
59 #define PMIC5_SMPS_MODE_AUTO			6
60 #define PMIC5_SMPS_MODE_PWM			7
61 
62 #define PMIC5_BOB_MODE_PASS			2
63 #define PMIC5_BOB_MODE_PFM			4
64 #define PMIC5_BOB_MODE_AUTO			6
65 #define PMIC5_BOB_MODE_PWM			7
66 
67 /**
68  * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
69  * @regulator_type:		RPMh accelerator type used to manage this
70  *				regulator
71  * @ops:			Pointer to regulator ops callback structure
72  * @voltage_range:		The single range of voltages supported by this
73  *				PMIC regulator type
74  * @n_voltages:			The number of unique voltage set points defined
75  *				by voltage_range
76  * @hpm_min_load_uA:		Minimum load current in microamps that requires
77  *				high power mode (HPM) operation.  This is used
78  *				for LDO hardware type regulators only.
79  * @pmic_mode_map:		Array indexed by regulator framework mode
80  *				containing PMIC hardware modes.  Must be large
81  *				enough to index all framework modes supported
82  *				by this regulator hardware type.
83  * @of_map_mode:		Maps an RPMH_REGULATOR_MODE_* mode value defined
84  *				in device tree to a regulator framework mode
85  */
86 struct rpmh_vreg_hw_data {
87 	enum rpmh_regulator_type		regulator_type;
88 	const struct regulator_ops		*ops;
89 	const struct linear_range	voltage_range;
90 	int					n_voltages;
91 	int					hpm_min_load_uA;
92 	const int				*pmic_mode_map;
93 	unsigned int			      (*of_map_mode)(unsigned int mode);
94 };
95 
96 /**
97  * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
98  *		single regulator device
99  * @dev:			Device pointer for the top-level PMIC RPMh
100  *				regulator parent device.  This is used as a
101  *				handle in RPMh write requests.
102  * @addr:			Base address of the regulator resource within
103  *				an RPMh accelerator
104  * @rdesc:			Regulator descriptor
105  * @hw_data:			PMIC regulator configuration data for this RPMh
106  *				regulator
107  * @always_wait_for_ack:	Boolean flag indicating if a request must always
108  *				wait for an ACK from RPMh before continuing even
109  *				if it corresponds to a strictly lower power
110  *				state (e.g. enabled --> disabled).
111  * @enabled:			Flag indicating if the regulator is enabled or
112  *				not
113  * @bypassed:			Boolean indicating if the regulator is in
114  *				bypass (pass-through) mode or not.  This is
115  *				only used by BOB rpmh-regulator resources.
116  * @voltage_selector:		Selector used for get_voltage_sel() and
117  *				set_voltage_sel() callbacks
118  * @mode:			RPMh VRM regulator current framework mode
119  */
120 struct rpmh_vreg {
121 	struct device			*dev;
122 	u32				addr;
123 	struct regulator_desc		rdesc;
124 	const struct rpmh_vreg_hw_data	*hw_data;
125 	bool				always_wait_for_ack;
126 
127 	int				enabled;
128 	bool				bypassed;
129 	int				voltage_selector;
130 	unsigned int			mode;
131 };
132 
133 /**
134  * struct rpmh_vreg_init_data - initialization data for an RPMh regulator
135  * @name:			Name for the regulator which also corresponds
136  *				to the device tree subnode name of the regulator
137  * @resource_name:		RPMh regulator resource name format string.
138  *				This must include exactly one field: '%s' which
139  *				is filled at run-time with the PMIC ID provided
140  *				by device tree property qcom,pmic-id.  Example:
141  *				"ldo%s1" for RPMh resource "ldoa1".
142  * @supply_name:		Parent supply regulator name
143  * @hw_data:			Configuration data for this PMIC regulator type
144  */
145 struct rpmh_vreg_init_data {
146 	const char			*name;
147 	const char			*resource_name;
148 	const char			*supply_name;
149 	const struct rpmh_vreg_hw_data	*hw_data;
150 };
151 
152 /**
153  * rpmh_regulator_send_request() - send the request to RPMh
154  * @vreg:		Pointer to the RPMh regulator
155  * @cmd:		Pointer to the RPMh command to send
156  * @wait_for_ack:	Boolean indicating if execution must wait until the
157  *			request has been acknowledged as complete
158  *
159  * Return: 0 on success, errno on failure
160  */
161 static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
162 			struct tcs_cmd *cmd, bool wait_for_ack)
163 {
164 	int ret;
165 
166 	if (wait_for_ack || vreg->always_wait_for_ack)
167 		ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1);
168 	else
169 		ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd,
170 					1);
171 
172 	return ret;
173 }
174 
175 static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
176 				unsigned int selector, bool wait_for_ack)
177 {
178 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
179 	struct tcs_cmd cmd = {
180 		.addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
181 	};
182 	int ret;
183 
184 	/* VRM voltage control register is set with voltage in millivolts. */
185 	cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
186 							selector), 1000);
187 
188 	ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack);
189 	if (!ret)
190 		vreg->voltage_selector = selector;
191 
192 	return ret;
193 }
194 
195 static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
196 					unsigned int selector)
197 {
198 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
199 
200 	if (vreg->enabled == -EINVAL) {
201 		/*
202 		 * Cache the voltage and send it later when the regulator is
203 		 * enabled or disabled.
204 		 */
205 		vreg->voltage_selector = selector;
206 		return 0;
207 	}
208 
209 	return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
210 					selector > vreg->voltage_selector);
211 }
212 
213 static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
214 {
215 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
216 
217 	return vreg->voltage_selector;
218 }
219 
220 static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
221 {
222 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
223 
224 	return vreg->enabled;
225 }
226 
227 static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
228 					bool enable)
229 {
230 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
231 	struct tcs_cmd cmd = {
232 		.addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
233 		.data = enable,
234 	};
235 	int ret;
236 
237 	if (vreg->enabled == -EINVAL &&
238 	    vreg->voltage_selector != -ENOTRECOVERABLE) {
239 		ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
240 						vreg->voltage_selector, true);
241 		if (ret < 0)
242 			return ret;
243 	}
244 
245 	ret = rpmh_regulator_send_request(vreg, &cmd, enable);
246 	if (!ret)
247 		vreg->enabled = enable;
248 
249 	return ret;
250 }
251 
252 static int rpmh_regulator_enable(struct regulator_dev *rdev)
253 {
254 	return rpmh_regulator_set_enable_state(rdev, true);
255 }
256 
257 static int rpmh_regulator_disable(struct regulator_dev *rdev)
258 {
259 	return rpmh_regulator_set_enable_state(rdev, false);
260 }
261 
262 static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
263 					unsigned int mode, bool bypassed)
264 {
265 	struct tcs_cmd cmd = {
266 		.addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
267 	};
268 	int pmic_mode;
269 
270 	if (mode > REGULATOR_MODE_STANDBY)
271 		return -EINVAL;
272 
273 	pmic_mode = vreg->hw_data->pmic_mode_map[mode];
274 	if (pmic_mode < 0)
275 		return pmic_mode;
276 
277 	if (bypassed)
278 		cmd.data = PMIC4_BOB_MODE_PASS;
279 	else
280 		cmd.data = pmic_mode;
281 
282 	return rpmh_regulator_send_request(vreg, &cmd, true);
283 }
284 
285 static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
286 					unsigned int mode)
287 {
288 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
289 	int ret;
290 
291 	if (mode == vreg->mode)
292 		return 0;
293 
294 	ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed);
295 	if (!ret)
296 		vreg->mode = mode;
297 
298 	return ret;
299 }
300 
301 static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
302 {
303 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
304 
305 	return vreg->mode;
306 }
307 
308 /**
309  * rpmh_regulator_vrm_get_optimum_mode() - get the mode based on the  load
310  * @rdev:		Regulator device pointer for the rpmh-regulator
311  * @input_uV:		Input voltage
312  * @output_uV:		Output voltage
313  * @load_uA:		Aggregated load current in microamps
314  *
315  * This function is used in the regulator_ops for VRM type RPMh regulator
316  * devices.
317  *
318  * Return: 0 on success, errno on failure
319  */
320 static unsigned int rpmh_regulator_vrm_get_optimum_mode(
321 	struct regulator_dev *rdev, int input_uV, int output_uV, int load_uA)
322 {
323 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
324 
325 	if (load_uA >= vreg->hw_data->hpm_min_load_uA)
326 		return REGULATOR_MODE_NORMAL;
327 	else
328 		return REGULATOR_MODE_IDLE;
329 }
330 
331 static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
332 				bool enable)
333 {
334 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
335 	int ret;
336 
337 	if (vreg->bypassed == enable)
338 		return 0;
339 
340 	ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable);
341 	if (!ret)
342 		vreg->bypassed = enable;
343 
344 	return ret;
345 }
346 
347 static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
348 				bool *enable)
349 {
350 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
351 
352 	*enable = vreg->bypassed;
353 
354 	return 0;
355 }
356 
357 static const struct regulator_ops rpmh_regulator_vrm_ops = {
358 	.enable			= rpmh_regulator_enable,
359 	.disable		= rpmh_regulator_disable,
360 	.is_enabled		= rpmh_regulator_is_enabled,
361 	.set_voltage_sel	= rpmh_regulator_vrm_set_voltage_sel,
362 	.get_voltage_sel	= rpmh_regulator_vrm_get_voltage_sel,
363 	.list_voltage		= regulator_list_voltage_linear_range,
364 	.set_mode		= rpmh_regulator_vrm_set_mode,
365 	.get_mode		= rpmh_regulator_vrm_get_mode,
366 };
367 
368 static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
369 	.enable			= rpmh_regulator_enable,
370 	.disable		= rpmh_regulator_disable,
371 	.is_enabled		= rpmh_regulator_is_enabled,
372 	.set_voltage_sel	= rpmh_regulator_vrm_set_voltage_sel,
373 	.get_voltage_sel	= rpmh_regulator_vrm_get_voltage_sel,
374 	.list_voltage		= regulator_list_voltage_linear_range,
375 	.set_mode		= rpmh_regulator_vrm_set_mode,
376 	.get_mode		= rpmh_regulator_vrm_get_mode,
377 	.get_optimum_mode	= rpmh_regulator_vrm_get_optimum_mode,
378 };
379 
380 static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
381 	.enable			= rpmh_regulator_enable,
382 	.disable		= rpmh_regulator_disable,
383 	.is_enabled		= rpmh_regulator_is_enabled,
384 	.set_voltage_sel	= rpmh_regulator_vrm_set_voltage_sel,
385 	.get_voltage_sel	= rpmh_regulator_vrm_get_voltage_sel,
386 	.list_voltage		= regulator_list_voltage_linear_range,
387 	.set_mode		= rpmh_regulator_vrm_set_mode,
388 	.get_mode		= rpmh_regulator_vrm_get_mode,
389 	.set_bypass		= rpmh_regulator_vrm_set_bypass,
390 	.get_bypass		= rpmh_regulator_vrm_get_bypass,
391 };
392 
393 static const struct regulator_ops rpmh_regulator_xob_ops = {
394 	.enable			= rpmh_regulator_enable,
395 	.disable		= rpmh_regulator_disable,
396 	.is_enabled		= rpmh_regulator_is_enabled,
397 };
398 
399 /**
400  * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator
401  * @vreg:		Pointer to the individual rpmh-regulator resource
402  * @dev:			Pointer to the top level rpmh-regulator PMIC device
403  * @node:		Pointer to the individual rpmh-regulator resource
404  *			device node
405  * @pmic_id:		String used to identify the top level rpmh-regulator
406  *			PMIC device on the board
407  * @pmic_rpmh_data:	Pointer to a null-terminated array of rpmh-regulator
408  *			resources defined for the top level PMIC device
409  *
410  * Return: 0 on success, errno on failure
411  */
412 static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
413 			struct device_node *node, const char *pmic_id,
414 			const struct rpmh_vreg_init_data *pmic_rpmh_data)
415 {
416 	struct regulator_config reg_config = {};
417 	char rpmh_resource_name[20] = "";
418 	const struct rpmh_vreg_init_data *rpmh_data;
419 	struct regulator_init_data *init_data;
420 	struct regulator_dev *rdev;
421 	int ret;
422 
423 	vreg->dev = dev;
424 
425 	for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
426 		if (of_node_name_eq(node, rpmh_data->name))
427 			break;
428 
429 	if (!rpmh_data->name) {
430 		dev_err(dev, "Unknown regulator %pOFn\n", node);
431 		return -EINVAL;
432 	}
433 
434 	scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
435 		rpmh_data->resource_name, pmic_id);
436 
437 	vreg->addr = cmd_db_read_addr(rpmh_resource_name);
438 	if (!vreg->addr) {
439 		dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
440 			node, rpmh_resource_name);
441 		return -ENODEV;
442 	}
443 
444 	vreg->rdesc.name = rpmh_data->name;
445 	vreg->rdesc.supply_name = rpmh_data->supply_name;
446 	vreg->hw_data = rpmh_data->hw_data;
447 
448 	vreg->enabled = -EINVAL;
449 	vreg->voltage_selector = -ENOTRECOVERABLE;
450 	vreg->mode = REGULATOR_MODE_INVALID;
451 
452 	if (rpmh_data->hw_data->n_voltages) {
453 		vreg->rdesc.linear_ranges = &rpmh_data->hw_data->voltage_range;
454 		vreg->rdesc.n_linear_ranges = 1;
455 		vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
456 	}
457 
458 	vreg->always_wait_for_ack = of_property_read_bool(node,
459 						"qcom,always-wait-for-ack");
460 
461 	vreg->rdesc.owner	= THIS_MODULE;
462 	vreg->rdesc.type	= REGULATOR_VOLTAGE;
463 	vreg->rdesc.ops		= vreg->hw_data->ops;
464 	vreg->rdesc.of_map_mode	= vreg->hw_data->of_map_mode;
465 
466 	init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc);
467 	if (!init_data)
468 		return -ENOMEM;
469 
470 	if (rpmh_data->hw_data->regulator_type == XOB &&
471 	    init_data->constraints.min_uV &&
472 	    init_data->constraints.min_uV == init_data->constraints.max_uV) {
473 		vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
474 		vreg->rdesc.n_voltages = 1;
475 	}
476 
477 	reg_config.dev		= dev;
478 	reg_config.init_data	= init_data;
479 	reg_config.of_node	= node;
480 	reg_config.driver_data	= vreg;
481 
482 	rdev = devm_regulator_register(dev, &vreg->rdesc, &reg_config);
483 	if (IS_ERR(rdev)) {
484 		ret = PTR_ERR(rdev);
485 		dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
486 			node, ret);
487 		return ret;
488 	}
489 
490 	dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
491 		node, rpmh_resource_name, vreg->addr);
492 
493 	return 0;
494 }
495 
496 static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
497 	[REGULATOR_MODE_INVALID] = -EINVAL,
498 	[REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
499 	[REGULATOR_MODE_IDLE]    = PMIC4_LDO_MODE_LPM,
500 	[REGULATOR_MODE_NORMAL]  = PMIC4_LDO_MODE_HPM,
501 	[REGULATOR_MODE_FAST]    = -EINVAL,
502 };
503 
504 static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
505 	[REGULATOR_MODE_INVALID] = -EINVAL,
506 	[REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
507 	[REGULATOR_MODE_IDLE]    = PMIC5_LDO_MODE_LPM,
508 	[REGULATOR_MODE_NORMAL]  = PMIC5_LDO_MODE_HPM,
509 	[REGULATOR_MODE_FAST]    = -EINVAL,
510 };
511 
512 static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
513 {
514 	unsigned int mode;
515 
516 	switch (rpmh_mode) {
517 	case RPMH_REGULATOR_MODE_HPM:
518 		mode = REGULATOR_MODE_NORMAL;
519 		break;
520 	case RPMH_REGULATOR_MODE_LPM:
521 		mode = REGULATOR_MODE_IDLE;
522 		break;
523 	case RPMH_REGULATOR_MODE_RET:
524 		mode = REGULATOR_MODE_STANDBY;
525 		break;
526 	default:
527 		mode = REGULATOR_MODE_INVALID;
528 		break;
529 	}
530 
531 	return mode;
532 }
533 
534 static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
535 	[REGULATOR_MODE_INVALID] = -EINVAL,
536 	[REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
537 	[REGULATOR_MODE_IDLE]    = PMIC4_SMPS_MODE_PFM,
538 	[REGULATOR_MODE_NORMAL]  = PMIC4_SMPS_MODE_AUTO,
539 	[REGULATOR_MODE_FAST]    = PMIC4_SMPS_MODE_PWM,
540 };
541 
542 static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
543 	[REGULATOR_MODE_INVALID] = -EINVAL,
544 	[REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
545 	[REGULATOR_MODE_IDLE]    = PMIC5_SMPS_MODE_PFM,
546 	[REGULATOR_MODE_NORMAL]  = PMIC5_SMPS_MODE_AUTO,
547 	[REGULATOR_MODE_FAST]    = PMIC5_SMPS_MODE_PWM,
548 };
549 
550 static unsigned int
551 rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
552 {
553 	unsigned int mode;
554 
555 	switch (rpmh_mode) {
556 	case RPMH_REGULATOR_MODE_HPM:
557 		mode = REGULATOR_MODE_FAST;
558 		break;
559 	case RPMH_REGULATOR_MODE_AUTO:
560 		mode = REGULATOR_MODE_NORMAL;
561 		break;
562 	case RPMH_REGULATOR_MODE_LPM:
563 		mode = REGULATOR_MODE_IDLE;
564 		break;
565 	case RPMH_REGULATOR_MODE_RET:
566 		mode = REGULATOR_MODE_STANDBY;
567 		break;
568 	default:
569 		mode = REGULATOR_MODE_INVALID;
570 		break;
571 	}
572 
573 	return mode;
574 }
575 
576 static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
577 	[REGULATOR_MODE_INVALID] = -EINVAL,
578 	[REGULATOR_MODE_STANDBY] = -EINVAL,
579 	[REGULATOR_MODE_IDLE]    = PMIC4_BOB_MODE_PFM,
580 	[REGULATOR_MODE_NORMAL]  = PMIC4_BOB_MODE_AUTO,
581 	[REGULATOR_MODE_FAST]    = PMIC4_BOB_MODE_PWM,
582 };
583 
584 static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
585 	[REGULATOR_MODE_INVALID] = -EINVAL,
586 	[REGULATOR_MODE_STANDBY] = -EINVAL,
587 	[REGULATOR_MODE_IDLE]    = PMIC5_BOB_MODE_PFM,
588 	[REGULATOR_MODE_NORMAL]  = PMIC5_BOB_MODE_AUTO,
589 	[REGULATOR_MODE_FAST]    = PMIC5_BOB_MODE_PWM,
590 };
591 
592 static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
593 {
594 	unsigned int mode;
595 
596 	switch (rpmh_mode) {
597 	case RPMH_REGULATOR_MODE_HPM:
598 		mode = REGULATOR_MODE_FAST;
599 		break;
600 	case RPMH_REGULATOR_MODE_AUTO:
601 		mode = REGULATOR_MODE_NORMAL;
602 		break;
603 	case RPMH_REGULATOR_MODE_LPM:
604 		mode = REGULATOR_MODE_IDLE;
605 		break;
606 	default:
607 		mode = REGULATOR_MODE_INVALID;
608 		break;
609 	}
610 
611 	return mode;
612 }
613 
614 static const struct rpmh_vreg_hw_data pmic4_pldo = {
615 	.regulator_type = VRM,
616 	.ops = &rpmh_regulator_vrm_drms_ops,
617 	.voltage_range = REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
618 	.n_voltages = 256,
619 	.hpm_min_load_uA = 10000,
620 	.pmic_mode_map = pmic_mode_map_pmic4_ldo,
621 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
622 };
623 
624 static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
625 	.regulator_type = VRM,
626 	.ops = &rpmh_regulator_vrm_drms_ops,
627 	.voltage_range = REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
628 	.n_voltages = 128,
629 	.hpm_min_load_uA = 10000,
630 	.pmic_mode_map = pmic_mode_map_pmic4_ldo,
631 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
632 };
633 
634 static const struct rpmh_vreg_hw_data pmic4_nldo = {
635 	.regulator_type = VRM,
636 	.ops = &rpmh_regulator_vrm_drms_ops,
637 	.voltage_range = REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
638 	.n_voltages = 128,
639 	.hpm_min_load_uA = 30000,
640 	.pmic_mode_map = pmic_mode_map_pmic4_ldo,
641 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
642 };
643 
644 static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
645 	.regulator_type = VRM,
646 	.ops = &rpmh_regulator_vrm_ops,
647 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
648 	.n_voltages = 216,
649 	.pmic_mode_map = pmic_mode_map_pmic4_smps,
650 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
651 };
652 
653 static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
654 	.regulator_type = VRM,
655 	.ops = &rpmh_regulator_vrm_ops,
656 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
657 	.n_voltages = 259,
658 	.pmic_mode_map = pmic_mode_map_pmic4_smps,
659 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
660 };
661 
662 static const struct rpmh_vreg_hw_data pmic4_bob = {
663 	.regulator_type = VRM,
664 	.ops = &rpmh_regulator_vrm_bypass_ops,
665 	.voltage_range = REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
666 	.n_voltages = 84,
667 	.pmic_mode_map = pmic_mode_map_pmic4_bob,
668 	.of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
669 };
670 
671 static const struct rpmh_vreg_hw_data pmic4_lvs = {
672 	.regulator_type = XOB,
673 	.ops = &rpmh_regulator_xob_ops,
674 	/* LVS hardware does not support voltage or mode configuration. */
675 };
676 
677 static const struct rpmh_vreg_hw_data pmic5_pldo = {
678 	.regulator_type = VRM,
679 	.ops = &rpmh_regulator_vrm_drms_ops,
680 	.voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
681 	.n_voltages = 256,
682 	.hpm_min_load_uA = 10000,
683 	.pmic_mode_map = pmic_mode_map_pmic5_ldo,
684 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
685 };
686 
687 static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
688 	.regulator_type = VRM,
689 	.ops = &rpmh_regulator_vrm_drms_ops,
690 	.voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
691 	.n_voltages = 63,
692 	.hpm_min_load_uA = 10000,
693 	.pmic_mode_map = pmic_mode_map_pmic5_ldo,
694 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
695 };
696 
697 static const struct rpmh_vreg_hw_data pmic5_nldo = {
698 	.regulator_type = VRM,
699 	.ops = &rpmh_regulator_vrm_drms_ops,
700 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
701 	.n_voltages = 124,
702 	.hpm_min_load_uA = 30000,
703 	.pmic_mode_map = pmic_mode_map_pmic5_ldo,
704 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
705 };
706 
707 static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
708 	.regulator_type = VRM,
709 	.ops = &rpmh_regulator_vrm_ops,
710 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
711 	.n_voltages = 216,
712 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
713 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
714 };
715 
716 static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
717 	.regulator_type = VRM,
718 	.ops = &rpmh_regulator_vrm_ops,
719 	.voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
720 	.n_voltages = 264,
721 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
722 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
723 };
724 
725 static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {
726 	.regulator_type = VRM,
727 	.ops = &rpmh_regulator_vrm_ops,
728 	.voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
729 	.n_voltages = 264,
730 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
731 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
732 };
733 
734 static const struct rpmh_vreg_hw_data pmic5_ftsmps525_lv = {
735 	.regulator_type = VRM,
736 	.ops = &rpmh_regulator_vrm_ops,
737 	.voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 267, 4000),
738 	.n_voltages = 268,
739 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
740 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
741 };
742 
743 static const struct rpmh_vreg_hw_data pmic5_ftsmps525_mv = {
744 	.regulator_type = VRM,
745 	.ops = &rpmh_regulator_vrm_ops,
746 	.voltage_range = REGULATOR_LINEAR_RANGE(600000, 0, 267, 8000),
747 	.n_voltages = 268,
748 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
749 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
750 };
751 
752 static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
753 	.regulator_type = VRM,
754 	.ops = &rpmh_regulator_vrm_ops,
755 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
756 	.n_voltages = 236,
757 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
758 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
759 };
760 
761 static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
762 	.regulator_type = VRM,
763 	.ops = &rpmh_regulator_vrm_ops,
764 	.voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
765 	.n_voltages = 5,
766 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
767 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
768 };
769 
770 static const struct rpmh_vreg_hw_data pmic5_bob = {
771 	.regulator_type = VRM,
772 	.ops = &rpmh_regulator_vrm_bypass_ops,
773 	.voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
774 	.n_voltages = 32,
775 	.pmic_mode_map = pmic_mode_map_pmic5_bob,
776 	.of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
777 };
778 
779 #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
780 { \
781 	.name		= _name, \
782 	.resource_name	= _resource_name, \
783 	.hw_data	= _hw_data, \
784 	.supply_name	= _supply_name, \
785 }
786 
787 static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
788 	RPMH_VREG("smps1",  "smp%s1",  &pmic4_ftsmps426, "vdd-s1"),
789 	RPMH_VREG("smps2",  "smp%s2",  &pmic4_ftsmps426, "vdd-s2"),
790 	RPMH_VREG("smps3",  "smp%s3",  &pmic4_hfsmps3,   "vdd-s3"),
791 	RPMH_VREG("smps4",  "smp%s4",  &pmic4_hfsmps3,   "vdd-s4"),
792 	RPMH_VREG("smps5",  "smp%s5",  &pmic4_hfsmps3,   "vdd-s5"),
793 	RPMH_VREG("smps6",  "smp%s6",  &pmic4_ftsmps426, "vdd-s6"),
794 	RPMH_VREG("smps7",  "smp%s7",  &pmic4_ftsmps426, "vdd-s7"),
795 	RPMH_VREG("smps8",  "smp%s8",  &pmic4_ftsmps426, "vdd-s8"),
796 	RPMH_VREG("smps9",  "smp%s9",  &pmic4_ftsmps426, "vdd-s9"),
797 	RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
798 	RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
799 	RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
800 	RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
801 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic4_nldo,      "vdd-l1-l27"),
802 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic4_nldo,      "vdd-l2-l8-l17"),
803 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic4_nldo,      "vdd-l3-l11"),
804 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic4_nldo,      "vdd-l4-l5"),
805 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic4_nldo,      "vdd-l4-l5"),
806 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic4_pldo,      "vdd-l6"),
807 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic4_pldo_lv,   "vdd-l7-l12-l14-l15"),
808 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic4_nldo,      "vdd-l2-l8-l17"),
809 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic4_pldo,      "vdd-l9"),
810 	RPMH_VREG("ldo10",  "ldo%s10", &pmic4_pldo,      "vdd-l10-l23-l25"),
811 	RPMH_VREG("ldo11",  "ldo%s11", &pmic4_nldo,      "vdd-l3-l11"),
812 	RPMH_VREG("ldo12",  "ldo%s12", &pmic4_pldo_lv,   "vdd-l7-l12-l14-l15"),
813 	RPMH_VREG("ldo13",  "ldo%s13", &pmic4_pldo,      "vdd-l13-l19-l21"),
814 	RPMH_VREG("ldo14",  "ldo%s14", &pmic4_pldo_lv,   "vdd-l7-l12-l14-l15"),
815 	RPMH_VREG("ldo15",  "ldo%s15", &pmic4_pldo_lv,   "vdd-l7-l12-l14-l15"),
816 	RPMH_VREG("ldo16",  "ldo%s16", &pmic4_pldo,      "vdd-l16-l28"),
817 	RPMH_VREG("ldo17",  "ldo%s17", &pmic4_nldo,      "vdd-l2-l8-l17"),
818 	RPMH_VREG("ldo18",  "ldo%s18", &pmic4_pldo,      "vdd-l18-l22"),
819 	RPMH_VREG("ldo19",  "ldo%s19", &pmic4_pldo,      "vdd-l13-l19-l21"),
820 	RPMH_VREG("ldo20",  "ldo%s20", &pmic4_pldo,      "vdd-l20-l24"),
821 	RPMH_VREG("ldo21",  "ldo%s21", &pmic4_pldo,      "vdd-l13-l19-l21"),
822 	RPMH_VREG("ldo22",  "ldo%s22", &pmic4_pldo,      "vdd-l18-l22"),
823 	RPMH_VREG("ldo23",  "ldo%s23", &pmic4_pldo,      "vdd-l10-l23-l25"),
824 	RPMH_VREG("ldo24",  "ldo%s24", &pmic4_pldo,      "vdd-l20-l24"),
825 	RPMH_VREG("ldo25",  "ldo%s25", &pmic4_pldo,      "vdd-l10-l23-l25"),
826 	RPMH_VREG("ldo26",  "ldo%s26", &pmic4_nldo,      "vdd-l26"),
827 	RPMH_VREG("ldo27",  "ldo%s27", &pmic4_nldo,      "vdd-l1-l27"),
828 	RPMH_VREG("ldo28",  "ldo%s28", &pmic4_pldo,      "vdd-l16-l28"),
829 	RPMH_VREG("lvs1",   "vs%s1",   &pmic4_lvs,       "vin-lvs-1-2"),
830 	RPMH_VREG("lvs2",   "vs%s2",   &pmic4_lvs,       "vin-lvs-1-2"),
831 	{}
832 };
833 
834 static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {
835 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510,  "vdd-s1"),
836 	{}
837 };
838 
839 static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
840 	RPMH_VREG("bob",    "bob%s1",  &pmic4_bob,       "vdd-bob"),
841 	{}
842 };
843 
844 static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
845 	RPMH_VREG("smps1",  "smp%s1",  &pmic4_ftsmps426, "vdd-s1"),
846 	RPMH_VREG("smps2",  "smp%s2",  &pmic4_ftsmps426, "vdd-s2"),
847 	RPMH_VREG("smps3",  "smp%s3",  &pmic4_ftsmps426, "vdd-s3"),
848 	RPMH_VREG("smps4",  "smp%s4",  &pmic4_ftsmps426, "vdd-s4"),
849 	{}
850 };
851 
852 static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
853 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
854 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
855 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
856 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_hfsmps510,   "vdd-s4"),
857 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_hfsmps510,   "vdd-s5"),
858 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
859 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
860 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
861 	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
862 	RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
863 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l8-l11"),
864 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l10"),
865 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
866 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
867 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
868 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9"),
869 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l7-l12-l14-l15"),
870 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l1-l8-l11"),
871 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9"),
872 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l2-l10"),
873 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_nldo,      "vdd-l1-l8-l11"),
874 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
875 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,      "vdd-l13-l16-l17"),
876 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
877 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
878 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,      "vdd-l13-l16-l17"),
879 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,      "vdd-l13-l16-l17"),
880 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
881 	{}
882 };
883 
884 static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
885 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
886 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
887 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
888 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps510, "vdd-s4"),
889 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps510, "vdd-s5"),
890 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
891 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
892 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_hfsmps510, "vdd-s8"),
893 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_pldo_lv,   "vdd-l1-l8"),
894 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2-l3"),
895 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l2-l3"),
896 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo,      "vdd-l4-l5-l6"),
897 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l4-l5-l6"),
898 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l4-l5-l6"),
899 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l7-l11"),
900 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo_lv,   "vdd-l1-l8"),
901 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,      "vdd-l9-l10"),
902 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l9-l10"),
903 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,      "vdd-l7-l11"),
904 	RPMH_VREG("bob",    "bob%s1",  &pmic5_bob,       "vdd-bob"),
905 	{}
906 };
907 
908 static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {
909 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
910 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
911 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
912 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_hfsmps510, "vdd-s4"),
913 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_hfsmps510, "vdd-s5"),
914 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
915 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
916 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
917 	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
918 	RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
919 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l8-l11"),
920 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l10"),
921 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
922 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
923 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
924 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9"),
925 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
926 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l1-l8-l11"),
927 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9"),
928 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l2-l10"),
929 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_nldo,      "vdd-l1-l8-l11"),
930 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
931 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,      "vdd-l13-l16-l17"),
932 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
933 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
934 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,      "vdd-l13-l16-l17"),
935 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,      "vdd-l13-l16-l17"),
936 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
937 	{}
938 };
939 
940 static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
941 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
942 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
943 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
944 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps510, "vdd-s4"),
945 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps510, "vdd-s5"),
946 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
947 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
948 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
949 	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
950 	RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
951 	RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
952 	RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
953 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l4"),
954 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l7"),
955 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3-l5"),
956 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l1-l4"),
957 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l3-l5"),
958 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9-l10"),
959 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l2-l7"),
960 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l8"),
961 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9-l10"),
962 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_nldo,      "vdd-l6-l9-l10"),
963 	{}
964 };
965 
966 static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
967 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps515, "vdd-s1"),
968 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
969 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
970 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps510, "vdd-s4"),
971 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps510, "vdd-s5"),
972 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
973 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
974 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
975 	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
976 	RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
977 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_pldo_lv,   "vdd-l1-l12"),
978 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo_lv,   "vdd-l2-l8"),
979 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
980 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
981 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
982 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l6-l9-l11"),
983 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
984 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo_lv,   "vdd-l2-l8"),
985 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,      "vdd-l6-l9-l11"),
986 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_nldo,      "vdd-l10"),
987 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,      "vdd-l6-l9-l11"),
988 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l1-l12"),
989 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
990 	RPMH_VREG("bob",    "bob%s1",  &pmic5_bob,       "vdd-bob"),
991 	{}
992 };
993 
994 static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {
995 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps520, "vdd-s1"),
996 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps520, "vdd-s2"),
997 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps520, "vdd-s3"),
998 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps520, "vdd-s4"),
999 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps520, "vdd-s5"),
1000 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps520, "vdd-s6"),
1001 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1"),
1002 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2"),
1003 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
1004 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo_lv,   "vdd-l4"),
1005 	{}
1006 };
1007 
1008 static const struct rpmh_vreg_init_data pm8550_vreg_data[] = {
1009 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_pldo,    "vdd-l1-l4-l10"),
1010 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,    "vdd-l2-l13-l14"),
1011 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,    "vdd-l3"),
1012 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,    "vdd-l1-l4-l10"),
1013 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,    "vdd-l5-l16"),
1014 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo_lv, "vdd-l6-l7"),
1015 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv, "vdd-l6-l7"),
1016 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo_lv, "vdd-l8-l9"),
1017 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,    "vdd-l8-l9"),
1018 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_nldo,    "vdd-l1-l4-l10"),
1019 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,    "vdd-l11"),
1020 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo,    "vdd-l12"),
1021 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,    "vdd-l2-l13-l14"),
1022 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo,    "vdd-l2-l13-l14"),
1023 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo,    "vdd-l15"),
1024 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,    "vdd-l5-l16"),
1025 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,    "vdd-l17"),
1026 	RPMH_VREG("bob1",   "bob%s1",  &pmic5_bob,     "vdd-bob1"),
1027 	RPMH_VREG("bob2",   "bob%s2",  &pmic5_bob,     "vdd-bob2"),
1028 	{}
1029 };
1030 
1031 static const struct rpmh_vreg_init_data pm8550vs_vreg_data[] = {
1032 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps525_lv, "vdd-s1"),
1033 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps525_lv, "vdd-s2"),
1034 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps525_lv, "vdd-s3"),
1035 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps525_lv, "vdd-s4"),
1036 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps525_lv, "vdd-s5"),
1037 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps525_mv, "vdd-s6"),
1038 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,   "vdd-l1"),
1039 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,   "vdd-l2"),
1040 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,   "vdd-l3"),
1041 	{}
1042 };
1043 
1044 static const struct rpmh_vreg_init_data pm8550ve_vreg_data[] = {
1045 	RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps525_lv, "vdd-s1"),
1046 	RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps525_lv, "vdd-s2"),
1047 	RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps525_lv, "vdd-s3"),
1048 	RPMH_VREG("smps4", "smp%s4", &pmic5_ftsmps525_lv, "vdd-s4"),
1049 	RPMH_VREG("smps5", "smp%s5", &pmic5_ftsmps525_lv, "vdd-s5"),
1050 	RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps525_lv, "vdd-s6"),
1051 	RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps525_lv, "vdd-s7"),
1052 	RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps525_lv, "vdd-s8"),
1053 	RPMH_VREG("ldo1",  "ldo%s1", &pmic5_nldo,   "vdd-l1"),
1054 	RPMH_VREG("ldo2",  "ldo%s2", &pmic5_nldo,   "vdd-l2"),
1055 	RPMH_VREG("ldo3",  "ldo%s3", &pmic5_nldo,   "vdd-l3"),
1056 	{}
1057 };
1058 
1059 static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
1060 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps510, "vdd-s1"),
1061 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_hfsmps515, "vdd-s2"),
1062 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1"),
1063 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2"),
1064 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
1065 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l4"),
1066 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l5-l6"),
1067 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l5-l6"),
1068 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv,   "vdd-l7"),
1069 	{}
1070 };
1071 
1072 static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
1073 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps510, "vdd-s1"),
1074 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_hfsmps515_1, "vdd-s2"),
1075 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1"),
1076 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2"),
1077 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
1078 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l4"),
1079 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l5-l6"),
1080 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l5-l6"),
1081 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv,   "vdd-l7"),
1082 	{}
1083 };
1084 
1085 static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
1086 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
1087 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
1088 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
1089 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_hfsmps510, "vdd-s4"),
1090 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_hfsmps510, "vdd-s5"),
1091 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1"),
1092 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2-l3"),
1093 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l2-l3"),
1094 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l4-l7-l8"),
1095 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1096 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6"),
1097 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_nldo,      "vdd-l4-l7-l8"),
1098 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l4-l7-l8"),
1099 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l9"),
1100 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo_lv,   "vdd-l10-l14-l15"),
1101 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo_lv,   "vdd-l11-l12-l13"),
1102 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l11-l12-l13"),
1103 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo_lv,   "vdd-l11-l12-l13"),
1104 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo_lv,   "vdd-l10-l14-l15"),
1105 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo_lv,   "vdd-l10-l14-l15"),
1106 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1107 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1108 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1109 	RPMH_VREG("ldo19",  "ldo%s19", &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1110 	{}
1111 };
1112 
1113 static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
1114 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
1115 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
1116 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
1117 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps510, "vdd-s4"),
1118 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps510, "vdd-s5"),
1119 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
1120 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
1121 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_hfsmps510, "vdd-s8"),
1122 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_pldo_lv,   "vdd-l1-l8"),
1123 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2-l3"),
1124 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l2-l3"),
1125 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo,      "vdd-l4-l5-l6"),
1126 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l4-l5-l6"),
1127 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l4-l5-l6"),
1128 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l7-l11"),
1129 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo,      "vdd-l1-l8"),
1130 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,      "vdd-l9-l10"),
1131 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l9-l10"),
1132 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,      "vdd-l7-l11"),
1133 	RPMH_VREG("bob",    "bob%s1",  &pmic5_bob,       "vdd-bob"),
1134 	{}
1135 };
1136 
1137 static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {
1138 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, NULL),
1139 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_hfsmps510, NULL),
1140 	/* smps3 - smps5 not configured */
1141 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      NULL),
1142 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      NULL),
1143 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_pldo,      NULL),
1144 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      NULL),
1145 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      NULL),
1146 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      NULL),
1147 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      NULL),
1148 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo,      NULL),
1149 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,      NULL),
1150 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      NULL),
1151 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,      NULL),
1152 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo,      NULL),
1153 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_nldo,      NULL),
1154 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo,      NULL),
1155 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_nldo,      NULL),
1156 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_nldo,      NULL),
1157 	/* ldo17 not configured */
1158 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_nldo,      NULL),
1159 	RPMH_VREG("ldo19",  "ldo%s19", &pmic5_nldo,      NULL),
1160 	RPMH_VREG("ldo20",  "ldo%s20", &pmic5_nldo,      NULL),
1161 	RPMH_VREG("ldo21",  "ldo%s21", &pmic5_nldo,      NULL),
1162 	RPMH_VREG("ldo22",  "ldo%s22", &pmic5_nldo,      NULL),
1163 };
1164 
1165 static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
1166 	RPMH_VREG("smps1",   "smp%s1",    &pmic5_ftsmps510, "vdd-s1"),
1167 	RPMH_VREG("smps2",   "smp%s2",    &pmic5_hfsmps510, "vdd-s2"),
1168 	RPMH_VREG("smps3",   "smp%s3",    &pmic5_hfsmps510, "vdd-s3"),
1169 	RPMH_VREG("smps4",   "smp%s4",    &pmic5_hfsmps510, "vdd-s4"),
1170 	RPMH_VREG("smps5",   "smp%s5",    &pmic5_hfsmps510, "vdd-s5"),
1171 	RPMH_VREG("smps6",   "smp%s6",    &pmic5_ftsmps510, "vdd-s6"),
1172 	RPMH_VREG("smps7",   "smp%s7",    &pmic5_hfsmps510, "vdd-s7"),
1173 	RPMH_VREG("ldo1",    "ldo%s1",    &pmic5_nldo,      "vdd-l1-l2"),
1174 	RPMH_VREG("ldo2",    "ldo%s2",    &pmic5_nldo,      "vdd-l1-l2"),
1175 	RPMH_VREG("ldo3",    "ldo%s3",    &pmic5_nldo,      "vdd-l3-l9"),
1176 	RPMH_VREG("ldo4",    "ldo%s4",    &pmic5_nldo,      "vdd-l4-l12"),
1177 	RPMH_VREG("ldo5",    "ldo%s5",    &pmic5_pldo,      "vdd-l5-l6"),
1178 	RPMH_VREG("ldo6",    "ldo%s6",    &pmic5_pldo,      "vdd-l5-l6"),
1179 	RPMH_VREG("ldo7",    "ldo%s7",    &pmic5_nldo,      "vdd-l7-l8"),
1180 	RPMH_VREG("ldo8",    "ldo%s8",    &pmic5_nldo,      "vdd-l7-l8"),
1181 	RPMH_VREG("ldo9",    "ldo%s9",    &pmic5_nldo,      "vdd-l3-l9"),
1182 	RPMH_VREG("ldo10",   "ldo%s10",   &pmic5_pldo,      "vdd-l10-l11-l13"),
1183 	RPMH_VREG("ldo11",   "ldo%s11",   &pmic5_pldo,      "vdd-l10-l11-l13"),
1184 	RPMH_VREG("ldo12",   "ldo%s12",   &pmic5_nldo,      "vdd-l4-l12"),
1185 	RPMH_VREG("ldo13",   "ldo%s13",   &pmic5_pldo,      "vdd-l10-l11-l13"),
1186 	RPMH_VREG("ldo14",   "ldo%s14",   &pmic5_nldo,      "vdd-l14"),
1187 	RPMH_VREG("ldo15",   "ldo%s15",   &pmic5_nldo,      "vdd-l15"),
1188 	RPMH_VREG("ldo16",   "ldo%s16",   &pmic5_pldo,      "vdd-l16"),
1189 	{}
1190 };
1191 
1192 static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {
1193 	RPMH_VREG("smps1",   "smp%s1",    &pmic5_ftsmps510, "vdd-s1"),
1194 	RPMH_VREG("smps2",   "smp%s2",    &pmic5_hfsmps510, "vdd-s2"),
1195 	RPMH_VREG("smps3",   "smp%s3",    &pmic5_hfsmps510, "vdd-s3"),
1196 	RPMH_VREG("smps4",   "smp%s4",    &pmic5_hfsmps510, "vdd-s4"),
1197 	RPMH_VREG("smps5",   "smp%s5",    &pmic5_hfsmps510, "vdd-s5"),
1198 	RPMH_VREG("smps6",   "smp%s6",    &pmic5_ftsmps510, "vdd-s6"),
1199 	RPMH_VREG("smps7",   "smp%s7",    &pmic5_hfsmps510, "vdd-s7"),
1200 	RPMH_VREG("smps8",   "smp%s8",    &pmic5_hfsmps510, "vdd-s8"),
1201 	RPMH_VREG("ldo1",    "ldo%s1",    &pmic5_nldo,      "vdd-l1"),
1202 	RPMH_VREG("ldo2",    "ldo%s2",    &pmic5_nldo,      "vdd-l2-l18"),
1203 	RPMH_VREG("ldo3",    "ldo%s3",    &pmic5_nldo,      "vdd-l3"),
1204 	RPMH_VREG("ldo4",    "ldo%s4",    &pmic5_nldo,      "vdd-l4"),
1205 	RPMH_VREG("ldo5",    "ldo%s5",    &pmic5_pldo,      "vdd-l5-l6-l16"),
1206 	RPMH_VREG("ldo6",    "ldo%s6",    &pmic5_pldo,      "vdd-l5-l6-l16"),
1207 	RPMH_VREG("ldo7",    "ldo%s7",    &pmic5_nldo,      "vdd-l7"),
1208 	RPMH_VREG("ldo8",    "ldo%s8",    &pmic5_nldo,      "vdd-l8-l9"),
1209 	RPMH_VREG("ldo9",    "ldo%s9",    &pmic5_nldo,      "vdd-l8-l9"),
1210 	RPMH_VREG("ldo10",   "ldo%s10",   &pmic5_pldo,      "vdd-l10"),
1211 	RPMH_VREG("ldo11",   "ldo%s11",   &pmic5_pldo,      "vdd-l11-l13"),
1212 	RPMH_VREG("ldo12",   "ldo%s12",   &pmic5_nldo,      "vdd-l12"),
1213 	RPMH_VREG("ldo13",   "ldo%s13",   &pmic5_pldo,      "vdd-l11-l13"),
1214 	RPMH_VREG("ldo14",   "ldo%s14",   &pmic5_nldo,      "vdd-l14"),
1215 	RPMH_VREG("ldo15",   "ldo%s15",   &pmic5_nldo,      "vdd-l15"),
1216 	RPMH_VREG("ldo16",   "ldo%s16",   &pmic5_pldo,      "vdd-l5-l6-l16"),
1217 	RPMH_VREG("ldo17",   "ldo%s17",   &pmic5_nldo,      "vdd-l17"),
1218 	/* ldo18 not configured */
1219 	RPMH_VREG("ldo19",   "ldo%s19",   &pmic5_nldo,      "vdd-l19"),
1220 	RPMH_VREG("ldo20",   "ldo%s20",   &pmic5_nldo,      "vdd-l20"),
1221 	RPMH_VREG("ldo21",   "ldo%s21",   &pmic5_nldo,      "vdd-l21"),
1222 	{}
1223 };
1224 
1225 static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
1226 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps510, "vdd-s1"),
1227 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps520, "vdd-s2"),
1228 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps520, "vdd-s3"),
1229 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps520, "vdd-s4"),
1230 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps520, "vdd-s5"),
1231 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps520, "vdd-s6"),
1232 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps520, "vdd-s7"),
1233 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_hfsmps510, "vdd-s8"),
1234 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l4-l12-l15"),
1235 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l7"),
1236 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
1237 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l1-l4-l12-l15"),
1238 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l5"),
1239 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9-l10"),
1240 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l2-l7"),
1241 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l8"),
1242 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9-l10"),
1243 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_nldo,      "vdd-l6-l9-l10"),
1244 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo_lv,   "vdd-l11-l17-l18-l19"),
1245 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_nldo,      "vdd-l1-l4-l12-l15"),
1246 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_nldo,      "vdd-l13"),
1247 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_nldo,      "vdd-l14-l16"),
1248 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_nldo,      "vdd-l1-l4-l12-l15"),
1249 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_nldo,      "vdd-l14-l16"),
1250 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo_lv,   "vdd-l11-l17-l18-l19"),
1251 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_pldo_lv,   "vdd-l11-l17-l18-l19"),
1252 	RPMH_VREG("ldo19",  "ldo%s19", &pmic5_pldo_lv,   "vdd-l11-l17-l18-l19"),
1253 	{}
1254 };
1255 
1256 static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {
1257 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps520, "vdd-s1"),
1258 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps520, "vdd-s2"),
1259 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_hfsmps515, "vdd-s3"),
1260 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l2"),
1261 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l1-l2"),
1262 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
1263 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo_lv,   "vdd-l4"),
1264 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l5-l6"),
1265 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l5-l6"),
1266 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l7-bob"),
1267 	{}
1268 };
1269 
1270 static const struct rpmh_vreg_init_data pm660_vreg_data[] = {
1271 	RPMH_VREG("smps1",  "smp%s1",  &pmic4_ftsmps426, "vdd-s1"),
1272 	RPMH_VREG("smps2",  "smp%s2",  &pmic4_ftsmps426, "vdd-s2"),
1273 	RPMH_VREG("smps3",  "smp%s3",  &pmic4_ftsmps426, "vdd-s3"),
1274 	RPMH_VREG("smps4",  "smp%s4",  &pmic4_hfsmps3,   "vdd-s4"),
1275 	RPMH_VREG("smps5",  "smp%s5",  &pmic4_hfsmps3,   "vdd-s5"),
1276 	RPMH_VREG("smps6",  "smp%s6",  &pmic4_hfsmps3,   "vdd-s6"),
1277 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic4_nldo,      "vdd-l1-l6-l7"),
1278 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic4_nldo,      "vdd-l2-l3"),
1279 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic4_nldo,      "vdd-l2-l3"),
1280 	/* ldo4 is inaccessible on PM660 */
1281 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic4_nldo,      "vdd-l5"),
1282 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic4_nldo,      "vdd-l1-l6-l7"),
1283 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic4_nldo,      "vdd-l1-l6-l7"),
1284 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic4_pldo_lv,   "vdd-l8-l9-l10-l11-l12-l13-l14"),
1285 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic4_pldo_lv,   "vdd-l8-l9-l10-l11-l12-l13-l14"),
1286 	RPMH_VREG("ldo10",  "ldo%s10", &pmic4_pldo_lv,   "vdd-l8-l9-l10-l11-l12-l13-l14"),
1287 	RPMH_VREG("ldo11",  "ldo%s11", &pmic4_pldo_lv,   "vdd-l8-l9-l10-l11-l12-l13-l14"),
1288 	RPMH_VREG("ldo12",  "ldo%s12", &pmic4_pldo_lv,   "vdd-l8-l9-l10-l11-l12-l13-l14"),
1289 	RPMH_VREG("ldo13",  "ldo%s13", &pmic4_pldo_lv,   "vdd-l8-l9-l10-l11-l12-l13-l14"),
1290 	RPMH_VREG("ldo14",  "ldo%s14", &pmic4_pldo_lv,   "vdd-l8-l9-l10-l11-l12-l13-l14"),
1291 	RPMH_VREG("ldo15",  "ldo%s15", &pmic4_pldo,      "vdd-l15-l16-l17-l18-l19"),
1292 	RPMH_VREG("ldo16",  "ldo%s16", &pmic4_pldo,      "vdd-l15-l16-l17-l18-l19"),
1293 	RPMH_VREG("ldo17",  "ldo%s17", &pmic4_pldo,      "vdd-l15-l16-l17-l18-l19"),
1294 	RPMH_VREG("ldo18",  "ldo%s18", &pmic4_pldo,      "vdd-l15-l16-l17-l18-l19"),
1295 	RPMH_VREG("ldo19",  "ldo%s19", &pmic4_pldo,      "vdd-l15-l16-l17-l18-l19"),
1296 	{}
1297 };
1298 
1299 static const struct rpmh_vreg_init_data pm660l_vreg_data[] = {
1300 	RPMH_VREG("smps1",  "smp%s1",  &pmic4_ftsmps426, "vdd-s1"),
1301 	RPMH_VREG("smps2",  "smp%s2",  &pmic4_ftsmps426, "vdd-s2"),
1302 	RPMH_VREG("smps3",  "smp%s3",  &pmic4_ftsmps426, "vdd-s3-s4"),
1303 	RPMH_VREG("smps5",  "smp%s5",  &pmic4_ftsmps426, "vdd-s5"),
1304 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic4_nldo,      "vdd-l1-l9-l10"),
1305 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic4_pldo,      "vdd-l2"),
1306 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic4_pldo,      "vdd-l3-l5-l7-l8"),
1307 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic4_pldo,      "vdd-l4-l6"),
1308 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic4_pldo,      "vdd-l3-l5-l7-l8"),
1309 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic4_pldo,      "vdd-l4-l6"),
1310 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic4_pldo,      "vdd-l3-l5-l7-l8"),
1311 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic4_pldo,      "vdd-l3-l5-l7-l8"),
1312 	RPMH_VREG("bob",    "bob%s1",  &pmic4_bob,       "vdd-bob"),
1313 	{}
1314 };
1315 
1316 static int rpmh_regulator_probe(struct platform_device *pdev)
1317 {
1318 	struct device *dev = &pdev->dev;
1319 	const struct rpmh_vreg_init_data *vreg_data;
1320 	struct device_node *node;
1321 	struct rpmh_vreg *vreg;
1322 	const char *pmic_id;
1323 	int ret;
1324 
1325 	vreg_data = of_device_get_match_data(dev);
1326 	if (!vreg_data)
1327 		return -ENODEV;
1328 
1329 	ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id);
1330 	if (ret < 0) {
1331 		dev_err(dev, "qcom,pmic-id missing in DT node\n");
1332 		return ret;
1333 	}
1334 
1335 	for_each_available_child_of_node(dev->of_node, node) {
1336 		vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1337 		if (!vreg) {
1338 			of_node_put(node);
1339 			return -ENOMEM;
1340 		}
1341 
1342 		ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
1343 						vreg_data);
1344 		if (ret < 0) {
1345 			of_node_put(node);
1346 			return ret;
1347 		}
1348 	}
1349 
1350 	return 0;
1351 }
1352 
1353 static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
1354 	{
1355 		.compatible = "qcom,pm8005-rpmh-regulators",
1356 		.data = pm8005_vreg_data,
1357 	},
1358 	{
1359 		.compatible = "qcom,pm8009-rpmh-regulators",
1360 		.data = pm8009_vreg_data,
1361 	},
1362 	{
1363 		.compatible = "qcom,pm8009-1-rpmh-regulators",
1364 		.data = pm8009_1_vreg_data,
1365 	},
1366 	{
1367 		.compatible = "qcom,pm8150-rpmh-regulators",
1368 		.data = pm8150_vreg_data,
1369 	},
1370 	{
1371 		.compatible = "qcom,pm8150l-rpmh-regulators",
1372 		.data = pm8150l_vreg_data,
1373 	},
1374 	{
1375 		.compatible = "qcom,pm8350-rpmh-regulators",
1376 		.data = pm8350_vreg_data,
1377 	},
1378 	{
1379 		.compatible = "qcom,pm8350c-rpmh-regulators",
1380 		.data = pm8350c_vreg_data,
1381 	},
1382 	{
1383 		.compatible = "qcom,pm8450-rpmh-regulators",
1384 		.data = pm8450_vreg_data,
1385 	},
1386 	{
1387 		.compatible = "qcom,pm8550-rpmh-regulators",
1388 		.data = pm8550_vreg_data,
1389 	},
1390 	{
1391 		.compatible = "qcom,pm8550ve-rpmh-regulators",
1392 		.data = pm8550ve_vreg_data,
1393 	},
1394 	{
1395 		.compatible = "qcom,pm8550vs-rpmh-regulators",
1396 		.data = pm8550vs_vreg_data,
1397 	},
1398 	{
1399 		.compatible = "qcom,pm8998-rpmh-regulators",
1400 		.data = pm8998_vreg_data,
1401 	},
1402 	{
1403 		.compatible = "qcom,pmg1110-rpmh-regulators",
1404 		.data = pmg1110_vreg_data,
1405 	},
1406 	{
1407 		.compatible = "qcom,pmi8998-rpmh-regulators",
1408 		.data = pmi8998_vreg_data,
1409 	},
1410 	{
1411 		.compatible = "qcom,pm6150-rpmh-regulators",
1412 		.data = pm6150_vreg_data,
1413 	},
1414 	{
1415 		.compatible = "qcom,pm6150l-rpmh-regulators",
1416 		.data = pm6150l_vreg_data,
1417 	},
1418 	{
1419 		.compatible = "qcom,pm6350-rpmh-regulators",
1420 		.data = pm6350_vreg_data,
1421 	},
1422 	{
1423 		.compatible = "qcom,pmc8180-rpmh-regulators",
1424 		.data = pm8150_vreg_data,
1425 	},
1426 	{
1427 		.compatible = "qcom,pmc8180c-rpmh-regulators",
1428 		.data = pm8150l_vreg_data,
1429 	},
1430 	{
1431 		.compatible = "qcom,pmm8155au-rpmh-regulators",
1432 		.data = pmm8155au_vreg_data,
1433 	},
1434 	{
1435 		.compatible = "qcom,pmx55-rpmh-regulators",
1436 		.data = pmx55_vreg_data,
1437 	},
1438 	{
1439 		.compatible = "qcom,pmx65-rpmh-regulators",
1440 		.data = pmx65_vreg_data,
1441 	},
1442 	{
1443 		.compatible = "qcom,pm7325-rpmh-regulators",
1444 		.data = pm7325_vreg_data,
1445 	},
1446 	{
1447 		.compatible = "qcom,pmr735a-rpmh-regulators",
1448 		.data = pmr735a_vreg_data,
1449 	},
1450 	{
1451 		.compatible = "qcom,pm660-rpmh-regulators",
1452 		.data = pm660_vreg_data,
1453 	},
1454 	{
1455 		.compatible = "qcom,pm660l-rpmh-regulators",
1456 		.data = pm660l_vreg_data,
1457 	},
1458 	{}
1459 };
1460 MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
1461 
1462 static struct platform_driver rpmh_regulator_driver = {
1463 	.driver = {
1464 		.name = "qcom-rpmh-regulator",
1465 		.of_match_table	= of_match_ptr(rpmh_regulator_match_table),
1466 	},
1467 	.probe = rpmh_regulator_probe,
1468 };
1469 module_platform_driver(rpmh_regulator_driver);
1470 
1471 MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
1472 MODULE_LICENSE("GPL v2");
1473