1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
3 
4 #define pr_fmt(fmt) "%s: " fmt, __func__
5 
6 #include <linux/err.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/of.h>
10 #include <linux/of_device.h>
11 #include <linux/platform_device.h>
12 #include <linux/slab.h>
13 #include <linux/string.h>
14 #include <linux/regulator/driver.h>
15 #include <linux/regulator/machine.h>
16 #include <linux/regulator/of_regulator.h>
17 
18 #include <soc/qcom/cmd-db.h>
19 #include <soc/qcom/rpmh.h>
20 
21 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
22 
23 /**
24  * enum rpmh_regulator_type - supported RPMh accelerator types
25  * @VRM:	RPMh VRM accelerator which supports voting on enable, voltage,
26  *		and mode of LDO, SMPS, and BOB type PMIC regulators.
27  * @XOB:	RPMh XOB accelerator which supports voting on the enable state
28  *		of PMIC regulators.
29  */
30 enum rpmh_regulator_type {
31 	VRM,
32 	XOB,
33 };
34 
35 #define RPMH_REGULATOR_REG_VRM_VOLTAGE		0x0
36 #define RPMH_REGULATOR_REG_ENABLE		0x4
37 #define RPMH_REGULATOR_REG_VRM_MODE		0x8
38 
39 #define PMIC4_LDO_MODE_RETENTION		4
40 #define PMIC4_LDO_MODE_LPM			5
41 #define PMIC4_LDO_MODE_HPM			7
42 
43 #define PMIC4_SMPS_MODE_RETENTION		4
44 #define PMIC4_SMPS_MODE_PFM			5
45 #define PMIC4_SMPS_MODE_AUTO			6
46 #define PMIC4_SMPS_MODE_PWM			7
47 
48 #define PMIC4_BOB_MODE_PASS			0
49 #define PMIC4_BOB_MODE_PFM			1
50 #define PMIC4_BOB_MODE_AUTO			2
51 #define PMIC4_BOB_MODE_PWM			3
52 
53 #define PMIC5_LDO_MODE_RETENTION		3
54 #define PMIC5_LDO_MODE_LPM			4
55 #define PMIC5_LDO_MODE_HPM			7
56 
57 #define PMIC5_SMPS_MODE_RETENTION		3
58 #define PMIC5_SMPS_MODE_PFM			4
59 #define PMIC5_SMPS_MODE_AUTO			6
60 #define PMIC5_SMPS_MODE_PWM			7
61 
62 #define PMIC5_BOB_MODE_PASS			2
63 #define PMIC5_BOB_MODE_PFM			4
64 #define PMIC5_BOB_MODE_AUTO			6
65 #define PMIC5_BOB_MODE_PWM			7
66 
67 /**
68  * struct rpmh_vreg_hw_data - RPMh regulator hardware configurations
69  * @regulator_type:		RPMh accelerator type used to manage this
70  *				regulator
71  * @ops:			Pointer to regulator ops callback structure
72  * @voltage_range:		The single range of voltages supported by this
73  *				PMIC regulator type
74  * @n_voltages:			The number of unique voltage set points defined
75  *				by voltage_range
76  * @hpm_min_load_uA:		Minimum load current in microamps that requires
77  *				high power mode (HPM) operation.  This is used
78  *				for LDO hardware type regulators only.
79  * @pmic_mode_map:		Array indexed by regulator framework mode
80  *				containing PMIC hardware modes.  Must be large
81  *				enough to index all framework modes supported
82  *				by this regulator hardware type.
83  * @of_map_mode:		Maps an RPMH_REGULATOR_MODE_* mode value defined
84  *				in device tree to a regulator framework mode
85  */
86 struct rpmh_vreg_hw_data {
87 	enum rpmh_regulator_type		regulator_type;
88 	const struct regulator_ops		*ops;
89 	const struct linear_range	voltage_range;
90 	int					n_voltages;
91 	int					hpm_min_load_uA;
92 	const int				*pmic_mode_map;
93 	unsigned int			      (*of_map_mode)(unsigned int mode);
94 };
95 
96 /**
97  * struct rpmh_vreg - individual RPMh regulator data structure encapsulating a
98  *		single regulator device
99  * @dev:			Device pointer for the top-level PMIC RPMh
100  *				regulator parent device.  This is used as a
101  *				handle in RPMh write requests.
102  * @addr:			Base address of the regulator resource within
103  *				an RPMh accelerator
104  * @rdesc:			Regulator descriptor
105  * @hw_data:			PMIC regulator configuration data for this RPMh
106  *				regulator
107  * @always_wait_for_ack:	Boolean flag indicating if a request must always
108  *				wait for an ACK from RPMh before continuing even
109  *				if it corresponds to a strictly lower power
110  *				state (e.g. enabled --> disabled).
111  * @enabled:			Flag indicating if the regulator is enabled or
112  *				not
113  * @bypassed:			Boolean indicating if the regulator is in
114  *				bypass (pass-through) mode or not.  This is
115  *				only used by BOB rpmh-regulator resources.
116  * @voltage_selector:		Selector used for get_voltage_sel() and
117  *				set_voltage_sel() callbacks
118  * @mode:			RPMh VRM regulator current framework mode
119  */
120 struct rpmh_vreg {
121 	struct device			*dev;
122 	u32				addr;
123 	struct regulator_desc		rdesc;
124 	const struct rpmh_vreg_hw_data	*hw_data;
125 	bool				always_wait_for_ack;
126 
127 	int				enabled;
128 	bool				bypassed;
129 	int				voltage_selector;
130 	unsigned int			mode;
131 };
132 
133 /**
134  * struct rpmh_vreg_init_data - initialization data for an RPMh regulator
135  * @name:			Name for the regulator which also corresponds
136  *				to the device tree subnode name of the regulator
137  * @resource_name:		RPMh regulator resource name format string.
138  *				This must include exactly one field: '%s' which
139  *				is filled at run-time with the PMIC ID provided
140  *				by device tree property qcom,pmic-id.  Example:
141  *				"ldo%s1" for RPMh resource "ldoa1".
142  * @supply_name:		Parent supply regulator name
143  * @hw_data:			Configuration data for this PMIC regulator type
144  */
145 struct rpmh_vreg_init_data {
146 	const char			*name;
147 	const char			*resource_name;
148 	const char			*supply_name;
149 	const struct rpmh_vreg_hw_data	*hw_data;
150 };
151 
152 /**
153  * rpmh_regulator_send_request() - send the request to RPMh
154  * @vreg:		Pointer to the RPMh regulator
155  * @cmd:		Pointer to the RPMh command to send
156  * @wait_for_ack:	Boolean indicating if execution must wait until the
157  *			request has been acknowledged as complete
158  *
159  * Return: 0 on success, errno on failure
160  */
161 static int rpmh_regulator_send_request(struct rpmh_vreg *vreg,
162 			struct tcs_cmd *cmd, bool wait_for_ack)
163 {
164 	int ret;
165 
166 	if (wait_for_ack || vreg->always_wait_for_ack)
167 		ret = rpmh_write(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd, 1);
168 	else
169 		ret = rpmh_write_async(vreg->dev, RPMH_ACTIVE_ONLY_STATE, cmd,
170 					1);
171 
172 	return ret;
173 }
174 
175 static int _rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
176 				unsigned int selector, bool wait_for_ack)
177 {
178 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
179 	struct tcs_cmd cmd = {
180 		.addr = vreg->addr + RPMH_REGULATOR_REG_VRM_VOLTAGE,
181 	};
182 	int ret;
183 
184 	/* VRM voltage control register is set with voltage in millivolts. */
185 	cmd.data = DIV_ROUND_UP(regulator_list_voltage_linear_range(rdev,
186 							selector), 1000);
187 
188 	ret = rpmh_regulator_send_request(vreg, &cmd, wait_for_ack);
189 	if (!ret)
190 		vreg->voltage_selector = selector;
191 
192 	return ret;
193 }
194 
195 static int rpmh_regulator_vrm_set_voltage_sel(struct regulator_dev *rdev,
196 					unsigned int selector)
197 {
198 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
199 
200 	if (vreg->enabled == -EINVAL) {
201 		/*
202 		 * Cache the voltage and send it later when the regulator is
203 		 * enabled or disabled.
204 		 */
205 		vreg->voltage_selector = selector;
206 		return 0;
207 	}
208 
209 	return _rpmh_regulator_vrm_set_voltage_sel(rdev, selector,
210 					selector > vreg->voltage_selector);
211 }
212 
213 static int rpmh_regulator_vrm_get_voltage_sel(struct regulator_dev *rdev)
214 {
215 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
216 
217 	return vreg->voltage_selector;
218 }
219 
220 static int rpmh_regulator_is_enabled(struct regulator_dev *rdev)
221 {
222 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
223 
224 	return vreg->enabled;
225 }
226 
227 static int rpmh_regulator_set_enable_state(struct regulator_dev *rdev,
228 					bool enable)
229 {
230 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
231 	struct tcs_cmd cmd = {
232 		.addr = vreg->addr + RPMH_REGULATOR_REG_ENABLE,
233 		.data = enable,
234 	};
235 	int ret;
236 
237 	if (vreg->enabled == -EINVAL &&
238 	    vreg->voltage_selector != -ENOTRECOVERABLE) {
239 		ret = _rpmh_regulator_vrm_set_voltage_sel(rdev,
240 						vreg->voltage_selector, true);
241 		if (ret < 0)
242 			return ret;
243 	}
244 
245 	ret = rpmh_regulator_send_request(vreg, &cmd, enable);
246 	if (!ret)
247 		vreg->enabled = enable;
248 
249 	return ret;
250 }
251 
252 static int rpmh_regulator_enable(struct regulator_dev *rdev)
253 {
254 	return rpmh_regulator_set_enable_state(rdev, true);
255 }
256 
257 static int rpmh_regulator_disable(struct regulator_dev *rdev)
258 {
259 	return rpmh_regulator_set_enable_state(rdev, false);
260 }
261 
262 static int rpmh_regulator_vrm_set_mode_bypass(struct rpmh_vreg *vreg,
263 					unsigned int mode, bool bypassed)
264 {
265 	struct tcs_cmd cmd = {
266 		.addr = vreg->addr + RPMH_REGULATOR_REG_VRM_MODE,
267 	};
268 	int pmic_mode;
269 
270 	if (mode > REGULATOR_MODE_STANDBY)
271 		return -EINVAL;
272 
273 	pmic_mode = vreg->hw_data->pmic_mode_map[mode];
274 	if (pmic_mode < 0)
275 		return pmic_mode;
276 
277 	if (bypassed)
278 		cmd.data = PMIC4_BOB_MODE_PASS;
279 	else
280 		cmd.data = pmic_mode;
281 
282 	return rpmh_regulator_send_request(vreg, &cmd, true);
283 }
284 
285 static int rpmh_regulator_vrm_set_mode(struct regulator_dev *rdev,
286 					unsigned int mode)
287 {
288 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
289 	int ret;
290 
291 	if (mode == vreg->mode)
292 		return 0;
293 
294 	ret = rpmh_regulator_vrm_set_mode_bypass(vreg, mode, vreg->bypassed);
295 	if (!ret)
296 		vreg->mode = mode;
297 
298 	return ret;
299 }
300 
301 static unsigned int rpmh_regulator_vrm_get_mode(struct regulator_dev *rdev)
302 {
303 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
304 
305 	return vreg->mode;
306 }
307 
308 /**
309  * rpmh_regulator_vrm_set_load() - set the regulator mode based upon the load
310  *		current requested
311  * @rdev:		Regulator device pointer for the rpmh-regulator
312  * @load_uA:		Aggregated load current in microamps
313  *
314  * This function is used in the regulator_ops for VRM type RPMh regulator
315  * devices.
316  *
317  * Return: 0 on success, errno on failure
318  */
319 static int rpmh_regulator_vrm_set_load(struct regulator_dev *rdev, int load_uA)
320 {
321 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
322 	unsigned int mode;
323 
324 	if (load_uA >= vreg->hw_data->hpm_min_load_uA)
325 		mode = REGULATOR_MODE_NORMAL;
326 	else
327 		mode = REGULATOR_MODE_IDLE;
328 
329 	return rpmh_regulator_vrm_set_mode(rdev, mode);
330 }
331 
332 static int rpmh_regulator_vrm_set_bypass(struct regulator_dev *rdev,
333 				bool enable)
334 {
335 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
336 	int ret;
337 
338 	if (vreg->bypassed == enable)
339 		return 0;
340 
341 	ret = rpmh_regulator_vrm_set_mode_bypass(vreg, vreg->mode, enable);
342 	if (!ret)
343 		vreg->bypassed = enable;
344 
345 	return ret;
346 }
347 
348 static int rpmh_regulator_vrm_get_bypass(struct regulator_dev *rdev,
349 				bool *enable)
350 {
351 	struct rpmh_vreg *vreg = rdev_get_drvdata(rdev);
352 
353 	*enable = vreg->bypassed;
354 
355 	return 0;
356 }
357 
358 static const struct regulator_ops rpmh_regulator_vrm_ops = {
359 	.enable			= rpmh_regulator_enable,
360 	.disable		= rpmh_regulator_disable,
361 	.is_enabled		= rpmh_regulator_is_enabled,
362 	.set_voltage_sel	= rpmh_regulator_vrm_set_voltage_sel,
363 	.get_voltage_sel	= rpmh_regulator_vrm_get_voltage_sel,
364 	.list_voltage		= regulator_list_voltage_linear_range,
365 	.set_mode		= rpmh_regulator_vrm_set_mode,
366 	.get_mode		= rpmh_regulator_vrm_get_mode,
367 };
368 
369 static const struct regulator_ops rpmh_regulator_vrm_drms_ops = {
370 	.enable			= rpmh_regulator_enable,
371 	.disable		= rpmh_regulator_disable,
372 	.is_enabled		= rpmh_regulator_is_enabled,
373 	.set_voltage_sel	= rpmh_regulator_vrm_set_voltage_sel,
374 	.get_voltage_sel	= rpmh_regulator_vrm_get_voltage_sel,
375 	.list_voltage		= regulator_list_voltage_linear_range,
376 	.set_mode		= rpmh_regulator_vrm_set_mode,
377 	.get_mode		= rpmh_regulator_vrm_get_mode,
378 	.set_load		= rpmh_regulator_vrm_set_load,
379 };
380 
381 static const struct regulator_ops rpmh_regulator_vrm_bypass_ops = {
382 	.enable			= rpmh_regulator_enable,
383 	.disable		= rpmh_regulator_disable,
384 	.is_enabled		= rpmh_regulator_is_enabled,
385 	.set_voltage_sel	= rpmh_regulator_vrm_set_voltage_sel,
386 	.get_voltage_sel	= rpmh_regulator_vrm_get_voltage_sel,
387 	.list_voltage		= regulator_list_voltage_linear_range,
388 	.set_mode		= rpmh_regulator_vrm_set_mode,
389 	.get_mode		= rpmh_regulator_vrm_get_mode,
390 	.set_bypass		= rpmh_regulator_vrm_set_bypass,
391 	.get_bypass		= rpmh_regulator_vrm_get_bypass,
392 };
393 
394 static const struct regulator_ops rpmh_regulator_xob_ops = {
395 	.enable			= rpmh_regulator_enable,
396 	.disable		= rpmh_regulator_disable,
397 	.is_enabled		= rpmh_regulator_is_enabled,
398 };
399 
400 /**
401  * rpmh_regulator_init_vreg() - initialize all attributes of an rpmh-regulator
402  * @vreg:		Pointer to the individual rpmh-regulator resource
403  * @dev:			Pointer to the top level rpmh-regulator PMIC device
404  * @node:		Pointer to the individual rpmh-regulator resource
405  *			device node
406  * @pmic_id:		String used to identify the top level rpmh-regulator
407  *			PMIC device on the board
408  * @pmic_rpmh_data:	Pointer to a null-terminated array of rpmh-regulator
409  *			resources defined for the top level PMIC device
410  *
411  * Return: 0 on success, errno on failure
412  */
413 static int rpmh_regulator_init_vreg(struct rpmh_vreg *vreg, struct device *dev,
414 			struct device_node *node, const char *pmic_id,
415 			const struct rpmh_vreg_init_data *pmic_rpmh_data)
416 {
417 	struct regulator_config reg_config = {};
418 	char rpmh_resource_name[20] = "";
419 	const struct rpmh_vreg_init_data *rpmh_data;
420 	struct regulator_init_data *init_data;
421 	struct regulator_dev *rdev;
422 	int ret;
423 
424 	vreg->dev = dev;
425 
426 	for (rpmh_data = pmic_rpmh_data; rpmh_data->name; rpmh_data++)
427 		if (of_node_name_eq(node, rpmh_data->name))
428 			break;
429 
430 	if (!rpmh_data->name) {
431 		dev_err(dev, "Unknown regulator %pOFn\n", node);
432 		return -EINVAL;
433 	}
434 
435 	scnprintf(rpmh_resource_name, sizeof(rpmh_resource_name),
436 		rpmh_data->resource_name, pmic_id);
437 
438 	vreg->addr = cmd_db_read_addr(rpmh_resource_name);
439 	if (!vreg->addr) {
440 		dev_err(dev, "%pOFn: could not find RPMh address for resource %s\n",
441 			node, rpmh_resource_name);
442 		return -ENODEV;
443 	}
444 
445 	vreg->rdesc.name = rpmh_data->name;
446 	vreg->rdesc.supply_name = rpmh_data->supply_name;
447 	vreg->hw_data = rpmh_data->hw_data;
448 
449 	vreg->enabled = -EINVAL;
450 	vreg->voltage_selector = -ENOTRECOVERABLE;
451 	vreg->mode = REGULATOR_MODE_INVALID;
452 
453 	if (rpmh_data->hw_data->n_voltages) {
454 		vreg->rdesc.linear_ranges = &rpmh_data->hw_data->voltage_range;
455 		vreg->rdesc.n_linear_ranges = 1;
456 		vreg->rdesc.n_voltages = rpmh_data->hw_data->n_voltages;
457 	}
458 
459 	vreg->always_wait_for_ack = of_property_read_bool(node,
460 						"qcom,always-wait-for-ack");
461 
462 	vreg->rdesc.owner	= THIS_MODULE;
463 	vreg->rdesc.type	= REGULATOR_VOLTAGE;
464 	vreg->rdesc.ops		= vreg->hw_data->ops;
465 	vreg->rdesc.of_map_mode	= vreg->hw_data->of_map_mode;
466 
467 	init_data = of_get_regulator_init_data(dev, node, &vreg->rdesc);
468 	if (!init_data)
469 		return -ENOMEM;
470 
471 	if (rpmh_data->hw_data->regulator_type == XOB &&
472 	    init_data->constraints.min_uV &&
473 	    init_data->constraints.min_uV == init_data->constraints.max_uV) {
474 		vreg->rdesc.fixed_uV = init_data->constraints.min_uV;
475 		vreg->rdesc.n_voltages = 1;
476 	}
477 
478 	reg_config.dev		= dev;
479 	reg_config.init_data	= init_data;
480 	reg_config.of_node	= node;
481 	reg_config.driver_data	= vreg;
482 
483 	rdev = devm_regulator_register(dev, &vreg->rdesc, &reg_config);
484 	if (IS_ERR(rdev)) {
485 		ret = PTR_ERR(rdev);
486 		dev_err(dev, "%pOFn: devm_regulator_register() failed, ret=%d\n",
487 			node, ret);
488 		return ret;
489 	}
490 
491 	dev_dbg(dev, "%pOFn regulator registered for RPMh resource %s @ 0x%05X\n",
492 		node, rpmh_resource_name, vreg->addr);
493 
494 	return 0;
495 }
496 
497 static const int pmic_mode_map_pmic4_ldo[REGULATOR_MODE_STANDBY + 1] = {
498 	[REGULATOR_MODE_INVALID] = -EINVAL,
499 	[REGULATOR_MODE_STANDBY] = PMIC4_LDO_MODE_RETENTION,
500 	[REGULATOR_MODE_IDLE]    = PMIC4_LDO_MODE_LPM,
501 	[REGULATOR_MODE_NORMAL]  = PMIC4_LDO_MODE_HPM,
502 	[REGULATOR_MODE_FAST]    = -EINVAL,
503 };
504 
505 static const int pmic_mode_map_pmic5_ldo[REGULATOR_MODE_STANDBY + 1] = {
506 	[REGULATOR_MODE_INVALID] = -EINVAL,
507 	[REGULATOR_MODE_STANDBY] = PMIC5_LDO_MODE_RETENTION,
508 	[REGULATOR_MODE_IDLE]    = PMIC5_LDO_MODE_LPM,
509 	[REGULATOR_MODE_NORMAL]  = PMIC5_LDO_MODE_HPM,
510 	[REGULATOR_MODE_FAST]    = -EINVAL,
511 };
512 
513 static unsigned int rpmh_regulator_pmic4_ldo_of_map_mode(unsigned int rpmh_mode)
514 {
515 	unsigned int mode;
516 
517 	switch (rpmh_mode) {
518 	case RPMH_REGULATOR_MODE_HPM:
519 		mode = REGULATOR_MODE_NORMAL;
520 		break;
521 	case RPMH_REGULATOR_MODE_LPM:
522 		mode = REGULATOR_MODE_IDLE;
523 		break;
524 	case RPMH_REGULATOR_MODE_RET:
525 		mode = REGULATOR_MODE_STANDBY;
526 		break;
527 	default:
528 		mode = REGULATOR_MODE_INVALID;
529 		break;
530 	}
531 
532 	return mode;
533 }
534 
535 static const int pmic_mode_map_pmic4_smps[REGULATOR_MODE_STANDBY + 1] = {
536 	[REGULATOR_MODE_INVALID] = -EINVAL,
537 	[REGULATOR_MODE_STANDBY] = PMIC4_SMPS_MODE_RETENTION,
538 	[REGULATOR_MODE_IDLE]    = PMIC4_SMPS_MODE_PFM,
539 	[REGULATOR_MODE_NORMAL]  = PMIC4_SMPS_MODE_AUTO,
540 	[REGULATOR_MODE_FAST]    = PMIC4_SMPS_MODE_PWM,
541 };
542 
543 static const int pmic_mode_map_pmic5_smps[REGULATOR_MODE_STANDBY + 1] = {
544 	[REGULATOR_MODE_INVALID] = -EINVAL,
545 	[REGULATOR_MODE_STANDBY] = PMIC5_SMPS_MODE_RETENTION,
546 	[REGULATOR_MODE_IDLE]    = PMIC5_SMPS_MODE_PFM,
547 	[REGULATOR_MODE_NORMAL]  = PMIC5_SMPS_MODE_AUTO,
548 	[REGULATOR_MODE_FAST]    = PMIC5_SMPS_MODE_PWM,
549 };
550 
551 static unsigned int
552 rpmh_regulator_pmic4_smps_of_map_mode(unsigned int rpmh_mode)
553 {
554 	unsigned int mode;
555 
556 	switch (rpmh_mode) {
557 	case RPMH_REGULATOR_MODE_HPM:
558 		mode = REGULATOR_MODE_FAST;
559 		break;
560 	case RPMH_REGULATOR_MODE_AUTO:
561 		mode = REGULATOR_MODE_NORMAL;
562 		break;
563 	case RPMH_REGULATOR_MODE_LPM:
564 		mode = REGULATOR_MODE_IDLE;
565 		break;
566 	case RPMH_REGULATOR_MODE_RET:
567 		mode = REGULATOR_MODE_STANDBY;
568 		break;
569 	default:
570 		mode = REGULATOR_MODE_INVALID;
571 		break;
572 	}
573 
574 	return mode;
575 }
576 
577 static const int pmic_mode_map_pmic4_bob[REGULATOR_MODE_STANDBY + 1] = {
578 	[REGULATOR_MODE_INVALID] = -EINVAL,
579 	[REGULATOR_MODE_STANDBY] = -EINVAL,
580 	[REGULATOR_MODE_IDLE]    = PMIC4_BOB_MODE_PFM,
581 	[REGULATOR_MODE_NORMAL]  = PMIC4_BOB_MODE_AUTO,
582 	[REGULATOR_MODE_FAST]    = PMIC4_BOB_MODE_PWM,
583 };
584 
585 static const int pmic_mode_map_pmic5_bob[REGULATOR_MODE_STANDBY + 1] = {
586 	[REGULATOR_MODE_INVALID] = -EINVAL,
587 	[REGULATOR_MODE_STANDBY] = -EINVAL,
588 	[REGULATOR_MODE_IDLE]    = PMIC5_BOB_MODE_PFM,
589 	[REGULATOR_MODE_NORMAL]  = PMIC5_BOB_MODE_AUTO,
590 	[REGULATOR_MODE_FAST]    = PMIC5_BOB_MODE_PWM,
591 };
592 
593 static unsigned int rpmh_regulator_pmic4_bob_of_map_mode(unsigned int rpmh_mode)
594 {
595 	unsigned int mode;
596 
597 	switch (rpmh_mode) {
598 	case RPMH_REGULATOR_MODE_HPM:
599 		mode = REGULATOR_MODE_FAST;
600 		break;
601 	case RPMH_REGULATOR_MODE_AUTO:
602 		mode = REGULATOR_MODE_NORMAL;
603 		break;
604 	case RPMH_REGULATOR_MODE_LPM:
605 		mode = REGULATOR_MODE_IDLE;
606 		break;
607 	default:
608 		mode = REGULATOR_MODE_INVALID;
609 		break;
610 	}
611 
612 	return mode;
613 }
614 
615 static const struct rpmh_vreg_hw_data pmic4_pldo = {
616 	.regulator_type = VRM,
617 	.ops = &rpmh_regulator_vrm_drms_ops,
618 	.voltage_range = REGULATOR_LINEAR_RANGE(1664000, 0, 255, 8000),
619 	.n_voltages = 256,
620 	.hpm_min_load_uA = 10000,
621 	.pmic_mode_map = pmic_mode_map_pmic4_ldo,
622 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
623 };
624 
625 static const struct rpmh_vreg_hw_data pmic4_pldo_lv = {
626 	.regulator_type = VRM,
627 	.ops = &rpmh_regulator_vrm_drms_ops,
628 	.voltage_range = REGULATOR_LINEAR_RANGE(1256000, 0, 127, 8000),
629 	.n_voltages = 128,
630 	.hpm_min_load_uA = 10000,
631 	.pmic_mode_map = pmic_mode_map_pmic4_ldo,
632 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
633 };
634 
635 static const struct rpmh_vreg_hw_data pmic4_nldo = {
636 	.regulator_type = VRM,
637 	.ops = &rpmh_regulator_vrm_drms_ops,
638 	.voltage_range = REGULATOR_LINEAR_RANGE(312000, 0, 127, 8000),
639 	.n_voltages = 128,
640 	.hpm_min_load_uA = 30000,
641 	.pmic_mode_map = pmic_mode_map_pmic4_ldo,
642 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
643 };
644 
645 static const struct rpmh_vreg_hw_data pmic4_hfsmps3 = {
646 	.regulator_type = VRM,
647 	.ops = &rpmh_regulator_vrm_ops,
648 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
649 	.n_voltages = 216,
650 	.pmic_mode_map = pmic_mode_map_pmic4_smps,
651 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
652 };
653 
654 static const struct rpmh_vreg_hw_data pmic4_ftsmps426 = {
655 	.regulator_type = VRM,
656 	.ops = &rpmh_regulator_vrm_ops,
657 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 258, 4000),
658 	.n_voltages = 259,
659 	.pmic_mode_map = pmic_mode_map_pmic4_smps,
660 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
661 };
662 
663 static const struct rpmh_vreg_hw_data pmic4_bob = {
664 	.regulator_type = VRM,
665 	.ops = &rpmh_regulator_vrm_bypass_ops,
666 	.voltage_range = REGULATOR_LINEAR_RANGE(1824000, 0, 83, 32000),
667 	.n_voltages = 84,
668 	.pmic_mode_map = pmic_mode_map_pmic4_bob,
669 	.of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
670 };
671 
672 static const struct rpmh_vreg_hw_data pmic4_lvs = {
673 	.regulator_type = XOB,
674 	.ops = &rpmh_regulator_xob_ops,
675 	/* LVS hardware does not support voltage or mode configuration. */
676 };
677 
678 static const struct rpmh_vreg_hw_data pmic5_pldo = {
679 	.regulator_type = VRM,
680 	.ops = &rpmh_regulator_vrm_drms_ops,
681 	.voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 255, 8000),
682 	.n_voltages = 256,
683 	.hpm_min_load_uA = 10000,
684 	.pmic_mode_map = pmic_mode_map_pmic5_ldo,
685 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
686 };
687 
688 static const struct rpmh_vreg_hw_data pmic5_pldo_lv = {
689 	.regulator_type = VRM,
690 	.ops = &rpmh_regulator_vrm_drms_ops,
691 	.voltage_range = REGULATOR_LINEAR_RANGE(1504000, 0, 62, 8000),
692 	.n_voltages = 63,
693 	.hpm_min_load_uA = 10000,
694 	.pmic_mode_map = pmic_mode_map_pmic5_ldo,
695 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
696 };
697 
698 static const struct rpmh_vreg_hw_data pmic5_nldo = {
699 	.regulator_type = VRM,
700 	.ops = &rpmh_regulator_vrm_drms_ops,
701 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 123, 8000),
702 	.n_voltages = 124,
703 	.hpm_min_load_uA = 30000,
704 	.pmic_mode_map = pmic_mode_map_pmic5_ldo,
705 	.of_map_mode = rpmh_regulator_pmic4_ldo_of_map_mode,
706 };
707 
708 static const struct rpmh_vreg_hw_data pmic5_hfsmps510 = {
709 	.regulator_type = VRM,
710 	.ops = &rpmh_regulator_vrm_ops,
711 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 215, 8000),
712 	.n_voltages = 216,
713 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
714 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
715 };
716 
717 static const struct rpmh_vreg_hw_data pmic5_ftsmps510 = {
718 	.regulator_type = VRM,
719 	.ops = &rpmh_regulator_vrm_ops,
720 	.voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
721 	.n_voltages = 264,
722 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
723 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
724 };
725 
726 static const struct rpmh_vreg_hw_data pmic5_ftsmps520 = {
727 	.regulator_type = VRM,
728 	.ops = &rpmh_regulator_vrm_ops,
729 	.voltage_range = REGULATOR_LINEAR_RANGE(300000, 0, 263, 4000),
730 	.n_voltages = 264,
731 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
732 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
733 };
734 
735 static const struct rpmh_vreg_hw_data pmic5_hfsmps515 = {
736 	.regulator_type = VRM,
737 	.ops = &rpmh_regulator_vrm_ops,
738 	.voltage_range = REGULATOR_LINEAR_RANGE(320000, 0, 235, 16000),
739 	.n_voltages = 236,
740 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
741 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
742 };
743 
744 static const struct rpmh_vreg_hw_data pmic5_hfsmps515_1 = {
745 	.regulator_type = VRM,
746 	.ops = &rpmh_regulator_vrm_ops,
747 	.voltage_range = REGULATOR_LINEAR_RANGE(900000, 0, 4, 16000),
748 	.n_voltages = 5,
749 	.pmic_mode_map = pmic_mode_map_pmic5_smps,
750 	.of_map_mode = rpmh_regulator_pmic4_smps_of_map_mode,
751 };
752 
753 static const struct rpmh_vreg_hw_data pmic5_bob = {
754 	.regulator_type = VRM,
755 	.ops = &rpmh_regulator_vrm_bypass_ops,
756 	.voltage_range = REGULATOR_LINEAR_RANGE(3000000, 0, 31, 32000),
757 	.n_voltages = 32,
758 	.pmic_mode_map = pmic_mode_map_pmic5_bob,
759 	.of_map_mode = rpmh_regulator_pmic4_bob_of_map_mode,
760 };
761 
762 #define RPMH_VREG(_name, _resource_name, _hw_data, _supply_name) \
763 { \
764 	.name		= _name, \
765 	.resource_name	= _resource_name, \
766 	.hw_data	= _hw_data, \
767 	.supply_name	= _supply_name, \
768 }
769 
770 static const struct rpmh_vreg_init_data pm8998_vreg_data[] = {
771 	RPMH_VREG("smps1",  "smp%s1",  &pmic4_ftsmps426, "vdd-s1"),
772 	RPMH_VREG("smps2",  "smp%s2",  &pmic4_ftsmps426, "vdd-s2"),
773 	RPMH_VREG("smps3",  "smp%s3",  &pmic4_hfsmps3,   "vdd-s3"),
774 	RPMH_VREG("smps4",  "smp%s4",  &pmic4_hfsmps3,   "vdd-s4"),
775 	RPMH_VREG("smps5",  "smp%s5",  &pmic4_hfsmps3,   "vdd-s5"),
776 	RPMH_VREG("smps6",  "smp%s6",  &pmic4_ftsmps426, "vdd-s6"),
777 	RPMH_VREG("smps7",  "smp%s7",  &pmic4_ftsmps426, "vdd-s7"),
778 	RPMH_VREG("smps8",  "smp%s8",  &pmic4_ftsmps426, "vdd-s8"),
779 	RPMH_VREG("smps9",  "smp%s9",  &pmic4_ftsmps426, "vdd-s9"),
780 	RPMH_VREG("smps10", "smp%s10", &pmic4_ftsmps426, "vdd-s10"),
781 	RPMH_VREG("smps11", "smp%s11", &pmic4_ftsmps426, "vdd-s11"),
782 	RPMH_VREG("smps12", "smp%s12", &pmic4_ftsmps426, "vdd-s12"),
783 	RPMH_VREG("smps13", "smp%s13", &pmic4_ftsmps426, "vdd-s13"),
784 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic4_nldo,      "vdd-l1-l27"),
785 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic4_nldo,      "vdd-l2-l8-l17"),
786 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic4_nldo,      "vdd-l3-l11"),
787 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic4_nldo,      "vdd-l4-l5"),
788 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic4_nldo,      "vdd-l4-l5"),
789 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic4_pldo,      "vdd-l6"),
790 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic4_pldo_lv,   "vdd-l7-l12-l14-l15"),
791 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic4_nldo,      "vdd-l2-l8-l17"),
792 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic4_pldo,      "vdd-l9"),
793 	RPMH_VREG("ldo10",  "ldo%s10", &pmic4_pldo,      "vdd-l10-l23-l25"),
794 	RPMH_VREG("ldo11",  "ldo%s11", &pmic4_nldo,      "vdd-l3-l11"),
795 	RPMH_VREG("ldo12",  "ldo%s12", &pmic4_pldo_lv,   "vdd-l7-l12-l14-l15"),
796 	RPMH_VREG("ldo13",  "ldo%s13", &pmic4_pldo,      "vdd-l13-l19-l21"),
797 	RPMH_VREG("ldo14",  "ldo%s14", &pmic4_pldo_lv,   "vdd-l7-l12-l14-l15"),
798 	RPMH_VREG("ldo15",  "ldo%s15", &pmic4_pldo_lv,   "vdd-l7-l12-l14-l15"),
799 	RPMH_VREG("ldo16",  "ldo%s16", &pmic4_pldo,      "vdd-l16-l28"),
800 	RPMH_VREG("ldo17",  "ldo%s17", &pmic4_nldo,      "vdd-l2-l8-l17"),
801 	RPMH_VREG("ldo18",  "ldo%s18", &pmic4_pldo,      "vdd-l18-l22"),
802 	RPMH_VREG("ldo19",  "ldo%s19", &pmic4_pldo,      "vdd-l13-l19-l21"),
803 	RPMH_VREG("ldo20",  "ldo%s20", &pmic4_pldo,      "vdd-l20-l24"),
804 	RPMH_VREG("ldo21",  "ldo%s21", &pmic4_pldo,      "vdd-l13-l19-l21"),
805 	RPMH_VREG("ldo22",  "ldo%s22", &pmic4_pldo,      "vdd-l18-l22"),
806 	RPMH_VREG("ldo23",  "ldo%s23", &pmic4_pldo,      "vdd-l10-l23-l25"),
807 	RPMH_VREG("ldo24",  "ldo%s24", &pmic4_pldo,      "vdd-l20-l24"),
808 	RPMH_VREG("ldo25",  "ldo%s25", &pmic4_pldo,      "vdd-l10-l23-l25"),
809 	RPMH_VREG("ldo26",  "ldo%s26", &pmic4_nldo,      "vdd-l26"),
810 	RPMH_VREG("ldo27",  "ldo%s27", &pmic4_nldo,      "vdd-l1-l27"),
811 	RPMH_VREG("ldo28",  "ldo%s28", &pmic4_pldo,      "vdd-l16-l28"),
812 	RPMH_VREG("lvs1",   "vs%s1",   &pmic4_lvs,       "vin-lvs-1-2"),
813 	RPMH_VREG("lvs2",   "vs%s2",   &pmic4_lvs,       "vin-lvs-1-2"),
814 	{}
815 };
816 
817 static const struct rpmh_vreg_init_data pmg1110_vreg_data[] = {
818 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510,  "vdd-s1"),
819 	{}
820 };
821 
822 static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = {
823 	RPMH_VREG("bob",    "bob%s1",  &pmic4_bob,       "vdd-bob"),
824 	{}
825 };
826 
827 static const struct rpmh_vreg_init_data pm8005_vreg_data[] = {
828 	RPMH_VREG("smps1",  "smp%s1",  &pmic4_ftsmps426, "vdd-s1"),
829 	RPMH_VREG("smps2",  "smp%s2",  &pmic4_ftsmps426, "vdd-s2"),
830 	RPMH_VREG("smps3",  "smp%s3",  &pmic4_ftsmps426, "vdd-s3"),
831 	RPMH_VREG("smps4",  "smp%s4",  &pmic4_ftsmps426, "vdd-s4"),
832 	{}
833 };
834 
835 static const struct rpmh_vreg_init_data pm8150_vreg_data[] = {
836 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
837 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
838 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
839 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_hfsmps510,   "vdd-s4"),
840 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_hfsmps510,   "vdd-s5"),
841 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
842 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
843 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
844 	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
845 	RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
846 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l8-l11"),
847 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l10"),
848 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
849 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
850 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
851 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9"),
852 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l7-l12-l14-l15"),
853 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l1-l8-l11"),
854 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9"),
855 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l2-l10"),
856 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_nldo,      "vdd-l1-l8-l11"),
857 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
858 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,      "vdd-l13-l16-l17"),
859 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
860 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
861 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,      "vdd-l13-l16-l17"),
862 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,      "vdd-l13-l16-l17"),
863 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
864 	{}
865 };
866 
867 static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = {
868 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
869 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
870 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
871 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps510, "vdd-s4"),
872 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps510, "vdd-s5"),
873 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
874 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
875 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_hfsmps510, "vdd-s8"),
876 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_pldo_lv,   "vdd-l1-l8"),
877 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2-l3"),
878 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l2-l3"),
879 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo,      "vdd-l4-l5-l6"),
880 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l4-l5-l6"),
881 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l4-l5-l6"),
882 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l7-l11"),
883 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo_lv,   "vdd-l1-l8"),
884 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,      "vdd-l9-l10"),
885 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l9-l10"),
886 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,      "vdd-l7-l11"),
887 	RPMH_VREG("bob",    "bob%s1",  &pmic5_bob,       "vdd-bob"),
888 	{}
889 };
890 
891 static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = {
892 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
893 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
894 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
895 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_hfsmps510, "vdd-s4"),
896 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_hfsmps510, "vdd-s5"),
897 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
898 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
899 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
900 	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
901 	RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
902 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l8-l11"),
903 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l10"),
904 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
905 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
906 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
907 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9"),
908 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
909 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l1-l8-l11"),
910 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9"),
911 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l2-l10"),
912 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_nldo,      "vdd-l1-l8-l11"),
913 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
914 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,      "vdd-l13-l16-l17"),
915 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
916 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo_lv,   "vdd-l7-l12-l14-l15"),
917 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,      "vdd-l13-l16-l17"),
918 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,      "vdd-l13-l16-l17"),
919 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_nldo,      "vdd-l3-l4-l5-l18"),
920 	{}
921 };
922 
923 static const struct rpmh_vreg_init_data pm8350_vreg_data[] = {
924 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
925 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
926 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
927 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps510, "vdd-s4"),
928 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps510, "vdd-s5"),
929 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
930 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
931 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
932 	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
933 	RPMH_VREG("smps10", "smp%s10", &pmic5_hfsmps510, "vdd-s10"),
934 	RPMH_VREG("smps11", "smp%s11", &pmic5_hfsmps510, "vdd-s11"),
935 	RPMH_VREG("smps12", "smp%s12", &pmic5_hfsmps510, "vdd-s12"),
936 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l4"),
937 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l7"),
938 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3-l5"),
939 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l1-l4"),
940 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l3-l5"),
941 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9-l10"),
942 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l2-l7"),
943 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l8"),
944 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9-l10"),
945 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_nldo,      "vdd-l6-l9-l10"),
946 	{}
947 };
948 
949 static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = {
950 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps515, "vdd-s1"),
951 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
952 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
953 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps510, "vdd-s4"),
954 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps510, "vdd-s5"),
955 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
956 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
957 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_ftsmps510, "vdd-s8"),
958 	RPMH_VREG("smps9",  "smp%s9",  &pmic5_ftsmps510, "vdd-s9"),
959 	RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"),
960 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_pldo_lv,   "vdd-l1-l12"),
961 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo_lv,   "vdd-l2-l8"),
962 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
963 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
964 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
965 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l6-l9-l11"),
966 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
967 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo_lv,   "vdd-l2-l8"),
968 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,      "vdd-l6-l9-l11"),
969 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_nldo,      "vdd-l10"),
970 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,      "vdd-l6-l9-l11"),
971 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l1-l12"),
972 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo,      "vdd-l3-l4-l5-l7-l13"),
973 	RPMH_VREG("bob",    "bob%s1",  &pmic5_bob,       "vdd-bob"),
974 	{}
975 };
976 
977 static const struct rpmh_vreg_init_data pm8450_vreg_data[] = {
978 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps520, "vdd-s1"),
979 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps520, "vdd-s2"),
980 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps520, "vdd-s3"),
981 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps520, "vdd-s4"),
982 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps520, "vdd-s5"),
983 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps520, "vdd-s6"),
984 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1"),
985 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2"),
986 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
987 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo_lv,   "vdd-l4"),
988 	{}
989 };
990 
991 static const struct rpmh_vreg_init_data pm8009_vreg_data[] = {
992 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps510, "vdd-s1"),
993 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_hfsmps515, "vdd-s2"),
994 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1"),
995 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2"),
996 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
997 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l4"),
998 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l5-l6"),
999 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l5-l6"),
1000 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv,   "vdd-l7"),
1001 	{}
1002 };
1003 
1004 static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = {
1005 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps510, "vdd-s1"),
1006 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_hfsmps515_1, "vdd-s2"),
1007 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1"),
1008 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2"),
1009 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
1010 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l4"),
1011 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l5-l6"),
1012 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l5-l6"),
1013 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo_lv,   "vdd-l7"),
1014 	{}
1015 };
1016 
1017 static const struct rpmh_vreg_init_data pm6150_vreg_data[] = {
1018 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
1019 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
1020 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
1021 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_hfsmps510, "vdd-s4"),
1022 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_hfsmps510, "vdd-s5"),
1023 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1"),
1024 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2-l3"),
1025 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l2-l3"),
1026 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l4-l7-l8"),
1027 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1028 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6"),
1029 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_nldo,      "vdd-l4-l7-l8"),
1030 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l4-l7-l8"),
1031 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l9"),
1032 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo_lv,   "vdd-l10-l14-l15"),
1033 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo_lv,   "vdd-l11-l12-l13"),
1034 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo_lv,   "vdd-l11-l12-l13"),
1035 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_pldo_lv,   "vdd-l11-l12-l13"),
1036 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo_lv,   "vdd-l10-l14-l15"),
1037 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_pldo_lv,   "vdd-l10-l14-l15"),
1038 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1039 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1040 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1041 	RPMH_VREG("ldo19",  "ldo%s19", &pmic5_pldo,   "vdd-l5-l16-l17-l18-l19"),
1042 	{}
1043 };
1044 
1045 static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = {
1046 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, "vdd-s1"),
1047 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps510, "vdd-s2"),
1048 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps510, "vdd-s3"),
1049 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps510, "vdd-s4"),
1050 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps510, "vdd-s5"),
1051 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps510, "vdd-s6"),
1052 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps510, "vdd-s7"),
1053 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_hfsmps510, "vdd-s8"),
1054 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_pldo_lv,   "vdd-l1-l8"),
1055 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l2-l3"),
1056 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l2-l3"),
1057 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo,      "vdd-l4-l5-l6"),
1058 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      "vdd-l4-l5-l6"),
1059 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      "vdd-l4-l5-l6"),
1060 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l7-l11"),
1061 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo,      "vdd-l1-l8"),
1062 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,      "vdd-l9-l10"),
1063 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      "vdd-l9-l10"),
1064 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,      "vdd-l7-l11"),
1065 	RPMH_VREG("bob",    "bob%s1",  &pmic5_bob,       "vdd-bob"),
1066 	{}
1067 };
1068 
1069 static const struct rpmh_vreg_init_data pm6350_vreg_data[] = {
1070 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps510, NULL),
1071 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_hfsmps510, NULL),
1072 	/* smps3 - smps5 not configured */
1073 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      NULL),
1074 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      NULL),
1075 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_pldo,      NULL),
1076 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      NULL),
1077 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_pldo,      NULL),
1078 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_pldo,      NULL),
1079 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      NULL),
1080 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_pldo,      NULL),
1081 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_pldo,      NULL),
1082 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_pldo,      NULL),
1083 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo,      NULL),
1084 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_pldo,      NULL),
1085 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_nldo,      NULL),
1086 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_pldo,      NULL),
1087 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_nldo,      NULL),
1088 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_nldo,      NULL),
1089 	/* ldo17 not configured */
1090 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_nldo,      NULL),
1091 	RPMH_VREG("ldo19",  "ldo%s19", &pmic5_nldo,      NULL),
1092 	RPMH_VREG("ldo20",  "ldo%s20", &pmic5_nldo,      NULL),
1093 	RPMH_VREG("ldo21",  "ldo%s21", &pmic5_nldo,      NULL),
1094 	RPMH_VREG("ldo22",  "ldo%s22", &pmic5_nldo,      NULL),
1095 };
1096 
1097 static const struct rpmh_vreg_init_data pmx55_vreg_data[] = {
1098 	RPMH_VREG("smps1",   "smp%s1",    &pmic5_ftsmps510, "vdd-s1"),
1099 	RPMH_VREG("smps2",   "smp%s2",    &pmic5_hfsmps510, "vdd-s2"),
1100 	RPMH_VREG("smps3",   "smp%s3",    &pmic5_hfsmps510, "vdd-s3"),
1101 	RPMH_VREG("smps4",   "smp%s4",    &pmic5_hfsmps510, "vdd-s4"),
1102 	RPMH_VREG("smps5",   "smp%s5",    &pmic5_hfsmps510, "vdd-s5"),
1103 	RPMH_VREG("smps6",   "smp%s6",    &pmic5_ftsmps510, "vdd-s6"),
1104 	RPMH_VREG("smps7",   "smp%s7",    &pmic5_hfsmps510, "vdd-s7"),
1105 	RPMH_VREG("ldo1",    "ldo%s1",    &pmic5_nldo,      "vdd-l1-l2"),
1106 	RPMH_VREG("ldo2",    "ldo%s2",    &pmic5_nldo,      "vdd-l1-l2"),
1107 	RPMH_VREG("ldo3",    "ldo%s3",    &pmic5_nldo,      "vdd-l3-l9"),
1108 	RPMH_VREG("ldo4",    "ldo%s4",    &pmic5_nldo,      "vdd-l4-l12"),
1109 	RPMH_VREG("ldo5",    "ldo%s5",    &pmic5_pldo,      "vdd-l5-l6"),
1110 	RPMH_VREG("ldo6",    "ldo%s6",    &pmic5_pldo,      "vdd-l5-l6"),
1111 	RPMH_VREG("ldo7",    "ldo%s7",    &pmic5_nldo,      "vdd-l7-l8"),
1112 	RPMH_VREG("ldo8",    "ldo%s8",    &pmic5_nldo,      "vdd-l7-l8"),
1113 	RPMH_VREG("ldo9",    "ldo%s9",    &pmic5_nldo,      "vdd-l3-l9"),
1114 	RPMH_VREG("ldo10",   "ldo%s10",   &pmic5_pldo,      "vdd-l10-l11-l13"),
1115 	RPMH_VREG("ldo11",   "ldo%s11",   &pmic5_pldo,      "vdd-l10-l11-l13"),
1116 	RPMH_VREG("ldo12",   "ldo%s12",   &pmic5_nldo,      "vdd-l4-l12"),
1117 	RPMH_VREG("ldo13",   "ldo%s13",   &pmic5_pldo,      "vdd-l10-l11-l13"),
1118 	RPMH_VREG("ldo14",   "ldo%s14",   &pmic5_nldo,      "vdd-l14"),
1119 	RPMH_VREG("ldo15",   "ldo%s15",   &pmic5_nldo,      "vdd-l15"),
1120 	RPMH_VREG("ldo16",   "ldo%s16",   &pmic5_pldo,      "vdd-l16"),
1121 	{}
1122 };
1123 
1124 static const struct rpmh_vreg_init_data pmx65_vreg_data[] = {
1125 	RPMH_VREG("smps1",   "smp%s1",    &pmic5_ftsmps510, "vdd-s1"),
1126 	RPMH_VREG("smps2",   "smp%s2",    &pmic5_hfsmps510, "vdd-s2"),
1127 	RPMH_VREG("smps3",   "smp%s3",    &pmic5_hfsmps510, "vdd-s3"),
1128 	RPMH_VREG("smps4",   "smp%s4",    &pmic5_hfsmps510, "vdd-s4"),
1129 	RPMH_VREG("smps5",   "smp%s5",    &pmic5_hfsmps510, "vdd-s5"),
1130 	RPMH_VREG("smps6",   "smp%s6",    &pmic5_ftsmps510, "vdd-s6"),
1131 	RPMH_VREG("smps7",   "smp%s7",    &pmic5_hfsmps510, "vdd-s7"),
1132 	RPMH_VREG("smps8",   "smp%s8",    &pmic5_hfsmps510, "vdd-s8"),
1133 	RPMH_VREG("ldo1",    "ldo%s1",    &pmic5_nldo,      "vdd-l1"),
1134 	RPMH_VREG("ldo2",    "ldo%s2",    &pmic5_nldo,      "vdd-l2-l18"),
1135 	RPMH_VREG("ldo3",    "ldo%s3",    &pmic5_nldo,      "vdd-l3"),
1136 	RPMH_VREG("ldo4",    "ldo%s4",    &pmic5_nldo,      "vdd-l4"),
1137 	RPMH_VREG("ldo5",    "ldo%s5",    &pmic5_pldo,      "vdd-l5-l6-l16"),
1138 	RPMH_VREG("ldo6",    "ldo%s6",    &pmic5_pldo,      "vdd-l5-l6-l16"),
1139 	RPMH_VREG("ldo7",    "ldo%s7",    &pmic5_nldo,      "vdd-l7"),
1140 	RPMH_VREG("ldo8",    "ldo%s8",    &pmic5_nldo,      "vdd-l8-l9"),
1141 	RPMH_VREG("ldo9",    "ldo%s9",    &pmic5_nldo,      "vdd-l8-l9"),
1142 	RPMH_VREG("ldo10",   "ldo%s10",   &pmic5_pldo,      "vdd-l10"),
1143 	RPMH_VREG("ldo11",   "ldo%s11",   &pmic5_pldo,      "vdd-l11-l13"),
1144 	RPMH_VREG("ldo12",   "ldo%s12",   &pmic5_nldo,      "vdd-l12"),
1145 	RPMH_VREG("ldo13",   "ldo%s13",   &pmic5_pldo,      "vdd-l11-l13"),
1146 	RPMH_VREG("ldo14",   "ldo%s14",   &pmic5_nldo,      "vdd-l14"),
1147 	RPMH_VREG("ldo15",   "ldo%s15",   &pmic5_nldo,      "vdd-l15"),
1148 	RPMH_VREG("ldo16",   "ldo%s16",   &pmic5_pldo,      "vdd-l5-l6-l16"),
1149 	RPMH_VREG("ldo17",   "ldo%s17",   &pmic5_nldo,      "vdd-l17"),
1150 	/* ldo18 not configured */
1151 	RPMH_VREG("ldo19",   "ldo%s19",   &pmic5_nldo,      "vdd-l19"),
1152 	RPMH_VREG("ldo20",   "ldo%s20",   &pmic5_nldo,      "vdd-l20"),
1153 	RPMH_VREG("ldo21",   "ldo%s21",   &pmic5_nldo,      "vdd-l21"),
1154 	{}
1155 };
1156 
1157 static const struct rpmh_vreg_init_data pm7325_vreg_data[] = {
1158 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_hfsmps510, "vdd-s1"),
1159 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps520, "vdd-s2"),
1160 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_ftsmps520, "vdd-s3"),
1161 	RPMH_VREG("smps4",  "smp%s4",  &pmic5_ftsmps520, "vdd-s4"),
1162 	RPMH_VREG("smps5",  "smp%s5",  &pmic5_ftsmps520, "vdd-s5"),
1163 	RPMH_VREG("smps6",  "smp%s6",  &pmic5_ftsmps520, "vdd-s6"),
1164 	RPMH_VREG("smps7",  "smp%s7",  &pmic5_ftsmps520, "vdd-s7"),
1165 	RPMH_VREG("smps8",  "smp%s8",  &pmic5_hfsmps510, "vdd-s8"),
1166 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l4-l12-l15"),
1167 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_pldo,      "vdd-l2-l7"),
1168 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
1169 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_nldo,      "vdd-l1-l4-l12-l15"),
1170 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l5"),
1171 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l6-l9-l10"),
1172 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l2-l7"),
1173 	RPMH_VREG("ldo8",   "ldo%s8",  &pmic5_nldo,      "vdd-l8"),
1174 	RPMH_VREG("ldo9",   "ldo%s9",  &pmic5_nldo,      "vdd-l6-l9-l10"),
1175 	RPMH_VREG("ldo10",  "ldo%s10", &pmic5_nldo,      "vdd-l6-l9-l10"),
1176 	RPMH_VREG("ldo11",  "ldo%s11", &pmic5_pldo_lv,   "vdd-l11-l17-l18-l19"),
1177 	RPMH_VREG("ldo12",  "ldo%s12", &pmic5_nldo,      "vdd-l1-l4-l12-l15"),
1178 	RPMH_VREG("ldo13",  "ldo%s13", &pmic5_nldo,      "vdd-l13"),
1179 	RPMH_VREG("ldo14",  "ldo%s14", &pmic5_nldo,      "vdd-l14-l16"),
1180 	RPMH_VREG("ldo15",  "ldo%s15", &pmic5_nldo,      "vdd-l1-l4-l12-l15"),
1181 	RPMH_VREG("ldo16",  "ldo%s16", &pmic5_nldo,      "vdd-l14-l16"),
1182 	RPMH_VREG("ldo17",  "ldo%s17", &pmic5_pldo_lv,   "vdd-l11-l17-l18-l19"),
1183 	RPMH_VREG("ldo18",  "ldo%s18", &pmic5_pldo_lv,   "vdd-l11-l17-l18-l19"),
1184 	RPMH_VREG("ldo19",  "ldo%s19", &pmic5_pldo_lv,   "vdd-l11-l17-l18-l19"),
1185 	{}
1186 };
1187 
1188 static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = {
1189 	RPMH_VREG("smps1",  "smp%s1",  &pmic5_ftsmps520, "vdd-s1"),
1190 	RPMH_VREG("smps2",  "smp%s2",  &pmic5_ftsmps520, "vdd-s2"),
1191 	RPMH_VREG("smps3",  "smp%s3",  &pmic5_hfsmps510, "vdd-s3"),
1192 	RPMH_VREG("ldo1",   "ldo%s1",  &pmic5_nldo,      "vdd-l1-l2"),
1193 	RPMH_VREG("ldo2",   "ldo%s2",  &pmic5_nldo,      "vdd-l1-l2"),
1194 	RPMH_VREG("ldo3",   "ldo%s3",  &pmic5_nldo,      "vdd-l3"),
1195 	RPMH_VREG("ldo4",   "ldo%s4",  &pmic5_pldo_lv,   "vdd-l4"),
1196 	RPMH_VREG("ldo5",   "ldo%s5",  &pmic5_nldo,      "vdd-l5-l6"),
1197 	RPMH_VREG("ldo6",   "ldo%s6",  &pmic5_nldo,      "vdd-l5-l6"),
1198 	RPMH_VREG("ldo7",   "ldo%s7",  &pmic5_pldo,      "vdd-l7-bob"),
1199 	{}
1200 };
1201 
1202 static int rpmh_regulator_probe(struct platform_device *pdev)
1203 {
1204 	struct device *dev = &pdev->dev;
1205 	const struct rpmh_vreg_init_data *vreg_data;
1206 	struct device_node *node;
1207 	struct rpmh_vreg *vreg;
1208 	const char *pmic_id;
1209 	int ret;
1210 
1211 	vreg_data = of_device_get_match_data(dev);
1212 	if (!vreg_data)
1213 		return -ENODEV;
1214 
1215 	ret = of_property_read_string(dev->of_node, "qcom,pmic-id", &pmic_id);
1216 	if (ret < 0) {
1217 		dev_err(dev, "qcom,pmic-id missing in DT node\n");
1218 		return ret;
1219 	}
1220 
1221 	for_each_available_child_of_node(dev->of_node, node) {
1222 		vreg = devm_kzalloc(dev, sizeof(*vreg), GFP_KERNEL);
1223 		if (!vreg) {
1224 			of_node_put(node);
1225 			return -ENOMEM;
1226 		}
1227 
1228 		ret = rpmh_regulator_init_vreg(vreg, dev, node, pmic_id,
1229 						vreg_data);
1230 		if (ret < 0) {
1231 			of_node_put(node);
1232 			return ret;
1233 		}
1234 	}
1235 
1236 	return 0;
1237 }
1238 
1239 static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = {
1240 	{
1241 		.compatible = "qcom,pm8005-rpmh-regulators",
1242 		.data = pm8005_vreg_data,
1243 	},
1244 	{
1245 		.compatible = "qcom,pm8009-rpmh-regulators",
1246 		.data = pm8009_vreg_data,
1247 	},
1248 	{
1249 		.compatible = "qcom,pm8009-1-rpmh-regulators",
1250 		.data = pm8009_1_vreg_data,
1251 	},
1252 	{
1253 		.compatible = "qcom,pm8150-rpmh-regulators",
1254 		.data = pm8150_vreg_data,
1255 	},
1256 	{
1257 		.compatible = "qcom,pm8150l-rpmh-regulators",
1258 		.data = pm8150l_vreg_data,
1259 	},
1260 	{
1261 		.compatible = "qcom,pm8350-rpmh-regulators",
1262 		.data = pm8350_vreg_data,
1263 	},
1264 	{
1265 		.compatible = "qcom,pm8350c-rpmh-regulators",
1266 		.data = pm8350c_vreg_data,
1267 	},
1268 	{
1269 		.compatible = "qcom,pm8450-rpmh-regulators",
1270 		.data = pm8450_vreg_data,
1271 	},
1272 	{
1273 		.compatible = "qcom,pm8998-rpmh-regulators",
1274 		.data = pm8998_vreg_data,
1275 	},
1276 	{
1277 		.compatible = "qcom,pmg1110-rpmh-regulators",
1278 		.data = pmg1110_vreg_data,
1279 	},
1280 	{
1281 		.compatible = "qcom,pmi8998-rpmh-regulators",
1282 		.data = pmi8998_vreg_data,
1283 	},
1284 	{
1285 		.compatible = "qcom,pm6150-rpmh-regulators",
1286 		.data = pm6150_vreg_data,
1287 	},
1288 	{
1289 		.compatible = "qcom,pm6150l-rpmh-regulators",
1290 		.data = pm6150l_vreg_data,
1291 	},
1292 	{
1293 		.compatible = "qcom,pm6350-rpmh-regulators",
1294 		.data = pm6350_vreg_data,
1295 	},
1296 	{
1297 		.compatible = "qcom,pmc8180-rpmh-regulators",
1298 		.data = pm8150_vreg_data,
1299 	},
1300 	{
1301 		.compatible = "qcom,pmc8180c-rpmh-regulators",
1302 		.data = pm8150l_vreg_data,
1303 	},
1304 	{
1305 		.compatible = "qcom,pmm8155au-rpmh-regulators",
1306 		.data = pmm8155au_vreg_data,
1307 	},
1308 	{
1309 		.compatible = "qcom,pmx55-rpmh-regulators",
1310 		.data = pmx55_vreg_data,
1311 	},
1312 	{
1313 		.compatible = "qcom,pmx65-rpmh-regulators",
1314 		.data = pmx65_vreg_data,
1315 	},
1316 	{
1317 		.compatible = "qcom,pm7325-rpmh-regulators",
1318 		.data = pm7325_vreg_data,
1319 	},
1320 	{
1321 		.compatible = "qcom,pmr735a-rpmh-regulators",
1322 		.data = pmr735a_vreg_data,
1323 	},
1324 	{}
1325 };
1326 MODULE_DEVICE_TABLE(of, rpmh_regulator_match_table);
1327 
1328 static struct platform_driver rpmh_regulator_driver = {
1329 	.driver = {
1330 		.name = "qcom-rpmh-regulator",
1331 		.of_match_table	= of_match_ptr(rpmh_regulator_match_table),
1332 	},
1333 	.probe = rpmh_regulator_probe,
1334 };
1335 module_platform_driver(rpmh_regulator_driver);
1336 
1337 MODULE_DESCRIPTION("Qualcomm RPMh regulator driver");
1338 MODULE_LICENSE("GPL v2");
1339