1 /*
2  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software
16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
17  */
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/err.h>
22 #include <linux/of.h>
23 #include <linux/of_device.h>
24 #include <linux/regulator/of_regulator.h>
25 #include <linux/platform_device.h>
26 #include <linux/regulator/driver.h>
27 #include <linux/regulator/machine.h>
28 #include <linux/regulator/pfuze100.h>
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
31 #include <linux/regmap.h>
32 
33 #define PFUZE_NUMREGS		128
34 #define PFUZE100_VOL_OFFSET	0
35 #define PFUZE100_STANDBY_OFFSET	1
36 #define PFUZE100_MODE_OFFSET	3
37 #define PFUZE100_CONF_OFFSET	4
38 
39 #define PFUZE100_DEVICEID	0x0
40 #define PFUZE100_REVID		0x3
41 #define PFUZE100_FABID		0x4
42 
43 #define PFUZE100_SW1ABVOL	0x20
44 #define PFUZE100_SW1CVOL	0x2e
45 #define PFUZE100_SW2VOL		0x35
46 #define PFUZE100_SW3AVOL	0x3c
47 #define PFUZE100_SW3BVOL	0x43
48 #define PFUZE100_SW4VOL		0x4a
49 #define PFUZE100_SWBSTCON1	0x66
50 #define PFUZE100_VREFDDRCON	0x6a
51 #define PFUZE100_VSNVSVOL	0x6b
52 #define PFUZE100_VGEN1VOL	0x6c
53 #define PFUZE100_VGEN2VOL	0x6d
54 #define PFUZE100_VGEN3VOL	0x6e
55 #define PFUZE100_VGEN4VOL	0x6f
56 #define PFUZE100_VGEN5VOL	0x70
57 #define PFUZE100_VGEN6VOL	0x71
58 
59 enum chips { PFUZE100, PFUZE200 };
60 
61 struct pfuze_regulator {
62 	struct regulator_desc desc;
63 	unsigned char stby_reg;
64 	unsigned char stby_mask;
65 };
66 
67 struct pfuze_chip {
68 	int	chip_id;
69 	struct regmap *regmap;
70 	struct device *dev;
71 	struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
72 	struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
73 };
74 
75 static const int pfuze100_swbst[] = {
76 	5000000, 5050000, 5100000, 5150000,
77 };
78 
79 static const int pfuze100_vsnvs[] = {
80 	1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
81 };
82 
83 static const struct i2c_device_id pfuze_device_id[] = {
84 	{.name = "pfuze100", .driver_data = PFUZE100},
85 	{.name = "pfuze200", .driver_data = PFUZE200},
86 	{ }
87 };
88 MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
89 
90 static const struct of_device_id pfuze_dt_ids[] = {
91 	{ .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
92 	{ .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
93 	{ }
94 };
95 MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
96 
97 static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
98 {
99 	struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
100 	int id = rdev_get_id(rdev);
101 	unsigned int ramp_bits;
102 	int ret;
103 
104 	if (id < PFUZE100_SWBST) {
105 		ramp_delay = 12500 / ramp_delay;
106 		ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
107 		ret = regmap_update_bits(pfuze100->regmap,
108 					 rdev->desc->vsel_reg + 4,
109 					 0xc0, ramp_bits << 6);
110 		if (ret < 0)
111 			dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
112 	} else
113 		ret = -EACCES;
114 
115 	return ret;
116 }
117 
118 static struct regulator_ops pfuze100_ldo_regulator_ops = {
119 	.enable = regulator_enable_regmap,
120 	.disable = regulator_disable_regmap,
121 	.is_enabled = regulator_is_enabled_regmap,
122 	.list_voltage = regulator_list_voltage_linear,
123 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
124 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
125 };
126 
127 static struct regulator_ops pfuze100_fixed_regulator_ops = {
128 	.list_voltage = regulator_list_voltage_linear,
129 };
130 
131 static struct regulator_ops pfuze100_sw_regulator_ops = {
132 	.list_voltage = regulator_list_voltage_linear,
133 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
134 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
135 	.set_voltage_time_sel = regulator_set_voltage_time_sel,
136 	.set_ramp_delay = pfuze100_set_ramp_delay,
137 };
138 
139 static struct regulator_ops pfuze100_swb_regulator_ops = {
140 	.list_voltage = regulator_list_voltage_table,
141 	.map_voltage = regulator_map_voltage_ascend,
142 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
143 	.get_voltage_sel = regulator_get_voltage_sel_regmap,
144 
145 };
146 
147 #define PFUZE100_FIXED_REG(_chip, _name, base, voltage)	\
148 	[_chip ## _ ## _name] = {	\
149 		.desc = {	\
150 			.name = #_name,	\
151 			.n_voltages = 1,	\
152 			.ops = &pfuze100_fixed_regulator_ops,	\
153 			.type = REGULATOR_VOLTAGE,	\
154 			.id = _chip ## _ ## _name,	\
155 			.owner = THIS_MODULE,	\
156 			.min_uV = (voltage),	\
157 			.enable_reg = (base),	\
158 			.enable_mask = 0x10,	\
159 		},	\
160 	}
161 
162 #define PFUZE100_SW_REG(_chip, _name, base, min, max, step)	\
163 	[_chip ## _ ## _name] = {	\
164 		.desc = {	\
165 			.name = #_name,\
166 			.n_voltages = ((max) - (min)) / (step) + 1,	\
167 			.ops = &pfuze100_sw_regulator_ops,	\
168 			.type = REGULATOR_VOLTAGE,	\
169 			.id = _chip ## _ ## _name,	\
170 			.owner = THIS_MODULE,	\
171 			.min_uV = (min),	\
172 			.uV_step = (step),	\
173 			.vsel_reg = (base) + PFUZE100_VOL_OFFSET,	\
174 			.vsel_mask = 0x3f,	\
175 		},	\
176 		.stby_reg = (base) + PFUZE100_STANDBY_OFFSET,	\
177 		.stby_mask = 0x3f,	\
178 	}
179 
180 #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages)	\
181 	[_chip ## _ ##  _name] = {	\
182 		.desc = {	\
183 			.name = #_name,	\
184 			.n_voltages = ARRAY_SIZE(voltages),	\
185 			.ops = &pfuze100_swb_regulator_ops,	\
186 			.type = REGULATOR_VOLTAGE,	\
187 			.id = _chip ## _ ## _name,	\
188 			.owner = THIS_MODULE,	\
189 			.volt_table = voltages,	\
190 			.vsel_reg = (base),	\
191 			.vsel_mask = (mask),	\
192 		},	\
193 	}
194 
195 #define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step)	\
196 	[_chip ## _ ## _name] = {	\
197 		.desc = {	\
198 			.name = #_name,	\
199 			.n_voltages = ((max) - (min)) / (step) + 1,	\
200 			.ops = &pfuze100_ldo_regulator_ops,	\
201 			.type = REGULATOR_VOLTAGE,	\
202 			.id = _chip ## _ ## _name,	\
203 			.owner = THIS_MODULE,	\
204 			.min_uV = (min),	\
205 			.uV_step = (step),	\
206 			.vsel_reg = (base),	\
207 			.vsel_mask = 0xf,	\
208 			.enable_reg = (base),	\
209 			.enable_mask = 0x10,	\
210 		},	\
211 		.stby_reg = (base),	\
212 		.stby_mask = 0x20,	\
213 	}
214 
215 /* PFUZE100 */
216 static struct pfuze_regulator pfuze100_regulators[] = {
217 	PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
218 	PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
219 	PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
220 	PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
221 	PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
222 	PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
223 	PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
224 	PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
225 	PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
226 	PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
227 	PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
228 	PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
229 	PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
230 	PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
231 	PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
232 };
233 
234 static struct pfuze_regulator pfuze200_regulators[] = {
235 	PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
236 	PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
237 	PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
238 	PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
239 	PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
240 	PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
241 	PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
242 	PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
243 	PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
244 	PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
245 	PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
246 	PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
247 	PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
248 };
249 
250 static struct pfuze_regulator *pfuze_regulators;
251 
252 #ifdef CONFIG_OF
253 /* PFUZE100 */
254 static struct of_regulator_match pfuze100_matches[] = {
255 	{ .name = "sw1ab",	},
256 	{ .name = "sw1c",	},
257 	{ .name = "sw2",	},
258 	{ .name = "sw3a",	},
259 	{ .name = "sw3b",	},
260 	{ .name = "sw4",	},
261 	{ .name = "swbst",	},
262 	{ .name = "vsnvs",	},
263 	{ .name = "vrefddr",	},
264 	{ .name = "vgen1",	},
265 	{ .name = "vgen2",	},
266 	{ .name = "vgen3",	},
267 	{ .name = "vgen4",	},
268 	{ .name = "vgen5",	},
269 	{ .name = "vgen6",	},
270 };
271 
272 /* PFUZE200 */
273 static struct of_regulator_match pfuze200_matches[] = {
274 
275 	{ .name = "sw1ab",	},
276 	{ .name = "sw2",	},
277 	{ .name = "sw3a",	},
278 	{ .name = "sw3b",	},
279 	{ .name = "swbst",	},
280 	{ .name = "vsnvs",	},
281 	{ .name = "vrefddr",	},
282 	{ .name = "vgen1",	},
283 	{ .name = "vgen2",	},
284 	{ .name = "vgen3",	},
285 	{ .name = "vgen4",	},
286 	{ .name = "vgen5",	},
287 	{ .name = "vgen6",	},
288 };
289 
290 static struct of_regulator_match *pfuze_matches;
291 
292 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
293 {
294 	struct device *dev = chip->dev;
295 	struct device_node *np, *parent;
296 	int ret;
297 
298 	np = of_node_get(dev->of_node);
299 	if (!np)
300 		return -EINVAL;
301 
302 	parent = of_get_child_by_name(np, "regulators");
303 	if (!parent) {
304 		dev_err(dev, "regulators node not found\n");
305 		return -EINVAL;
306 	}
307 
308 	switch (chip->chip_id) {
309 	case PFUZE200:
310 		pfuze_matches = pfuze200_matches;
311 		ret = of_regulator_match(dev, parent, pfuze200_matches,
312 					 ARRAY_SIZE(pfuze200_matches));
313 		break;
314 
315 	case PFUZE100:
316 	default:
317 		pfuze_matches = pfuze100_matches;
318 		ret = of_regulator_match(dev, parent, pfuze100_matches,
319 					 ARRAY_SIZE(pfuze100_matches));
320 		break;
321 	}
322 
323 	of_node_put(parent);
324 	if (ret < 0) {
325 		dev_err(dev, "Error parsing regulator init data: %d\n",
326 			ret);
327 		return ret;
328 	}
329 
330 	return 0;
331 }
332 
333 static inline struct regulator_init_data *match_init_data(int index)
334 {
335 	return pfuze_matches[index].init_data;
336 }
337 
338 static inline struct device_node *match_of_node(int index)
339 {
340 	return pfuze_matches[index].of_node;
341 }
342 #else
343 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
344 {
345 	return 0;
346 }
347 
348 static inline struct regulator_init_data *match_init_data(int index)
349 {
350 	return NULL;
351 }
352 
353 static inline struct device_node *match_of_node(int index)
354 {
355 	return NULL;
356 }
357 #endif
358 
359 static int pfuze_identify(struct pfuze_chip *pfuze_chip)
360 {
361 	unsigned int value;
362 	int ret;
363 
364 	ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
365 	if (ret)
366 		return ret;
367 
368 	if (((value & 0x0f) == 0x8) && (pfuze_chip->chip_id == PFUZE100)) {
369 		/*
370 		 * Freescale misprogrammed 1-3% of parts prior to week 8 of 2013
371 		 * as ID=8 in PFUZE100
372 		 */
373 		dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
374 	} else if ((value & 0x0f) != pfuze_chip->chip_id) {
375 		/* device id NOT match with your setting */
376 		dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
377 		return -ENODEV;
378 	}
379 
380 	ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
381 	if (ret)
382 		return ret;
383 	dev_info(pfuze_chip->dev,
384 		 "Full layer: %x, Metal layer: %x\n",
385 		 (value & 0xf0) >> 4, value & 0x0f);
386 
387 	ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
388 	if (ret)
389 		return ret;
390 	dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
391 		 (value & 0xc) >> 2, value & 0x3);
392 
393 	return 0;
394 }
395 
396 static const struct regmap_config pfuze_regmap_config = {
397 	.reg_bits = 8,
398 	.val_bits = 8,
399 	.max_register = PFUZE_NUMREGS - 1,
400 	.cache_type = REGCACHE_RBTREE,
401 };
402 
403 static int pfuze100_regulator_probe(struct i2c_client *client,
404 				    const struct i2c_device_id *id)
405 {
406 	struct pfuze_chip *pfuze_chip;
407 	struct pfuze_regulator_platform_data *pdata =
408 	    dev_get_platdata(&client->dev);
409 	struct regulator_config config = { };
410 	int i, ret;
411 	const struct of_device_id *match;
412 	u32 regulator_num;
413 	u32 sw_check_start, sw_check_end;
414 
415 	pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
416 			GFP_KERNEL);
417 	if (!pfuze_chip)
418 		return -ENOMEM;
419 
420 	if (client->dev.of_node) {
421 		match = of_match_device(of_match_ptr(pfuze_dt_ids),
422 				&client->dev);
423 		if (!match) {
424 			dev_err(&client->dev, "Error: No device match found\n");
425 			return -ENODEV;
426 		}
427 		pfuze_chip->chip_id = (int)(long)match->data;
428 	} else if (id) {
429 		pfuze_chip->chip_id = id->driver_data;
430 	} else {
431 		dev_err(&client->dev, "No dts match or id table match found\n");
432 		return -ENODEV;
433 	}
434 
435 	i2c_set_clientdata(client, pfuze_chip);
436 	pfuze_chip->dev = &client->dev;
437 
438 	pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
439 	if (IS_ERR(pfuze_chip->regmap)) {
440 		ret = PTR_ERR(pfuze_chip->regmap);
441 		dev_err(&client->dev,
442 			"regmap allocation failed with err %d\n", ret);
443 		return ret;
444 	}
445 
446 	ret = pfuze_identify(pfuze_chip);
447 	if (ret) {
448 		dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
449 		return ret;
450 	}
451 
452 	/* use the right regulators after identify the right device */
453 	switch (pfuze_chip->chip_id) {
454 	case PFUZE200:
455 		pfuze_regulators = pfuze200_regulators;
456 		regulator_num = ARRAY_SIZE(pfuze200_regulators);
457 		sw_check_start = PFUZE200_SW2;
458 		sw_check_end = PFUZE200_SW3B;
459 		break;
460 
461 	case PFUZE100:
462 	default:
463 		pfuze_regulators = pfuze100_regulators;
464 		regulator_num = ARRAY_SIZE(pfuze100_regulators);
465 		sw_check_start = PFUZE100_SW2;
466 		sw_check_end = PFUZE100_SW4;
467 		break;
468 	}
469 	dev_info(&client->dev, "pfuze%s found.\n",
470 		(pfuze_chip->chip_id == PFUZE100) ? "100" : "200");
471 
472 	memcpy(pfuze_chip->regulator_descs, pfuze_regulators,
473 		sizeof(pfuze_chip->regulator_descs));
474 
475 	ret = pfuze_parse_regulators_dt(pfuze_chip);
476 	if (ret)
477 		return ret;
478 
479 	for (i = 0; i < regulator_num; i++) {
480 		struct regulator_init_data *init_data;
481 		struct regulator_desc *desc;
482 		int val;
483 
484 		desc = &pfuze_chip->regulator_descs[i].desc;
485 
486 		if (pdata)
487 			init_data = pdata->init_data[i];
488 		else
489 			init_data = match_init_data(i);
490 
491 		/* SW2~SW4 high bit check and modify the voltage value table */
492 		if (i >= sw_check_start && i <= sw_check_end) {
493 			regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
494 			if (val & 0x40) {
495 				desc->min_uV = 800000;
496 				desc->uV_step = 50000;
497 				desc->n_voltages = 51;
498 			}
499 		}
500 
501 		config.dev = &client->dev;
502 		config.init_data = init_data;
503 		config.driver_data = pfuze_chip;
504 		config.of_node = match_of_node(i);
505 
506 		pfuze_chip->regulators[i] =
507 			devm_regulator_register(&client->dev, desc, &config);
508 		if (IS_ERR(pfuze_chip->regulators[i])) {
509 			dev_err(&client->dev, "register regulator%s failed\n",
510 				pfuze_regulators[i].desc.name);
511 			return PTR_ERR(pfuze_chip->regulators[i]);
512 		}
513 	}
514 
515 	return 0;
516 }
517 
518 static struct i2c_driver pfuze_driver = {
519 	.id_table = pfuze_device_id,
520 	.driver = {
521 		.name = "pfuze100-regulator",
522 		.owner = THIS_MODULE,
523 		.of_match_table = pfuze_dt_ids,
524 	},
525 	.probe = pfuze100_regulator_probe,
526 };
527 module_i2c_driver(pfuze_driver);
528 
529 MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
530 MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/PFUZE200 PMIC");
531 MODULE_LICENSE("GPL v2");
532 MODULE_ALIAS("i2c:pfuze100-regulator");
533