1 /* 2 * Driver for Regulator part of Palmas PMIC Chips 3 * 4 * Copyright 2011-2013 Texas Instruments Inc. 5 * 6 * Author: Graeme Gregory <gg@slimlogic.co.uk> 7 * Author: Ian Lartey <ian@slimlogic.co.uk> 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License as published by the 11 * Free Software Foundation; either version 2 of the License, or (at your 12 * option) any later version. 13 * 14 */ 15 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/init.h> 19 #include <linux/err.h> 20 #include <linux/platform_device.h> 21 #include <linux/regulator/driver.h> 22 #include <linux/regulator/machine.h> 23 #include <linux/slab.h> 24 #include <linux/regmap.h> 25 #include <linux/mfd/palmas.h> 26 #include <linux/of.h> 27 #include <linux/of_platform.h> 28 #include <linux/regulator/of_regulator.h> 29 30 static const struct regulator_linear_range smps_low_ranges[] = { 31 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), 32 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0), 33 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000), 34 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0), 35 }; 36 37 static const struct regulator_linear_range smps_high_ranges[] = { 38 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), 39 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0), 40 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000), 41 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0), 42 }; 43 44 static struct palmas_regs_info palmas_generic_regs_info[] = { 45 { 46 .name = "SMPS12", 47 .sname = "smps1-in", 48 .vsel_addr = PALMAS_SMPS12_VOLTAGE, 49 .ctrl_addr = PALMAS_SMPS12_CTRL, 50 .tstep_addr = PALMAS_SMPS12_TSTEP, 51 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12, 52 }, 53 { 54 .name = "SMPS123", 55 .sname = "smps1-in", 56 .vsel_addr = PALMAS_SMPS12_VOLTAGE, 57 .ctrl_addr = PALMAS_SMPS12_CTRL, 58 .tstep_addr = PALMAS_SMPS12_TSTEP, 59 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12, 60 }, 61 { 62 .name = "SMPS3", 63 .sname = "smps3-in", 64 .vsel_addr = PALMAS_SMPS3_VOLTAGE, 65 .ctrl_addr = PALMAS_SMPS3_CTRL, 66 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3, 67 }, 68 { 69 .name = "SMPS45", 70 .sname = "smps4-in", 71 .vsel_addr = PALMAS_SMPS45_VOLTAGE, 72 .ctrl_addr = PALMAS_SMPS45_CTRL, 73 .tstep_addr = PALMAS_SMPS45_TSTEP, 74 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45, 75 }, 76 { 77 .name = "SMPS457", 78 .sname = "smps4-in", 79 .vsel_addr = PALMAS_SMPS45_VOLTAGE, 80 .ctrl_addr = PALMAS_SMPS45_CTRL, 81 .tstep_addr = PALMAS_SMPS45_TSTEP, 82 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45, 83 }, 84 { 85 .name = "SMPS6", 86 .sname = "smps6-in", 87 .vsel_addr = PALMAS_SMPS6_VOLTAGE, 88 .ctrl_addr = PALMAS_SMPS6_CTRL, 89 .tstep_addr = PALMAS_SMPS6_TSTEP, 90 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6, 91 }, 92 { 93 .name = "SMPS7", 94 .sname = "smps7-in", 95 .vsel_addr = PALMAS_SMPS7_VOLTAGE, 96 .ctrl_addr = PALMAS_SMPS7_CTRL, 97 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7, 98 }, 99 { 100 .name = "SMPS8", 101 .sname = "smps8-in", 102 .vsel_addr = PALMAS_SMPS8_VOLTAGE, 103 .ctrl_addr = PALMAS_SMPS8_CTRL, 104 .tstep_addr = PALMAS_SMPS8_TSTEP, 105 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8, 106 }, 107 { 108 .name = "SMPS9", 109 .sname = "smps9-in", 110 .vsel_addr = PALMAS_SMPS9_VOLTAGE, 111 .ctrl_addr = PALMAS_SMPS9_CTRL, 112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9, 113 }, 114 { 115 .name = "SMPS10_OUT2", 116 .sname = "smps10-in", 117 .ctrl_addr = PALMAS_SMPS10_CTRL, 118 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10, 119 }, 120 { 121 .name = "SMPS10_OUT1", 122 .sname = "smps10-out2", 123 .ctrl_addr = PALMAS_SMPS10_CTRL, 124 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10, 125 }, 126 { 127 .name = "LDO1", 128 .sname = "ldo1-in", 129 .vsel_addr = PALMAS_LDO1_VOLTAGE, 130 .ctrl_addr = PALMAS_LDO1_CTRL, 131 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1, 132 }, 133 { 134 .name = "LDO2", 135 .sname = "ldo2-in", 136 .vsel_addr = PALMAS_LDO2_VOLTAGE, 137 .ctrl_addr = PALMAS_LDO2_CTRL, 138 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2, 139 }, 140 { 141 .name = "LDO3", 142 .sname = "ldo3-in", 143 .vsel_addr = PALMAS_LDO3_VOLTAGE, 144 .ctrl_addr = PALMAS_LDO3_CTRL, 145 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3, 146 }, 147 { 148 .name = "LDO4", 149 .sname = "ldo4-in", 150 .vsel_addr = PALMAS_LDO4_VOLTAGE, 151 .ctrl_addr = PALMAS_LDO4_CTRL, 152 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4, 153 }, 154 { 155 .name = "LDO5", 156 .sname = "ldo5-in", 157 .vsel_addr = PALMAS_LDO5_VOLTAGE, 158 .ctrl_addr = PALMAS_LDO5_CTRL, 159 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5, 160 }, 161 { 162 .name = "LDO6", 163 .sname = "ldo6-in", 164 .vsel_addr = PALMAS_LDO6_VOLTAGE, 165 .ctrl_addr = PALMAS_LDO6_CTRL, 166 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6, 167 }, 168 { 169 .name = "LDO7", 170 .sname = "ldo7-in", 171 .vsel_addr = PALMAS_LDO7_VOLTAGE, 172 .ctrl_addr = PALMAS_LDO7_CTRL, 173 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7, 174 }, 175 { 176 .name = "LDO8", 177 .sname = "ldo8-in", 178 .vsel_addr = PALMAS_LDO8_VOLTAGE, 179 .ctrl_addr = PALMAS_LDO8_CTRL, 180 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8, 181 }, 182 { 183 .name = "LDO9", 184 .sname = "ldo9-in", 185 .vsel_addr = PALMAS_LDO9_VOLTAGE, 186 .ctrl_addr = PALMAS_LDO9_CTRL, 187 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9, 188 }, 189 { 190 .name = "LDOLN", 191 .sname = "ldoln-in", 192 .vsel_addr = PALMAS_LDOLN_VOLTAGE, 193 .ctrl_addr = PALMAS_LDOLN_CTRL, 194 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN, 195 }, 196 { 197 .name = "LDOUSB", 198 .sname = "ldousb-in", 199 .vsel_addr = PALMAS_LDOUSB_VOLTAGE, 200 .ctrl_addr = PALMAS_LDOUSB_CTRL, 201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB, 202 }, 203 { 204 .name = "REGEN1", 205 .ctrl_addr = PALMAS_REGEN1_CTRL, 206 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1, 207 }, 208 { 209 .name = "REGEN2", 210 .ctrl_addr = PALMAS_REGEN2_CTRL, 211 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2, 212 }, 213 { 214 .name = "REGEN3", 215 .ctrl_addr = PALMAS_REGEN3_CTRL, 216 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3, 217 }, 218 { 219 .name = "SYSEN1", 220 .ctrl_addr = PALMAS_SYSEN1_CTRL, 221 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1, 222 }, 223 { 224 .name = "SYSEN2", 225 .ctrl_addr = PALMAS_SYSEN2_CTRL, 226 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2, 227 }, 228 }; 229 230 static struct palmas_regs_info tps65917_regs_info[] = { 231 { 232 .name = "SMPS1", 233 .sname = "smps1-in", 234 .vsel_addr = TPS65917_SMPS1_VOLTAGE, 235 .ctrl_addr = TPS65917_SMPS1_CTRL, 236 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1, 237 }, 238 { 239 .name = "SMPS2", 240 .sname = "smps2-in", 241 .vsel_addr = TPS65917_SMPS2_VOLTAGE, 242 .ctrl_addr = TPS65917_SMPS2_CTRL, 243 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2, 244 }, 245 { 246 .name = "SMPS3", 247 .sname = "smps3-in", 248 .vsel_addr = TPS65917_SMPS3_VOLTAGE, 249 .ctrl_addr = TPS65917_SMPS3_CTRL, 250 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3, 251 }, 252 { 253 .name = "SMPS4", 254 .sname = "smps4-in", 255 .vsel_addr = TPS65917_SMPS4_VOLTAGE, 256 .ctrl_addr = TPS65917_SMPS4_CTRL, 257 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4, 258 }, 259 { 260 .name = "SMPS5", 261 .sname = "smps5-in", 262 .vsel_addr = TPS65917_SMPS5_VOLTAGE, 263 .ctrl_addr = TPS65917_SMPS5_CTRL, 264 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5, 265 }, 266 { 267 .name = "SMPS12", 268 .sname = "smps1-in", 269 .vsel_addr = TPS65917_SMPS1_VOLTAGE, 270 .ctrl_addr = TPS65917_SMPS1_CTRL, 271 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS12, 272 }, 273 { 274 .name = "LDO1", 275 .sname = "ldo1-in", 276 .vsel_addr = TPS65917_LDO1_VOLTAGE, 277 .ctrl_addr = TPS65917_LDO1_CTRL, 278 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1, 279 }, 280 { 281 .name = "LDO2", 282 .sname = "ldo2-in", 283 .vsel_addr = TPS65917_LDO2_VOLTAGE, 284 .ctrl_addr = TPS65917_LDO2_CTRL, 285 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2, 286 }, 287 { 288 .name = "LDO3", 289 .sname = "ldo3-in", 290 .vsel_addr = TPS65917_LDO3_VOLTAGE, 291 .ctrl_addr = TPS65917_LDO3_CTRL, 292 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3, 293 }, 294 { 295 .name = "LDO4", 296 .sname = "ldo4-in", 297 .vsel_addr = TPS65917_LDO4_VOLTAGE, 298 .ctrl_addr = TPS65917_LDO4_CTRL, 299 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4, 300 }, 301 { 302 .name = "LDO5", 303 .sname = "ldo5-in", 304 .vsel_addr = TPS65917_LDO5_VOLTAGE, 305 .ctrl_addr = TPS65917_LDO5_CTRL, 306 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5, 307 }, 308 { 309 .name = "REGEN1", 310 .ctrl_addr = TPS65917_REGEN1_CTRL, 311 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1, 312 }, 313 { 314 .name = "REGEN2", 315 .ctrl_addr = TPS65917_REGEN2_CTRL, 316 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2, 317 }, 318 { 319 .name = "REGEN3", 320 .ctrl_addr = TPS65917_REGEN3_CTRL, 321 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3, 322 }, 323 }; 324 325 #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ 326 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \ 327 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \ 328 .reg_offset = _offset, \ 329 .bit_pos = _pos, \ 330 } 331 332 static struct palmas_sleep_requestor_info palma_sleep_req_info[] = { 333 EXTERNAL_REQUESTOR(REGEN1, 0, 0), 334 EXTERNAL_REQUESTOR(REGEN2, 0, 1), 335 EXTERNAL_REQUESTOR(SYSEN1, 0, 2), 336 EXTERNAL_REQUESTOR(SYSEN2, 0, 3), 337 EXTERNAL_REQUESTOR(CLK32KG, 0, 4), 338 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5), 339 EXTERNAL_REQUESTOR(REGEN3, 0, 6), 340 EXTERNAL_REQUESTOR(SMPS12, 1, 0), 341 EXTERNAL_REQUESTOR(SMPS3, 1, 1), 342 EXTERNAL_REQUESTOR(SMPS45, 1, 2), 343 EXTERNAL_REQUESTOR(SMPS6, 1, 3), 344 EXTERNAL_REQUESTOR(SMPS7, 1, 4), 345 EXTERNAL_REQUESTOR(SMPS8, 1, 5), 346 EXTERNAL_REQUESTOR(SMPS9, 1, 6), 347 EXTERNAL_REQUESTOR(SMPS10, 1, 7), 348 EXTERNAL_REQUESTOR(LDO1, 2, 0), 349 EXTERNAL_REQUESTOR(LDO2, 2, 1), 350 EXTERNAL_REQUESTOR(LDO3, 2, 2), 351 EXTERNAL_REQUESTOR(LDO4, 2, 3), 352 EXTERNAL_REQUESTOR(LDO5, 2, 4), 353 EXTERNAL_REQUESTOR(LDO6, 2, 5), 354 EXTERNAL_REQUESTOR(LDO7, 2, 6), 355 EXTERNAL_REQUESTOR(LDO8, 2, 7), 356 EXTERNAL_REQUESTOR(LDO9, 3, 0), 357 EXTERNAL_REQUESTOR(LDOLN, 3, 1), 358 EXTERNAL_REQUESTOR(LDOUSB, 3, 2), 359 }; 360 361 #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \ 362 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \ 363 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \ 364 .reg_offset = _offset, \ 365 .bit_pos = _pos, \ 366 } 367 368 static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = { 369 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0), 370 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1), 371 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6), 372 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0), 373 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1), 374 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2), 375 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3), 376 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4), 377 EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5), 378 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0), 379 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1), 380 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2), 381 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3), 382 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4), 383 }; 384 385 static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500}; 386 387 #define SMPS_CTRL_MODE_OFF 0x00 388 #define SMPS_CTRL_MODE_ON 0x01 389 #define SMPS_CTRL_MODE_ECO 0x02 390 #define SMPS_CTRL_MODE_PWM 0x03 391 392 #define PALMAS_SMPS_NUM_VOLTAGES 122 393 #define PALMAS_SMPS10_NUM_VOLTAGES 2 394 #define PALMAS_LDO_NUM_VOLTAGES 50 395 396 #define SMPS10_VSEL (1<<3) 397 #define SMPS10_BOOST_EN (1<<2) 398 #define SMPS10_BYPASS_EN (1<<1) 399 #define SMPS10_SWITCH_EN (1<<0) 400 401 #define REGULATOR_SLAVE 0 402 403 static int palmas_smps_read(struct palmas *palmas, unsigned int reg, 404 unsigned int *dest) 405 { 406 unsigned int addr; 407 408 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); 409 410 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); 411 } 412 413 static int palmas_smps_write(struct palmas *palmas, unsigned int reg, 414 unsigned int value) 415 { 416 unsigned int addr; 417 418 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg); 419 420 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); 421 } 422 423 static int palmas_ldo_read(struct palmas *palmas, unsigned int reg, 424 unsigned int *dest) 425 { 426 unsigned int addr; 427 428 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); 429 430 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest); 431 } 432 433 static int palmas_ldo_write(struct palmas *palmas, unsigned int reg, 434 unsigned int value) 435 { 436 unsigned int addr; 437 438 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg); 439 440 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value); 441 } 442 443 static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode) 444 { 445 int id = rdev_get_id(dev); 446 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 447 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 448 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 449 unsigned int reg; 450 bool rail_enable = true; 451 452 palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, ®); 453 454 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 455 456 if (reg == SMPS_CTRL_MODE_OFF) 457 rail_enable = false; 458 459 switch (mode) { 460 case REGULATOR_MODE_NORMAL: 461 reg |= SMPS_CTRL_MODE_ON; 462 break; 463 case REGULATOR_MODE_IDLE: 464 reg |= SMPS_CTRL_MODE_ECO; 465 break; 466 case REGULATOR_MODE_FAST: 467 reg |= SMPS_CTRL_MODE_PWM; 468 break; 469 default: 470 return -EINVAL; 471 } 472 473 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 474 if (rail_enable) 475 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg); 476 477 /* Switch the enable value to ensure this is used for enable */ 478 pmic->desc[id].enable_val = pmic->current_reg_mode[id]; 479 480 return 0; 481 } 482 483 static unsigned int palmas_get_mode_smps(struct regulator_dev *dev) 484 { 485 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 486 int id = rdev_get_id(dev); 487 unsigned int reg; 488 489 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 490 491 switch (reg) { 492 case SMPS_CTRL_MODE_ON: 493 return REGULATOR_MODE_NORMAL; 494 case SMPS_CTRL_MODE_ECO: 495 return REGULATOR_MODE_IDLE; 496 case SMPS_CTRL_MODE_PWM: 497 return REGULATOR_MODE_FAST; 498 } 499 500 return 0; 501 } 502 503 static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev, 504 int ramp_delay) 505 { 506 int id = rdev_get_id(rdev); 507 struct palmas_pmic *pmic = rdev_get_drvdata(rdev); 508 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 509 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 510 unsigned int reg = 0; 511 int ret; 512 513 /* SMPS3 and SMPS7 do not have tstep_addr setting */ 514 switch (id) { 515 case PALMAS_REG_SMPS3: 516 case PALMAS_REG_SMPS7: 517 return 0; 518 } 519 520 if (ramp_delay <= 0) 521 reg = 0; 522 else if (ramp_delay <= 2500) 523 reg = 3; 524 else if (ramp_delay <= 5000) 525 reg = 2; 526 else 527 reg = 1; 528 529 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg); 530 if (ret < 0) { 531 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret); 532 return ret; 533 } 534 535 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg]; 536 return ret; 537 } 538 539 static const struct regulator_ops palmas_ops_smps = { 540 .is_enabled = regulator_is_enabled_regmap, 541 .enable = regulator_enable_regmap, 542 .disable = regulator_disable_regmap, 543 .set_mode = palmas_set_mode_smps, 544 .get_mode = palmas_get_mode_smps, 545 .get_voltage_sel = regulator_get_voltage_sel_regmap, 546 .set_voltage_sel = regulator_set_voltage_sel_regmap, 547 .list_voltage = regulator_list_voltage_linear_range, 548 .map_voltage = regulator_map_voltage_linear_range, 549 .set_voltage_time_sel = regulator_set_voltage_time_sel, 550 .set_ramp_delay = palmas_smps_set_ramp_delay, 551 }; 552 553 static const struct regulator_ops palmas_ops_ext_control_smps = { 554 .set_mode = palmas_set_mode_smps, 555 .get_mode = palmas_get_mode_smps, 556 .get_voltage_sel = regulator_get_voltage_sel_regmap, 557 .set_voltage_sel = regulator_set_voltage_sel_regmap, 558 .list_voltage = regulator_list_voltage_linear_range, 559 .map_voltage = regulator_map_voltage_linear_range, 560 .set_voltage_time_sel = regulator_set_voltage_time_sel, 561 .set_ramp_delay = palmas_smps_set_ramp_delay, 562 }; 563 564 static const struct regulator_ops palmas_ops_smps10 = { 565 .is_enabled = regulator_is_enabled_regmap, 566 .enable = regulator_enable_regmap, 567 .disable = regulator_disable_regmap, 568 .get_voltage_sel = regulator_get_voltage_sel_regmap, 569 .set_voltage_sel = regulator_set_voltage_sel_regmap, 570 .list_voltage = regulator_list_voltage_linear, 571 .map_voltage = regulator_map_voltage_linear, 572 .set_bypass = regulator_set_bypass_regmap, 573 .get_bypass = regulator_get_bypass_regmap, 574 }; 575 576 static const struct regulator_ops tps65917_ops_smps = { 577 .is_enabled = regulator_is_enabled_regmap, 578 .enable = regulator_enable_regmap, 579 .disable = regulator_disable_regmap, 580 .set_mode = palmas_set_mode_smps, 581 .get_mode = palmas_get_mode_smps, 582 .get_voltage_sel = regulator_get_voltage_sel_regmap, 583 .set_voltage_sel = regulator_set_voltage_sel_regmap, 584 .list_voltage = regulator_list_voltage_linear_range, 585 .map_voltage = regulator_map_voltage_linear_range, 586 .set_voltage_time_sel = regulator_set_voltage_time_sel, 587 }; 588 589 static const struct regulator_ops tps65917_ops_ext_control_smps = { 590 .set_mode = palmas_set_mode_smps, 591 .get_mode = palmas_get_mode_smps, 592 .get_voltage_sel = regulator_get_voltage_sel_regmap, 593 .set_voltage_sel = regulator_set_voltage_sel_regmap, 594 .list_voltage = regulator_list_voltage_linear_range, 595 .map_voltage = regulator_map_voltage_linear_range, 596 }; 597 598 static int palmas_is_enabled_ldo(struct regulator_dev *dev) 599 { 600 int id = rdev_get_id(dev); 601 struct palmas_pmic *pmic = rdev_get_drvdata(dev); 602 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 603 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 604 unsigned int reg; 605 606 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, ®); 607 608 reg &= PALMAS_LDO1_CTRL_STATUS; 609 610 return !!(reg); 611 } 612 613 static const struct regulator_ops palmas_ops_ldo = { 614 .is_enabled = palmas_is_enabled_ldo, 615 .enable = regulator_enable_regmap, 616 .disable = regulator_disable_regmap, 617 .get_voltage_sel = regulator_get_voltage_sel_regmap, 618 .set_voltage_sel = regulator_set_voltage_sel_regmap, 619 .list_voltage = regulator_list_voltage_linear, 620 .map_voltage = regulator_map_voltage_linear, 621 }; 622 623 static const struct regulator_ops palmas_ops_ldo9 = { 624 .is_enabled = palmas_is_enabled_ldo, 625 .enable = regulator_enable_regmap, 626 .disable = regulator_disable_regmap, 627 .get_voltage_sel = regulator_get_voltage_sel_regmap, 628 .set_voltage_sel = regulator_set_voltage_sel_regmap, 629 .list_voltage = regulator_list_voltage_linear, 630 .map_voltage = regulator_map_voltage_linear, 631 .set_bypass = regulator_set_bypass_regmap, 632 .get_bypass = regulator_get_bypass_regmap, 633 }; 634 635 static const struct regulator_ops palmas_ops_ext_control_ldo = { 636 .get_voltage_sel = regulator_get_voltage_sel_regmap, 637 .set_voltage_sel = regulator_set_voltage_sel_regmap, 638 .list_voltage = regulator_list_voltage_linear, 639 .map_voltage = regulator_map_voltage_linear, 640 }; 641 642 static const struct regulator_ops palmas_ops_extreg = { 643 .is_enabled = regulator_is_enabled_regmap, 644 .enable = regulator_enable_regmap, 645 .disable = regulator_disable_regmap, 646 }; 647 648 static const struct regulator_ops palmas_ops_ext_control_extreg = { 649 }; 650 651 static const struct regulator_ops tps65917_ops_ldo = { 652 .is_enabled = palmas_is_enabled_ldo, 653 .enable = regulator_enable_regmap, 654 .disable = regulator_disable_regmap, 655 .get_voltage_sel = regulator_get_voltage_sel_regmap, 656 .set_voltage_sel = regulator_set_voltage_sel_regmap, 657 .list_voltage = regulator_list_voltage_linear, 658 .map_voltage = regulator_map_voltage_linear, 659 .set_voltage_time_sel = regulator_set_voltage_time_sel, 660 }; 661 662 static const struct regulator_ops tps65917_ops_ldo_1_2 = { 663 .is_enabled = palmas_is_enabled_ldo, 664 .enable = regulator_enable_regmap, 665 .disable = regulator_disable_regmap, 666 .get_voltage_sel = regulator_get_voltage_sel_regmap, 667 .set_voltage_sel = regulator_set_voltage_sel_regmap, 668 .list_voltage = regulator_list_voltage_linear, 669 .map_voltage = regulator_map_voltage_linear, 670 .set_voltage_time_sel = regulator_set_voltage_time_sel, 671 .set_bypass = regulator_set_bypass_regmap, 672 .get_bypass = regulator_get_bypass_regmap, 673 }; 674 675 static int palmas_regulator_config_external(struct palmas *palmas, int id, 676 struct palmas_reg_init *reg_init) 677 { 678 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 679 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 680 int ret; 681 682 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id, 683 reg_init->roof_floor, true); 684 if (ret < 0) 685 dev_err(palmas->dev, 686 "Ext control config for regulator %d failed %d\n", 687 id, ret); 688 return ret; 689 } 690 691 /* 692 * setup the hardware based sleep configuration of the SMPS/LDO regulators 693 * from the platform data. This is different to the software based control 694 * supported by the regulator framework as it is controlled by toggling 695 * pins on the PMIC such as PREQ, SYSEN, ... 696 */ 697 static int palmas_smps_init(struct palmas *palmas, int id, 698 struct palmas_reg_init *reg_init) 699 { 700 unsigned int reg; 701 int ret; 702 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 703 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 704 unsigned int addr = rinfo->ctrl_addr; 705 706 ret = palmas_smps_read(palmas, addr, ®); 707 if (ret) 708 return ret; 709 710 switch (id) { 711 case PALMAS_REG_SMPS10_OUT1: 712 case PALMAS_REG_SMPS10_OUT2: 713 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK; 714 if (reg_init->mode_sleep) 715 reg |= reg_init->mode_sleep << 716 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT; 717 break; 718 default: 719 if (reg_init->warm_reset) 720 reg |= PALMAS_SMPS12_CTRL_WR_S; 721 else 722 reg &= ~PALMAS_SMPS12_CTRL_WR_S; 723 724 if (reg_init->roof_floor) 725 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; 726 else 727 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN; 728 729 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK; 730 if (reg_init->mode_sleep) 731 reg |= reg_init->mode_sleep << 732 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT; 733 } 734 735 ret = palmas_smps_write(palmas, addr, reg); 736 if (ret) 737 return ret; 738 739 if (rinfo->vsel_addr && reg_init->vsel) { 740 741 reg = reg_init->vsel; 742 743 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg); 744 if (ret) 745 return ret; 746 } 747 748 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) && 749 (id != PALMAS_REG_SMPS10_OUT2)) { 750 /* Enable externally controlled regulator */ 751 ret = palmas_smps_read(palmas, addr, ®); 752 if (ret < 0) 753 return ret; 754 755 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) { 756 reg |= SMPS_CTRL_MODE_ON; 757 ret = palmas_smps_write(palmas, addr, reg); 758 if (ret < 0) 759 return ret; 760 } 761 return palmas_regulator_config_external(palmas, id, reg_init); 762 } 763 return 0; 764 } 765 766 static int palmas_ldo_init(struct palmas *palmas, int id, 767 struct palmas_reg_init *reg_init) 768 { 769 unsigned int reg; 770 unsigned int addr; 771 int ret; 772 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 773 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 774 775 addr = rinfo->ctrl_addr; 776 777 ret = palmas_ldo_read(palmas, addr, ®); 778 if (ret) 779 return ret; 780 781 if (reg_init->warm_reset) 782 reg |= PALMAS_LDO1_CTRL_WR_S; 783 else 784 reg &= ~PALMAS_LDO1_CTRL_WR_S; 785 786 if (reg_init->mode_sleep) 787 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP; 788 else 789 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP; 790 791 ret = palmas_ldo_write(palmas, addr, reg); 792 if (ret) 793 return ret; 794 795 if (reg_init->roof_floor) { 796 /* Enable externally controlled regulator */ 797 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE, 798 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE, 799 PALMAS_LDO1_CTRL_MODE_ACTIVE); 800 if (ret < 0) { 801 dev_err(palmas->dev, 802 "LDO Register 0x%02x update failed %d\n", 803 addr, ret); 804 return ret; 805 } 806 return palmas_regulator_config_external(palmas, id, reg_init); 807 } 808 return 0; 809 } 810 811 static int palmas_extreg_init(struct palmas *palmas, int id, 812 struct palmas_reg_init *reg_init) 813 { 814 unsigned int addr; 815 int ret; 816 unsigned int val = 0; 817 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 818 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 819 820 addr = rinfo->ctrl_addr; 821 822 if (reg_init->mode_sleep) 823 val = PALMAS_REGEN1_CTRL_MODE_SLEEP; 824 825 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, 826 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val); 827 if (ret < 0) { 828 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n", 829 addr, ret); 830 return ret; 831 } 832 833 if (reg_init->roof_floor) { 834 /* Enable externally controlled regulator */ 835 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, 836 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE, 837 PALMAS_REGEN1_CTRL_MODE_ACTIVE); 838 if (ret < 0) { 839 dev_err(palmas->dev, 840 "Resource Register 0x%02x update failed %d\n", 841 addr, ret); 842 return ret; 843 } 844 return palmas_regulator_config_external(palmas, id, reg_init); 845 } 846 return 0; 847 } 848 849 static void palmas_enable_ldo8_track(struct palmas *palmas) 850 { 851 unsigned int reg; 852 unsigned int addr; 853 int ret; 854 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 855 struct palmas_regs_info *rinfo; 856 857 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8]; 858 addr = rinfo->ctrl_addr; 859 860 ret = palmas_ldo_read(palmas, addr, ®); 861 if (ret) { 862 dev_err(palmas->dev, "Error in reading ldo8 control reg\n"); 863 return; 864 } 865 866 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN; 867 ret = palmas_ldo_write(palmas, addr, reg); 868 if (ret < 0) { 869 dev_err(palmas->dev, "Error in enabling tracking mode\n"); 870 return; 871 } 872 /* 873 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8 874 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two, 875 * and can be set from 0.45 to 1.65 V. 876 */ 877 addr = rinfo->vsel_addr; 878 ret = palmas_ldo_read(palmas, addr, ®); 879 if (ret) { 880 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n"); 881 return; 882 } 883 884 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK; 885 ret = palmas_ldo_write(palmas, addr, reg); 886 if (ret < 0) 887 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n"); 888 889 return; 890 } 891 892 static int palmas_ldo_registration(struct palmas_pmic *pmic, 893 struct palmas_pmic_driver_data *ddata, 894 struct palmas_pmic_platform_data *pdata, 895 const char *pdev_name, 896 struct regulator_config config) 897 { 898 int id, ret; 899 struct regulator_dev *rdev; 900 struct palmas_reg_init *reg_init; 901 struct palmas_regs_info *rinfo; 902 struct regulator_desc *desc; 903 904 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { 905 if (pdata && pdata->reg_init[id]) 906 reg_init = pdata->reg_init[id]; 907 else 908 reg_init = NULL; 909 910 rinfo = &ddata->palmas_regs_info[id]; 911 /* Miss out regulators which are not available due 912 * to alternate functions. 913 */ 914 915 /* Register the regulators */ 916 desc = &pmic->desc[id]; 917 desc->name = rinfo->name; 918 desc->id = id; 919 desc->type = REGULATOR_VOLTAGE; 920 desc->owner = THIS_MODULE; 921 922 if (id < PALMAS_REG_REGEN1) { 923 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; 924 if (reg_init && reg_init->roof_floor) 925 desc->ops = &palmas_ops_ext_control_ldo; 926 else 927 desc->ops = &palmas_ops_ldo; 928 desc->min_uV = 900000; 929 desc->uV_step = 50000; 930 desc->linear_min_sel = 1; 931 desc->enable_time = 500; 932 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 933 rinfo->vsel_addr); 934 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; 935 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 936 rinfo->ctrl_addr); 937 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 938 939 /* Check if LDO8 is in tracking mode or not */ 940 if (pdata && (id == PALMAS_REG_LDO8) && 941 pdata->enable_ldo8_tracking) { 942 palmas_enable_ldo8_track(pmic->palmas); 943 desc->min_uV = 450000; 944 desc->uV_step = 25000; 945 } 946 947 /* LOD6 in vibrator mode will have enable time 2000us */ 948 if (pdata && pdata->ldo6_vibrator && 949 (id == PALMAS_REG_LDO6)) 950 desc->enable_time = 2000; 951 952 if (id == PALMAS_REG_LDO9) { 953 desc->ops = &palmas_ops_ldo9; 954 desc->bypass_reg = desc->enable_reg; 955 desc->bypass_val_on = 956 PALMAS_LDO9_CTRL_LDO_BYPASS_EN; 957 desc->bypass_mask = 958 PALMAS_LDO9_CTRL_LDO_BYPASS_EN; 959 } 960 } else { 961 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3) 962 continue; 963 964 desc->n_voltages = 1; 965 if (reg_init && reg_init->roof_floor) 966 desc->ops = &palmas_ops_ext_control_extreg; 967 else 968 desc->ops = &palmas_ops_extreg; 969 desc->enable_reg = 970 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 971 rinfo->ctrl_addr); 972 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; 973 } 974 975 if (pdata) 976 config.init_data = pdata->reg_data[id]; 977 else 978 config.init_data = NULL; 979 980 desc->supply_name = rinfo->sname; 981 config.of_node = ddata->palmas_matches[id].of_node; 982 983 rdev = devm_regulator_register(pmic->dev, desc, &config); 984 if (IS_ERR(rdev)) { 985 dev_err(pmic->dev, 986 "failed to register %s regulator\n", 987 pdev_name); 988 return PTR_ERR(rdev); 989 } 990 991 /* Save regulator for cleanup */ 992 pmic->rdev[id] = rdev; 993 994 /* Initialise sleep/init values from platform data */ 995 if (pdata) { 996 reg_init = pdata->reg_init[id]; 997 if (reg_init) { 998 if (id <= ddata->ldo_end) 999 ret = palmas_ldo_init(pmic->palmas, id, 1000 reg_init); 1001 else 1002 ret = palmas_extreg_init(pmic->palmas, 1003 id, reg_init); 1004 if (ret) 1005 return ret; 1006 } 1007 } 1008 } 1009 1010 return 0; 1011 } 1012 1013 static int tps65917_ldo_registration(struct palmas_pmic *pmic, 1014 struct palmas_pmic_driver_data *ddata, 1015 struct palmas_pmic_platform_data *pdata, 1016 const char *pdev_name, 1017 struct regulator_config config) 1018 { 1019 int id, ret; 1020 struct regulator_dev *rdev; 1021 struct palmas_reg_init *reg_init; 1022 struct palmas_regs_info *rinfo; 1023 struct regulator_desc *desc; 1024 1025 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { 1026 if (pdata && pdata->reg_init[id]) 1027 reg_init = pdata->reg_init[id]; 1028 else 1029 reg_init = NULL; 1030 1031 /* Miss out regulators which are not available due 1032 * to alternate functions. 1033 */ 1034 rinfo = &ddata->palmas_regs_info[id]; 1035 1036 /* Register the regulators */ 1037 desc = &pmic->desc[id]; 1038 desc->name = rinfo->name; 1039 desc->id = id; 1040 desc->type = REGULATOR_VOLTAGE; 1041 desc->owner = THIS_MODULE; 1042 1043 if (id < TPS65917_REG_REGEN1) { 1044 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; 1045 if (reg_init && reg_init->roof_floor) 1046 desc->ops = &palmas_ops_ext_control_ldo; 1047 else 1048 desc->ops = &tps65917_ops_ldo; 1049 desc->min_uV = 900000; 1050 desc->uV_step = 50000; 1051 desc->linear_min_sel = 1; 1052 desc->enable_time = 500; 1053 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 1054 rinfo->vsel_addr); 1055 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; 1056 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 1057 rinfo->ctrl_addr); 1058 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 1059 /* 1060 * To be confirmed. Discussion on going with PMIC Team. 1061 * It is of the order of ~60mV/uS. 1062 */ 1063 desc->ramp_delay = 2500; 1064 if (id == TPS65917_REG_LDO1 || 1065 id == TPS65917_REG_LDO2) { 1066 desc->ops = &tps65917_ops_ldo_1_2; 1067 desc->bypass_reg = desc->enable_reg; 1068 desc->bypass_val_on = 1069 TPS65917_LDO1_CTRL_BYPASS_EN; 1070 desc->bypass_mask = 1071 TPS65917_LDO1_CTRL_BYPASS_EN; 1072 } 1073 } else { 1074 desc->n_voltages = 1; 1075 if (reg_init && reg_init->roof_floor) 1076 desc->ops = &palmas_ops_ext_control_extreg; 1077 else 1078 desc->ops = &palmas_ops_extreg; 1079 desc->enable_reg = 1080 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 1081 rinfo->ctrl_addr); 1082 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; 1083 } 1084 1085 if (pdata) 1086 config.init_data = pdata->reg_data[id]; 1087 else 1088 config.init_data = NULL; 1089 1090 desc->supply_name = rinfo->sname; 1091 config.of_node = ddata->palmas_matches[id].of_node; 1092 1093 rdev = devm_regulator_register(pmic->dev, desc, &config); 1094 if (IS_ERR(rdev)) { 1095 dev_err(pmic->dev, 1096 "failed to register %s regulator\n", 1097 pdev_name); 1098 return PTR_ERR(rdev); 1099 } 1100 1101 /* Save regulator for cleanup */ 1102 pmic->rdev[id] = rdev; 1103 1104 /* Initialise sleep/init values from platform data */ 1105 if (pdata) { 1106 reg_init = pdata->reg_init[id]; 1107 if (reg_init) { 1108 if (id < TPS65917_REG_REGEN1) 1109 ret = palmas_ldo_init(pmic->palmas, 1110 id, reg_init); 1111 else 1112 ret = palmas_extreg_init(pmic->palmas, 1113 id, reg_init); 1114 if (ret) 1115 return ret; 1116 } 1117 } 1118 } 1119 1120 return 0; 1121 } 1122 1123 static int palmas_smps_registration(struct palmas_pmic *pmic, 1124 struct palmas_pmic_driver_data *ddata, 1125 struct palmas_pmic_platform_data *pdata, 1126 const char *pdev_name, 1127 struct regulator_config config) 1128 { 1129 int id, ret; 1130 unsigned int addr, reg; 1131 struct regulator_dev *rdev; 1132 struct palmas_reg_init *reg_init; 1133 struct palmas_regs_info *rinfo; 1134 struct regulator_desc *desc; 1135 1136 for (id = ddata->smps_start; id <= ddata->smps_end; id++) { 1137 bool ramp_delay_support = false; 1138 1139 /* 1140 * Miss out regulators which are not available due 1141 * to slaving configurations. 1142 */ 1143 switch (id) { 1144 case PALMAS_REG_SMPS12: 1145 case PALMAS_REG_SMPS3: 1146 if (pmic->smps123) 1147 continue; 1148 if (id == PALMAS_REG_SMPS12) 1149 ramp_delay_support = true; 1150 break; 1151 case PALMAS_REG_SMPS123: 1152 if (!pmic->smps123) 1153 continue; 1154 ramp_delay_support = true; 1155 break; 1156 case PALMAS_REG_SMPS45: 1157 case PALMAS_REG_SMPS7: 1158 if (pmic->smps457) 1159 continue; 1160 if (id == PALMAS_REG_SMPS45) 1161 ramp_delay_support = true; 1162 break; 1163 case PALMAS_REG_SMPS457: 1164 if (!pmic->smps457) 1165 continue; 1166 ramp_delay_support = true; 1167 break; 1168 case PALMAS_REG_SMPS10_OUT1: 1169 case PALMAS_REG_SMPS10_OUT2: 1170 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST)) 1171 continue; 1172 } 1173 rinfo = &ddata->palmas_regs_info[id]; 1174 desc = &pmic->desc[id]; 1175 1176 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8)) 1177 ramp_delay_support = true; 1178 1179 if (ramp_delay_support) { 1180 addr = rinfo->tstep_addr; 1181 ret = palmas_smps_read(pmic->palmas, addr, ®); 1182 if (ret < 0) { 1183 dev_err(pmic->dev, 1184 "reading TSTEP reg failed: %d\n", ret); 1185 return ret; 1186 } 1187 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3]; 1188 pmic->ramp_delay[id] = desc->ramp_delay; 1189 } 1190 1191 /* Initialise sleep/init values from platform data */ 1192 if (pdata && pdata->reg_init[id]) { 1193 reg_init = pdata->reg_init[id]; 1194 ret = palmas_smps_init(pmic->palmas, id, reg_init); 1195 if (ret) 1196 return ret; 1197 } else { 1198 reg_init = NULL; 1199 } 1200 1201 /* Register the regulators */ 1202 desc->name = rinfo->name; 1203 desc->id = id; 1204 1205 switch (id) { 1206 case PALMAS_REG_SMPS10_OUT1: 1207 case PALMAS_REG_SMPS10_OUT2: 1208 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES; 1209 desc->ops = &palmas_ops_smps10; 1210 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1211 PALMAS_SMPS10_CTRL); 1212 desc->vsel_mask = SMPS10_VSEL; 1213 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1214 PALMAS_SMPS10_CTRL); 1215 if (id == PALMAS_REG_SMPS10_OUT1) 1216 desc->enable_mask = SMPS10_SWITCH_EN; 1217 else 1218 desc->enable_mask = SMPS10_BOOST_EN; 1219 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1220 PALMAS_SMPS10_CTRL); 1221 desc->bypass_val_on = SMPS10_BYPASS_EN; 1222 desc->bypass_mask = SMPS10_BYPASS_EN; 1223 desc->min_uV = 3750000; 1224 desc->uV_step = 1250000; 1225 break; 1226 default: 1227 /* 1228 * Read and store the RANGE bit for later use 1229 * This must be done before regulator is probed, 1230 * otherwise we error in probe with unsupportable 1231 * ranges. Read the current smps mode for later use. 1232 */ 1233 addr = rinfo->vsel_addr; 1234 desc->n_linear_ranges = 3; 1235 1236 ret = palmas_smps_read(pmic->palmas, addr, ®); 1237 if (ret) 1238 return ret; 1239 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE) 1240 pmic->range[id] = 1; 1241 if (pmic->range[id]) 1242 desc->linear_ranges = smps_high_ranges; 1243 else 1244 desc->linear_ranges = smps_low_ranges; 1245 1246 if (reg_init && reg_init->roof_floor) 1247 desc->ops = &palmas_ops_ext_control_smps; 1248 else 1249 desc->ops = &palmas_ops_smps; 1250 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 1251 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1252 rinfo->vsel_addr); 1253 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 1254 1255 /* Read the smps mode for later use. */ 1256 addr = rinfo->ctrl_addr; 1257 ret = palmas_smps_read(pmic->palmas, addr, ®); 1258 if (ret) 1259 return ret; 1260 pmic->current_reg_mode[id] = reg & 1261 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1262 1263 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1264 rinfo->ctrl_addr); 1265 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1266 /* set_mode overrides this value */ 1267 desc->enable_val = SMPS_CTRL_MODE_ON; 1268 } 1269 1270 desc->type = REGULATOR_VOLTAGE; 1271 desc->owner = THIS_MODULE; 1272 1273 if (pdata) 1274 config.init_data = pdata->reg_data[id]; 1275 else 1276 config.init_data = NULL; 1277 1278 desc->supply_name = rinfo->sname; 1279 config.of_node = ddata->palmas_matches[id].of_node; 1280 1281 rdev = devm_regulator_register(pmic->dev, desc, &config); 1282 if (IS_ERR(rdev)) { 1283 dev_err(pmic->dev, 1284 "failed to register %s regulator\n", 1285 pdev_name); 1286 return PTR_ERR(rdev); 1287 } 1288 1289 /* Save regulator for cleanup */ 1290 pmic->rdev[id] = rdev; 1291 } 1292 1293 return 0; 1294 } 1295 1296 static int tps65917_smps_registration(struct palmas_pmic *pmic, 1297 struct palmas_pmic_driver_data *ddata, 1298 struct palmas_pmic_platform_data *pdata, 1299 const char *pdev_name, 1300 struct regulator_config config) 1301 { 1302 int id, ret; 1303 unsigned int addr, reg; 1304 struct regulator_dev *rdev; 1305 struct palmas_reg_init *reg_init; 1306 struct palmas_regs_info *rinfo; 1307 struct regulator_desc *desc; 1308 1309 for (id = ddata->smps_start; id <= ddata->smps_end; id++) { 1310 /* 1311 * Miss out regulators which are not available due 1312 * to slaving configurations. 1313 */ 1314 desc = &pmic->desc[id]; 1315 desc->n_linear_ranges = 3; 1316 if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) && 1317 pmic->smps12) 1318 continue; 1319 1320 /* Initialise sleep/init values from platform data */ 1321 if (pdata && pdata->reg_init[id]) { 1322 reg_init = pdata->reg_init[id]; 1323 ret = palmas_smps_init(pmic->palmas, id, reg_init); 1324 if (ret) 1325 return ret; 1326 } else { 1327 reg_init = NULL; 1328 } 1329 rinfo = &ddata->palmas_regs_info[id]; 1330 1331 /* Register the regulators */ 1332 desc->name = rinfo->name; 1333 desc->id = id; 1334 1335 /* 1336 * Read and store the RANGE bit for later use 1337 * This must be done before regulator is probed, 1338 * otherwise we error in probe with unsupportable 1339 * ranges. Read the current smps mode for later use. 1340 */ 1341 addr = rinfo->vsel_addr; 1342 1343 ret = palmas_smps_read(pmic->palmas, addr, ®); 1344 if (ret) 1345 return ret; 1346 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE) 1347 pmic->range[id] = 1; 1348 1349 if (pmic->range[id]) 1350 desc->linear_ranges = smps_high_ranges; 1351 else 1352 desc->linear_ranges = smps_low_ranges; 1353 1354 if (reg_init && reg_init->roof_floor) 1355 desc->ops = &tps65917_ops_ext_control_smps; 1356 else 1357 desc->ops = &tps65917_ops_smps; 1358 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 1359 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1360 rinfo->vsel_addr); 1361 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 1362 desc->ramp_delay = 2500; 1363 1364 /* Read the smps mode for later use. */ 1365 addr = rinfo->ctrl_addr; 1366 ret = palmas_smps_read(pmic->palmas, addr, ®); 1367 if (ret) 1368 return ret; 1369 pmic->current_reg_mode[id] = reg & 1370 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1371 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1372 rinfo->ctrl_addr); 1373 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1374 /* set_mode overrides this value */ 1375 desc->enable_val = SMPS_CTRL_MODE_ON; 1376 1377 desc->type = REGULATOR_VOLTAGE; 1378 desc->owner = THIS_MODULE; 1379 1380 if (pdata) 1381 config.init_data = pdata->reg_data[id]; 1382 else 1383 config.init_data = NULL; 1384 1385 desc->supply_name = rinfo->sname; 1386 config.of_node = ddata->palmas_matches[id].of_node; 1387 1388 rdev = devm_regulator_register(pmic->dev, desc, &config); 1389 if (IS_ERR(rdev)) { 1390 dev_err(pmic->dev, 1391 "failed to register %s regulator\n", 1392 pdev_name); 1393 return PTR_ERR(rdev); 1394 } 1395 1396 /* Save regulator for cleanup */ 1397 pmic->rdev[id] = rdev; 1398 } 1399 1400 return 0; 1401 } 1402 1403 static struct of_regulator_match palmas_matches[] = { 1404 { .name = "smps12", }, 1405 { .name = "smps123", }, 1406 { .name = "smps3", }, 1407 { .name = "smps45", }, 1408 { .name = "smps457", }, 1409 { .name = "smps6", }, 1410 { .name = "smps7", }, 1411 { .name = "smps8", }, 1412 { .name = "smps9", }, 1413 { .name = "smps10_out2", }, 1414 { .name = "smps10_out1", }, 1415 { .name = "ldo1", }, 1416 { .name = "ldo2", }, 1417 { .name = "ldo3", }, 1418 { .name = "ldo4", }, 1419 { .name = "ldo5", }, 1420 { .name = "ldo6", }, 1421 { .name = "ldo7", }, 1422 { .name = "ldo8", }, 1423 { .name = "ldo9", }, 1424 { .name = "ldoln", }, 1425 { .name = "ldousb", }, 1426 { .name = "regen1", }, 1427 { .name = "regen2", }, 1428 { .name = "regen3", }, 1429 { .name = "sysen1", }, 1430 { .name = "sysen2", }, 1431 }; 1432 1433 static struct of_regulator_match tps65917_matches[] = { 1434 { .name = "smps1", }, 1435 { .name = "smps2", }, 1436 { .name = "smps3", }, 1437 { .name = "smps4", }, 1438 { .name = "smps5", }, 1439 { .name = "smps12",}, 1440 { .name = "ldo1", }, 1441 { .name = "ldo2", }, 1442 { .name = "ldo3", }, 1443 { .name = "ldo4", }, 1444 { .name = "ldo5", }, 1445 { .name = "regen1", }, 1446 { .name = "regen2", }, 1447 { .name = "regen3", }, 1448 { .name = "sysen1", }, 1449 { .name = "sysen2", }, 1450 }; 1451 1452 static struct palmas_pmic_driver_data palmas_ddata = { 1453 .smps_start = PALMAS_REG_SMPS12, 1454 .smps_end = PALMAS_REG_SMPS10_OUT1, 1455 .ldo_begin = PALMAS_REG_LDO1, 1456 .ldo_end = PALMAS_REG_LDOUSB, 1457 .max_reg = PALMAS_NUM_REGS, 1458 .has_regen3 = true, 1459 .palmas_regs_info = palmas_generic_regs_info, 1460 .palmas_matches = palmas_matches, 1461 .sleep_req_info = palma_sleep_req_info, 1462 .smps_register = palmas_smps_registration, 1463 .ldo_register = palmas_ldo_registration, 1464 }; 1465 1466 static struct palmas_pmic_driver_data tps65917_ddata = { 1467 .smps_start = TPS65917_REG_SMPS1, 1468 .smps_end = TPS65917_REG_SMPS12, 1469 .ldo_begin = TPS65917_REG_LDO1, 1470 .ldo_end = TPS65917_REG_LDO5, 1471 .max_reg = TPS65917_NUM_REGS, 1472 .has_regen3 = true, 1473 .palmas_regs_info = tps65917_regs_info, 1474 .palmas_matches = tps65917_matches, 1475 .sleep_req_info = tps65917_sleep_req_info, 1476 .smps_register = tps65917_smps_registration, 1477 .ldo_register = tps65917_ldo_registration, 1478 }; 1479 1480 static int palmas_dt_to_pdata(struct device *dev, 1481 struct device_node *node, 1482 struct palmas_pmic_platform_data *pdata, 1483 struct palmas_pmic_driver_data *ddata) 1484 { 1485 struct device_node *regulators; 1486 u32 prop; 1487 int idx, ret; 1488 1489 regulators = of_get_child_by_name(node, "regulators"); 1490 if (!regulators) { 1491 dev_info(dev, "regulator node not found\n"); 1492 return 0; 1493 } 1494 1495 ret = of_regulator_match(dev, regulators, ddata->palmas_matches, 1496 ddata->max_reg); 1497 of_node_put(regulators); 1498 if (ret < 0) { 1499 dev_err(dev, "Error parsing regulator init data: %d\n", ret); 1500 return 0; 1501 } 1502 1503 for (idx = 0; idx < ddata->max_reg; idx++) { 1504 static struct of_regulator_match *match; 1505 struct palmas_reg_init *rinit; 1506 struct device_node *np; 1507 1508 match = &ddata->palmas_matches[idx]; 1509 np = match->of_node; 1510 1511 if (!match->init_data || !np) 1512 continue; 1513 1514 rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL); 1515 if (!rinit) 1516 return -ENOMEM; 1517 1518 pdata->reg_data[idx] = match->init_data; 1519 pdata->reg_init[idx] = rinit; 1520 1521 rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset"); 1522 ret = of_property_read_u32(np, "ti,roof-floor", &prop); 1523 /* EINVAL: Property not found */ 1524 if (ret != -EINVAL) { 1525 int econtrol; 1526 1527 /* use default value, when no value is specified */ 1528 econtrol = PALMAS_EXT_CONTROL_NSLEEP; 1529 if (!ret) { 1530 switch (prop) { 1531 case 1: 1532 econtrol = PALMAS_EXT_CONTROL_ENABLE1; 1533 break; 1534 case 2: 1535 econtrol = PALMAS_EXT_CONTROL_ENABLE2; 1536 break; 1537 case 3: 1538 econtrol = PALMAS_EXT_CONTROL_NSLEEP; 1539 break; 1540 default: 1541 WARN_ON(1); 1542 dev_warn(dev, 1543 "%s: Invalid roof-floor option: %u\n", 1544 match->name, prop); 1545 break; 1546 } 1547 } 1548 rinit->roof_floor = econtrol; 1549 } 1550 1551 ret = of_property_read_u32(np, "ti,mode-sleep", &prop); 1552 if (!ret) 1553 rinit->mode_sleep = prop; 1554 1555 ret = of_property_read_bool(np, "ti,smps-range"); 1556 if (ret) 1557 rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE; 1558 1559 if (idx == PALMAS_REG_LDO8) 1560 pdata->enable_ldo8_tracking = of_property_read_bool( 1561 np, "ti,enable-ldo8-tracking"); 1562 } 1563 1564 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator"); 1565 1566 return 0; 1567 } 1568 1569 static const struct of_device_id of_palmas_match_tbl[] = { 1570 { 1571 .compatible = "ti,palmas-pmic", 1572 .data = &palmas_ddata, 1573 }, 1574 { 1575 .compatible = "ti,twl6035-pmic", 1576 .data = &palmas_ddata, 1577 }, 1578 { 1579 .compatible = "ti,twl6036-pmic", 1580 .data = &palmas_ddata, 1581 }, 1582 { 1583 .compatible = "ti,twl6037-pmic", 1584 .data = &palmas_ddata, 1585 }, 1586 { 1587 .compatible = "ti,tps65913-pmic", 1588 .data = &palmas_ddata, 1589 }, 1590 { 1591 .compatible = "ti,tps65914-pmic", 1592 .data = &palmas_ddata, 1593 }, 1594 { 1595 .compatible = "ti,tps80036-pmic", 1596 .data = &palmas_ddata, 1597 }, 1598 { 1599 .compatible = "ti,tps659038-pmic", 1600 .data = &palmas_ddata, 1601 }, 1602 { 1603 .compatible = "ti,tps65917-pmic", 1604 .data = &tps65917_ddata, 1605 }, 1606 { /* end */ } 1607 }; 1608 1609 static int palmas_regulators_probe(struct platform_device *pdev) 1610 { 1611 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); 1612 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev); 1613 struct device_node *node = pdev->dev.of_node; 1614 struct palmas_pmic_driver_data *driver_data; 1615 struct regulator_config config = { }; 1616 struct palmas_pmic *pmic; 1617 const char *pdev_name; 1618 const struct of_device_id *match; 1619 int ret = 0; 1620 unsigned int reg; 1621 1622 match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev); 1623 1624 if (!match) 1625 return -ENODATA; 1626 1627 driver_data = (struct palmas_pmic_driver_data *)match->data; 1628 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 1629 if (!pdata) 1630 return -ENOMEM; 1631 1632 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); 1633 if (!pmic) 1634 return -ENOMEM; 1635 1636 if (of_device_is_compatible(node, "ti,tps659038-pmic")) { 1637 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr = 1638 TPS659038_REGEN2_CTRL; 1639 palmas_ddata.has_regen3 = false; 1640 } 1641 1642 pmic->dev = &pdev->dev; 1643 pmic->palmas = palmas; 1644 palmas->pmic = pmic; 1645 platform_set_drvdata(pdev, pmic); 1646 pmic->palmas->pmic_ddata = driver_data; 1647 1648 ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data); 1649 if (ret) 1650 return ret; 1651 1652 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®); 1653 if (ret) 1654 return ret; 1655 1656 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) { 1657 pmic->smps123 = 1; 1658 pmic->smps12 = 1; 1659 } 1660 1661 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN) 1662 pmic->smps457 = 1; 1663 1664 config.regmap = palmas->regmap[REGULATOR_SLAVE]; 1665 config.dev = &pdev->dev; 1666 config.driver_data = pmic; 1667 pdev_name = pdev->name; 1668 1669 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name, 1670 config); 1671 if (ret) 1672 return ret; 1673 1674 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name, 1675 config); 1676 1677 return ret; 1678 } 1679 1680 static struct platform_driver palmas_driver = { 1681 .driver = { 1682 .name = "palmas-pmic", 1683 .of_match_table = of_palmas_match_tbl, 1684 }, 1685 .probe = palmas_regulators_probe, 1686 }; 1687 1688 static int __init palmas_init(void) 1689 { 1690 return platform_driver_register(&palmas_driver); 1691 } 1692 subsys_initcall(palmas_init); 1693 1694 static void __exit palmas_exit(void) 1695 { 1696 platform_driver_unregister(&palmas_driver); 1697 } 1698 module_exit(palmas_exit); 1699 1700 MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); 1701 MODULE_DESCRIPTION("Palmas voltage regulator driver"); 1702 MODULE_LICENSE("GPL"); 1703 MODULE_ALIAS("platform:palmas-pmic"); 1704 MODULE_DEVICE_TABLE(of, of_palmas_match_tbl); 1705